MX23L6411 64M-BIT (8M x 8 / 4M x 16) Mask ROM with Page Mode FEATURES ORDER INFORMATION • Bit organization - 8M x 8 (byte mode) - 4M x 16 (word mode) • Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) • Page Size - 8 words per page • Current - Operating: 50mA - Standby: 15uA (max.) • Supply voltage - 2.7V~3.6V • Package - 44 pin SOP (500 mil) - 48 pin TSOP (12mm x 20mm) Part No. Access Page Access Package Time Time MX23L6411MC-12 120ns 50ns 44 pin SOP MX23L6411TC-12 120ns 50ns 48 pin TSOP MX23L6411RC-12 120ns 50ns 48 pin TSOP (Reverse type) MX23L6411MC-10 100ns 30ns 44 pin SOP MX23L6411TC-10 100ns 30ns 48 pin TSOP MX23L6411RC-10 100ns 30ns 48 pin TSOP (Reverse type) PIN DESCRIPTION Symbol A0~A21 D0~D14 D15/A-1 PIN CONFIGURATION A21 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE VSS OE D0 D8 D1 D9 D2 D10 D3 D11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 MX23L6411 44 SOP 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC Pin Function Address Inputs Data Outputs D15 (Word Mode) / LSB Address (Byte Mode) Chip Enable Input Output Enable Input Word / Byte Mode Selection Power Supply Pin Ground Pin No Connection CE OE Byte VCC VSS NC MODE SELECTION CE OE Byte D15/A-1 D0~D7 D8~D15 Mode P/N:PM0407 Power H X X X High Z High Z - Stand-by L H X X High Z High Z - Active L L H L L L Output D0~D7 D8~D15 Word Input D0~D7 High Z Byte Active Active REV. 3.0, NOV. 22, 2002 1 MX23L6411 48 TSOP (NORMAL TYPE) BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 MX23L6411 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS 48 TSOP (REVERSE TYPE) VSS VSS D15/A-1 D7 D14 D6 D13 D5 D12 D4 VCC VCC NC D11 D3 D10 D2 D9 D1 D8 D0 OE VSS VSS 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 MX23L6411 P/N:PM0407 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE REV. 3.0, NOV. 22, 2002 2 MX23L6411 BLOCK DIAGRAM A0/(A-1) A2 A3 Address Buffer Memory Array Page Decoder Page Buffer Word/ Byte Output Buffer A21 D0 D15/(D7) CE BYTE OE ABSOLUTE MAXIMUM RATINGS Item Symbol Ratings Supply Voltage Relative to VSS VCC -0.3V to 4.3V Voltage on any Pin Relative to VSS VIN -0.5V to VCC + 2V Ambient Operating Temperature Storage Temperature Topr Tstg 0° C to 70° C -65° C to 125° C P/N:PM0407 REV. 3.0, NOV. 22, 2002 3 MX23L6411 DC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 2.7V~3.6V) Item Symbol MIN. MAX. Conditions Output High Voltage VOH 2.4V - IOH = -0.4mA Output Low Voltage VOL - 0.4V IOL = 1.6mA Input High Voltage VIH 2.2V VCC+0.3V Input Low Voltage VIL -0.3V 0.8V Input Leakage Current ILI - 5uA 0V, VCC Output Leakage Current ILO - 5uA 0V, VCC Operating Current ICC1 - 50mA f=5MHz, all output open Standby Current (TTL) ISTB1 - 1mA CE = VIH Standby Current (CMOS) ISTB2 - 15uA CE>VCC-0.2V Input Capacitance CIN - 10pF Ta = 25° C, f = 1MHZ Output Capacitance COUT - 10pF Ta = 25° C, f = 1MHZ AC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 2.7V~3.6V) Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tACE tPA tOE tOH tHZ 23L6411-10 MIN. MAX. 100ns 100ns 100ns 30ns 30ns 0ns 20ns 23L6411-12 MIN. MAX. 120ns 120ns 120ns 50ns 50ns 0ns 20ns Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. P/N:PM0407 REV. 3.0, NOV. 22, 2002 4 MX23L6411 AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.4V 1.4V See Figure IOH (load)=-0.4mA DOUT IOL (load)=1.6mA C<100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance. TIMING DIAGRAM RANDOM READ ADD ADD ADD ADD tRC tACE CE# tOE OE# tOH tAA VALID DATA VALID tHZ VALID PAGE READ VALID ADD A3-A21 (A-1),A0,A1,A2 2'nd ADD 1'st ADD tAA DATA 3'rd ADD tPA VALID VALID VALID Note: CE, OE are enable. Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode. P/N:PM0407 REV. 3.0, NOV. 22, 2002 5 MX23L6411 PACKAGE INFORMATION P/N:PM0407 REV. 3.0, NOV. 22, 2002 6 MX23L6411 P/N:PM0407 REV. 3.0, NOV. 22, 2002 7 MX23L6411 P/N:PM0407 REV. 3.0, NOV. 22, 2002 8 MX23L6411 REVISION HISTORY REVISION 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 DESCRIPTION AC CHARACTERISTICS tOH 10ns-->0ns DC CHARACTERISTICS ISTB2 5uA-->15uA DC Characteristics voltage range VCC=2.9V~3.6V-->3.0V~3.6V Add 100ns speed grade Modify Operating Current:60mA-->50mA Modify Package Information Change VCC from 3.0~3.6V to 2.7~3.3V 1. Add supply voltage relative to VSS 2. Change voltage on any pin relative to VSS:-0.5V to VCC+2.0 1. Change supply voltage from 2.7V~3.3V to 2.7V~3.6V Modify Package Information P/N:PM0407 PAGE P4 P4 P3 P1,4 P1,4 P6,7 P1,3 P3 P3 P1,4 P6~8 DATE JAN/29/1999 SEP/03/1999 DEC/24/1999 JUL/02/2000 DEC/29/2000 JUL/17/2001 AUG/03/2001 JUL/19/2002 SEP/02/2002 NOV/22/2002 REV. 3.0, NOV. 22, 2002 9 MX23L6411 MACRONIX INTERNATIONAL CO., LTD. Headquarters: TEL:+886-3-578-6688 FAX:+886-3-563-2888 Europe Office : TEL:+32-2-456-8020 FAX:+32-2-456-8021 Hong Kong Office : TEL:+86-755-834-335-79 FAX:+86-755-834-380-78 Japan Office : Kawasaki Office : TEL:+81-44-246-9100 FAX:+81-44-246-9105 Osaka Office : TEL:+81-6-4807-5460 FAX:+81-6-4807-5461 Singapore Office : TEL:+65-6346-5505 FAX:+65-6348-8096 Taipei Office : TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. TEL:+1-408-262-8887 FAX:+1-408-262-8810 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.