PJSD05LFN2 ESD PROTECTION DIODES FEATURES 0.042(1.05) 0.037(0.95) • IEC61000-4-2 Level 4 ESD Protection 0.026(0.65) 0.021(0.55) • In compliance with EU RoHS 2002/95/EC directives MECHANICAL DATA 0.022(0.55) 0.017(0.45) • Case: DFN 2L, Plastic • Terminals: Solderable per MIL-STD-750, Method 2026 • Polarity : see cathode band 0.002(0.05)MAX. 0.022(0.55) 0.047(0.45) 0.013(0.32) 0.008(0.22) 1 Cathode 2 Anode PIN NO.1 IDENTIFICATION MAXIMUM RATINGS Rating Symbol Value Units To ta l P o we r D i s s i p a t i o n o n F R-4 B o a rd ( No te 1 )@ T A = 2 5 o C PD 250 mW P e a k P o we r D i s s i p a ti o n 8 /2 0 S ur g e P uls e P PM 40 W The r ma l Re s i s ta nc e J unc t i o n t o A mb i e nt R θJ A 500 TL 260 o C T J , T S TG -55 to +150 o C L e a d S o ld e r Te m p e ra t ure - Ma xi m um ( 1 0 S e c o nd D ur a ti o n) O p e r a ti ng J unc t i o n a nd S t o ra g e Te m p e ra t ure Ra ng e o C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Rating are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Note : 1.FR-4 = 70 x 60 x 1mm. PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE November 29,2010-REV.00 PAGE . 1 PJSD05LFN2 ELECTRICAL CHARACTERISTICS (TA=25oC unless otherwise noted) Parameter Symbol Maximum Reverse Peak Pulse Current I PP Clamping Voltage@I PP VC Working Peak Reverse Voltage VRWM Maximum Reverse Leakage Current@VRWM IR Breakdown Voltage @ I T VBR Test Current IT Forward Current IF Forward Voltage@I F VF Maximum Peak Power Dissipation PPM Max.Capacitance@V R=0 and f=1MHz C ELECTRICAL CHARACTERISTICS (TA=25oC unless otherwise noted) Part Number PJSD05LFN2 V RWM I R @V RWM V BR@I T (Note 2) C (Note 3) VC Ma x. Ma x. Mi n. M a x. Ma x P e r 8 /2 0 μ s V μA V pF V A mA 5 1 6.2 35 9.8 4 1.0 I PP IT Marking BC Note : 2.VBR is measured with a pulse test current IT at an ambient temperature of 25oC 3.Capacitance at f=1MHz, VR=0V, TA=25oC November 29,2010-REV.00 PAGE . 2 PJSD05LFN2 110 100 Percent of Ipp 80 70 50% of Ipp @20 m s 60 50 40 30 20 Rise time 10-90% - 8m s 10 0 0 10 15 20 25 10 V C, Clamping Voltage (V) 90 8 6 4 2 0 30 0 1 time , m sec 3 4 5 Fig.2 Typical Peak Clamping Voltage 40 60 I R, Leakage Current (nA) C J ,Junction Capacitance (pF) Fig.1 8/20µs Peak Pulse Current Waveform 30 20 10 0 0 1 2 3 4 T J = 25 C 50 40 30 20 10 0 5 0 1 V R ,Reverse Bias Voltage (V) 3 4 5 Fig.4 Typical Reverse Characteristics 300 TJ =150 C 100 TJ =125 C TJ =25 C 10 TJ =75 C 0. 6 0. 8 1 V F, Forward Voltage (V) Fig.5 Typical Forward Characteristics November 29,2010-REV.00 1. 2 P D, Steady-State Power Dissipation(mW) 1000 1 0. 4 2 V R, Reverse Voltage (V) Fig.3 Typical Junction Capacitance I F, Forward Current (mA) 2 I PP,8/20 m s Peak Pulse Current (A) 250 200 150 100 50 0 0 25 50 75 100 125 150 T A, Ambient Temperature (°C) Fig.6 Power Derating Curve PAGE . 3 PJSD05LFN2 MOUNTING PAD LAYOUT DFN 2L 0.043 (1.10) 0.010 (0.26) 0.028 (0.70) 0.017 (0.42) 0.027 (0.68) ORDER INFORMATION • Packing information T/R - 8K per 7” plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2010 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. November 29,2010-REV.00 PAGE . 4