PLL PLL701-05SC

Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
FEATURES
•
•
•
•
•
•
Spread Spectrum Clock Generator with selectable
multiplier from 1x to 6x outputs.
Output frequency ranges: 30MHz to 180MHz.
Modulates external clocks including crystals,
crystal oscillators and ceramic resonators.
Selectable Center or Down Spread Modulation.
TTL/CMOS compatible outputs.
3.3V Operating Voltage.
Low short term jitter.
Available in 8-Pin 150mil SOIC.
FIN
1
S0^
2
S1^
3
S2 v
4
PLL701-05
•
•
PIN CONFIGURATION
8
VDD
7
S3 v
6
FOUT
5
GND
FIN = 30 ~ 120 Mhz
Note: . v: 120KΩ Internal Pull down. ^: 120KΩ Internal Pull up.
DESCRIPTIONS
The PLL701-05 is a Spread Spectrum Clock
Generator designed for the purpose of reducing EMI
in high-speed digital systems. Any output frequency
can be selected by programming 4 multiplier modes.
The device is designed to operate over a very wide
range of input frequencies and provides 1x to 4x
modulated clock outputs.
OUTPUT CLOCK (FOUT) SELECTION
S0
S1
S2
S3
FIN Range
(MHz)
FOUT
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 60
30 - 45
30 - 45
60 - 120
60 - 120
60 - 120
60 - 120
X1
X1
X1
X1
X2
X2
X2
X2
X2
X2
X4
X4
X1
X1
X1
X1
Spread Spectrum
modulation
frequency
Spread Spectrum
±0.75%
±1.00%
-2.50%
0.5-1.5%
Fin / 512
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
±0.25%
±0.5%
±0.75%
±1.00%
-2.50%
0.5-1.5%
0.25-1.25%
0.5-1.5%
±0.25%
±0.50%
0.25-1.25%
0.5-1.5%
Rev 09/26/02 Page 1
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
BLOCK DIAGRAM
VDD
XIN
PLL
SST
XTAL
OSC
XOUT
FOUT
Control
S(0:3)
Logic
PIN DESCRIPTIONS
Name
Number
Type
Description
FIN
1
I
Input Clock Frequency.
S0
2
I
Digital control input to select output frequency. Has internal pull-up.
S1
3
I
Digital control input to select output frequency. Has internal pull-up.
S2
4
I
Digital control input to select output frequency. Has internal pull-down.
S3
7
I
Digital control input to select output frequency. Has internal pull-down.
VDD
8
P
3.3V Power Supply.
FOUT
6
O
Modulated Clock Frequency Output. The frequency before modulation is
synthesized by multiplying the input frequency by 1X, 2X, or 4X, depending on
S(0:3).
GND
5
P
Ground.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 2
PLL701-05
Preliminary
Low EMI Spread Spectrum Multiplier Clock
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
V DD
V SS - 0.5
6
V
Input Voltage Range
VI
V SS - 0.5
V DD + 0.5
V
Output Voltage Range
VO
V SS - 0.5
V DD + 0.5
V
260
°C
Supply Voltage
Soldering Temperature
Storage Temperature
TS
-65
150
°C
Ambient Operating Temperature*
TA
-40
85
°C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. DC/AC Specification
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
3.45
V
Supply Voltage
V DD
3.15
Input High Voltage
V IH
0.7*VDD
Input Low Voltage
V IL
0.3*VDD
V
Input High Current
I IH
100
µA
Input Low Current
I IL
100
µA
Output High Voltage
V OH
I OH =5mA, VDD=3.3V
Output Low Voltage
V OL
I OL =6mA, VDD=3.3V
Input Frequency
F IN
V
2.4
0.4
30
Maximum interruption of F IN
120
MHz
100
µs
Input Capacitance
C in1
4
Pull-up Resistor
R pu
PIN 2, 3
60
125
200
KΩ
Pull-down Resistor
R pd
PIN 4, 7
60
125
200
KΩ
Short Circuit Current
I sc
3.3V Dynamic Supply Current
I CC
No Load
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
pF
25
mA
20
mA
Rev 09/26/02 Page 3
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
3. TIMING CHARACTERISTICS
PARAMETERS
SYMBOL
Rise Time
Tr
Fall Time
Tf
Output Duty Cycle
DT
Cycle to Cycle Jitter
T cyc-cyc
Cycle to Cycle Jitter
T cyc-cyc
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Measured at 0.8V ~ 2.0V @ 3.3V
0.8
0.95
1.1
ns
Measured at 2.0V ~ 0.8V @ 3.3V
0.78
0.85
0.9
ns
45
50
55
%
FOUT=48MHz @ 3.3V
100
ps
FOUT=72MHz @ 3.3V
100
ps
INPUT LOGIC SELECTION THROUGH RESISTOR LOAD OPTION
VDD
R
120Kohm
Power Up
Reset
RB
Clock Load
XIN
EN
XOUT
RB
Jumper options
S2
Register
27KOhm
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Strapping
Resistor
Rev 09/26/02 Page 4
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
PACKAGE INFORMATION
8 PIN Narrow SOIC ( mm )
SOIC
Symbol
Min.
Max.
A
1.47
1.73
A1
B
0.10
0.33
0.25
0.51
C
D
0.19
4.80
E
H
3.80
5.80
4.95
4.00
6.20
L
e
0.38
1.27
E
D
0.25
1.27 BSC
H
A
A1
C
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL701-05 S C
PART NUMBER
TEMPERATURATURE
C=COMMERCIAL
M=MILITARY
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 5