SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 • • • • • DW OR NT PACKAGE (TOP VIEW) 3-State Buffer-Type Outputs Drive Bus Lines Directly Each Register File Has Individual Write-Enable Controls and Address Lines Designed Specifically for Multibus Architecture and Overlapping File Operations Prioritized B-Input Port Prevents Write Conflicts During Dual-Input Mode Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs S0 1A0 1A1 1A2 1A3 1W S2 DQA1 DQA2 DQA3 DQA4 GND description 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC S1 2A3 2A2 2A1 2A0 2W S3 DQB4 DQB3 DQB2 DQB1 This device features two 16-word by 4-bit register files. Each register file has individual write-enable (1W, 2W) controls and address lines. This device has two 4-bit data I/O ports (DQA1–DQA4 and DQB1–DQB4). The data I/O ports can output to bus A and bus B, receive input from bus A and bus B, receive input from bus A and output to bus B, or output to bus A and receive input from bus B. To prevent writing conflicts in the dual-input mode, the B-input port takes priority. Two select (S0 and S1) lines control which port has access to which register. S2 determines whether the A ports are in the input or the output modes and S3 does likewise for the B ports. The address lines (1A0 –1A3 or 2A0 –2A3) are decoded by an internal 1-of-16 decoder to select which register word is to be accessed. All outputs are 3-state buffer-type outputs designed specifically to drive bus lines directly. The SN74ALS870 is characterized for operation from 0°C to 70°C. FUNCTION TABLE FILE SELECT S0 S1 FILE SEL L L 1R to A, 1R to B H L 2R to A, 1R to B L H 1R to A, 2R to B H H 2R to A, 2R to B L L A to 1R, 1R to B H L A to 2R, 1R to B L H A to 1R, 2R to B H H A to 2R, 2R to B L L 1R to A, B to 1R H L 2R to A, B to 1R L H 1R to A, B to 2R H H 2R to A, B to 2R L L B to 1R H L A to 2R, B to 1R L H A to 1R, B to 2R H H B to 2R INPUT/OUTPUT S2 S3 I/O SEL L L A out, out B out H L in B out A in, L H A out, out B in H H A in, in B in Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 logic symbol† 1A0 1A1 1A2 1A3 2A0 2A1 2A2 2A3 S0 S1 S2 S3 2 5 19 0 15 3 0 20 21 22 1 23 7 17 18 2W DQA1 1A 4 6 1W [REG FILE 16 × 4] 0 3 8 2A 0 15 3 C0/G10 C1/G11 C2 [A in] EN12 [A out] C3 [B in] EN13 [B out] C4 C5 RAM 16 × 1 [REG 1] Z6 MUX 12 6 7 8,10 1A,0,2(1/3)4D 1A 1A,1,3,4D RAM 16 × 1 [REG 2] 9,10 6 7 DQA2 DQA3 DQA4 2A,0,2(1/3)5D 2A 2A,1,3,5D Z7 13 Z8 8 11 9 11 Z9 9 14 10 15 11 16 POST OFFICE BOX 655303 DQB1 MUX † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 13 • DALLAS, TEXAS 75265 DQB2 DQB3 DQB4 SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 logic diagram (positive logic) Decoder 2 1A0 3 1A1 4 1A2 5 1A3 1 S0 S1 S2 S3 1W 2W Decoder BIN/Y 1 0 16 2 15 3 16 4 BIN/Y 1 0 2 15 3 4 19 20 21 22 2A0 2A1 2A2 2A3 23 7 17 6 18 REG1 RAM 16×1 0 A 15 A A,D DQA1 8 13 DQB1 REG2 RAM 16×1 0 A 15 A A,D 16 16 Three Identical Channels Not Shown absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 recommended operating conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage High-level output current – 2.6 mA IOL tw Low-level output current 24 mA tsu Setup time High-level input voltage 2 12 Address before write↓ th Hold time TA Operating free-air temperature V 0.8 Pulse duration, write V ns 5 Data before write↑ 15 Select before write↓ 12 Address before write↓ 0 Data before write↑ 0 Select before write↓ V ns ns 12 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II Control inputs DQA and DQB ports TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V, VCC = 4.5 V, IOH = – 2.6 mA IOL = 24 mA VCC = 5 5.5 5V VI = 7 V VI = 5.5 V 1W and 2W IIH Other control inputs Control inputs DQA and DQB ports‡ VCC – 2 2.4 TYP† MAX UNIT – 1.2 V V 3.2 0.35 0.5 0.1 0.2 V mA 20 VCC = 5.5 V, VI = 2.7 V DQA and DQB ports‡ IIL MIN 40 µA 50 VCC = 5 5.5 5V V, VI = 0 0.4 4V – 0.2 – 0.2 mA IO§ VCC = 5.5 V, VO = 2.25 V – 30 – 112 mA ICC VCC = 5.5 V 80 110 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 switching characteristics (see Figure 1) PARAMETER ta(A) ta(S) (S) tdi dis ten tpd FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† MIN MAX Any A Any DQ 3 19 S0 Any DQA 3 15 S1 Any DQB 3 15 S2 Any DQA 3 14 S3 Any DQB 3 14 S2 Any DQA 3 17 S3 Any DQB 3 17 W Any DQ 5 23 DQA DQB 5 26 5 26 DQB DQA † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns 5 SN74ALS870 DUAL 16-BY-4 REGISTER FILES SDAS139A – DECEMBER 1982 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V Data Input tw th tsu 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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