AMI PI404MC-A8

™
Peripheral
Imaging
Corporation
PI404MC-A8
400DPI CIS Module
Engineering Data Sheet
Key Features
• Light source, lens, and sensor are integrated into a single module
• 15.7 dpm resolution, 57 mm scanning length
• 1.8 msec/line scanning speed @ 500KHz clock rate
• Wide dynamic range
• Analog output
• Yellow-Green light source 570nm
• Compact size ≅ 13 mm x 19 mm x 70 mm
• Low power
• Light weight
General Description
The PI404MC-A8 is a CIS module. It is a long contact image chips, using MOS image
sensor technology for high-speed performance and high sensitivity. The PI404MC-A8 is
suitable for scanning A8 size (57 mm) documents with 15.7 dots per millimeter resolution.
Applications include document scanning, mark readers, gaming and office automation
equipment.
Functional Description
The PI404MC-A8 imaging array consists of 7 sensors that are cascaded to provide 896
photo-detectors with their associated multiplex switches, and a digital shift register that
controls its sequential readout. Mounted in the module is one-to-one graded indexed
micro lens array that focuses the scanned documents to image onto its sensing plane.
PAGE 1 OF 7 - PI404MC-A8, 01-19-01
The on-board amplifier processes the video signal to produce a sequential stream of video
at the video output pin of the PI404MC-A8 module.
Illumination is by means of an integrated LED light source. All components are housed in
a small plastic housing which has a cover glass which acts as the focal point for the object
being scanned and protects the imaging array, micro lens assembly, and LED light source
from dust. I/O to the module is the 10-pin connector located on one end of the module.
See Figure 4, Mechanical Structure on the last page. The cross section of the PI404MCA8 is shown in Figure 1 and the block diagram in Figure 2.
DOCUMENT SURFACE
GLASS WINDOW
ROD LENS
MODULE HOUSE
LIGHT PATH
D
LE
R
BA
SENSORS
PCB
INSIDE PICTORIAL OF MODULE
Figure 1. PI404MC-A8 Cross Section
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GLED
LED
LED
LED
LED
LED
LED
LED
LED
VLED
ROD LENS
894
PHOTO SENSORS
1
2
3
4
5
895
896
----------------
VIDEO
LINE
VN(-V)
VDD (+5)
SHIFT REGISTER
GRD
BUFFER
CP
VIDEO AMPLIFIER
SP
VOUT
GRD
Figure 2. PI404MC-A8 module block diagram.
(See Table 1 below for pin configuration)
Pin Number
1
2
3
4
5
6
7
8
9
10
Symbol
Vout
Gnd
Vdd (+5V)
Vn (-5V to –12V)
Gnd
SP
Gnd
CP
GLED
VLED
Names and Functions
Analog Video Output
Ground; 0V
Positive power supply
Negative power supply
Ground; 0V
Shift register start pulse
Ground; 0V
Sampling clock pulse
Ground for the light source; 0V
Supply for the light source
Table 1. Pin configuration
Absolute Maximum Rating:
Parameter
Power supply
voltage
Input clock pulse
(high level)
Symbols
Vdd
Idd
Vn
In
VLED
ILED
Vih
Maximum Rating
6
40
-15
10
5.5V
300
Vdd – 0.5V
PAGE 3 OF 7 - PI404MC-A8, 01-19-01
Units
V
ma
V
ma
V
ma
V
Input clock pulse
(low level)
Vil
-0.5
V
Table 2. Absolute Maximum Rating
Environmental Specifications
Operating
temperature (1)
Operating
humidity (1)
Storage
temperature (1)
Storage humidity (1)
Top
0 to 50
0
Hop
10 to 90
%
Tstg
-20 to+75
0
Hstg
10 to 90
%
C
C
Table 3. Operating and Storage Environment
Note (1) These are standard specifications for the CIS modules.
Electro-Optical Characteristics (25°C)
Parameter
Symbol
Number of photo detectors
Pixel-to-pixel spacing
Line scanning rate
Tint (1)
Parameter
896
63.5
2.92
Units
elements
µm
msec
Clock frequency (2)
Bright output voltage (3)
Bright output
nonuniformity (4)
Dark nonuniformity (5)
Dark output voltage (6)
Modulation transfer
function (7)
f
Video Output
Up
307
2.0 +/-0.2
+/- 30
KHz
Volt
%
Ud
Dark Level (DL)
MTF
<200
-200<DL<200
>45
mV
mV
%
Note
@ 307 KHz
clock
frequency
Table 4. Electro-optical characteristics at 25° C.
Definition:
(1) Tint: line scanning rate or integration time. Tint is determined by the interval between
two start pulses (SP).
(2) f: main clock frequency also equals the video sampling frequency.
(3) Video output level is controlled with an adjustment as well as Integration time
(4) Up = {[Vp(max) –Vp(min)]/Vp(max)}x100%
Where VP(max) = maximum peak pixel and VP(min) = minimum pixel.
(5) Ud = Vdmax – Vdmin
PAGE 4 OF 7 - PI404MC-A8, 01-19-01
Vdmin is the minimum output voltage with LED off.
Vdmax is maximum output voltage with LED off
(6) This level is measured from the reset level that is located between the pixels, during
the pixel reset duration. The reset level is at ground, 0V. It can be adjusted with offset
potentiometer located on the module.
(7) MTF = [(Vp(n) – Vp(n+1)] / (Vp(n)+ Vp(n+1)] x 100 [%]
Vp(n): nth maximum output pixel from a 8.0 lp/mm target.
V(n+1): (n+1)th minimum output pixel from a 8.0 lp/mm target.
(8) lp / mm: line pair per mm
Recommended Operating Conditions (25°C)
Item
Power Supply
Input voltage at digital high
Input voltage at digital low
Clock frequency
Clock pulse high duty cycle
Clock pulse high duration
Integration time
Operating temperature(1)
Symbol
Vdd
Vn.
Idd
In
ILED
VLED
Vih
Vil
f
Tint
Top
Min
4.5
-12
Vdd-1.0
0
0
Typical
5.0
-5
30
8
250
+5
Vdd-.5
0.30
25
0.8
3.0
25
Max
5.5
-4.0
300
Vdd
0.6
1.0
50
Table 5. Recommended Operating Condition (25 oC)
Note (1) see the note under the Table for Operating and Storage Environment.
PAGE 5 OF 7 - PI404MC-A8, 01-19-01
Units
V
V
ma
ma
ma
V
V
V
MHz
%
us
ms
o
C
Switching Characteristics (25°C)
The Switching Characteristics (25°C) for the I/O clocks are shown in the diagram below. For the
timing symbol definitions see the following table below the timing diagram.
tw
to
CP
tprh
tdh
SP
tdl
tds
Vout
tsh
MODULE TIMING DIAGRAM
FIGURE 3
Item
Clock cycle time
Clock pulse width
Clock duty cycle
Prohibit crossing time of
Start Pulse(1)
Data setup time
Data hold time
Signal delay time
Signal settling time
Symbol
to
tw
Min.
tprh
1.0
250
25
0
tds
tdh
tdl
tsh
20
0
20
100
Typical
Max.
4.0
75
Units
µs
ns
%
ns
ns
ns
ns
ns
Table 6. Timing Symbol’s Definition and Timing Values.
Note:
(1) "Prohibit crossing of start pulse" is to indicate that the start pulse should not be active
high between any two consecutive high going clock pulse or two consecutive low going
clock pulses. See the timing diagram. Only one high going clock under the active high
start pulse initiates the internal shift register, and it must not be active over two high
going clocks. All low going clock pulses will not initiate the shift register, but to ensure
that the start pulse will not be actively high during two consecutive high going clocks, the
circuit should be design to keep the start pulse active only for one low going clock cycle.
PAGE 6 OF 7 - PI404MC-A8, 01-19-01
Mechanical Structure of the Module
An isometric overview drawing of the PI404MC-A8 Module’s housing is shown in the
Figure 4. Housing Outline. These modules is supplied with plastic end caps, how ever, for
compactness in the installation of these module the end caps can be removed, providing
internal to the housing the modules are kept dark with no external light leakage.
mm
18
m
.0m
70
B
PC
mm
19
1
pin
mm
13
in
8-pr
m
5m ecto
1.2 onn
c
e
ac
urf
s
ss
gla
Figure 4. PI404MC-A8 Module Housing Module
Although the standard modules comes with connector pins extruding to the sides as shown, a
straight pinned socket can be installed into the PCB with its pins extruding directly up from its
mount PCB. However, it must be requested upon ordering of the modules, otherwise the standard
configuration will be shipped.
For module design-in, a detail drawing is available upon request.
©2001 Peripheral Imaging Corporation. Printed in USA. All rights reserved. Specifications
are subject to change without notice. Contents may not be reproduced in whole or in part without
the express prior written permission of Peripheral Imaging Corporation. Information furnished
herein is believed to be accurate and reliable. However, no responsibility is assumed by Peripheral
Imaging Corporation for its use nor for any infringement of patents or other rights granted by
implication or otherwise under any patent or patent rights of Peripheral Imaging Corporation.
PAGE 7 OF 7 - PI404MC-A8, 01-19-01