SN74LVC3G07-Q1 www.ti.com.................................................................................................................................................... SCES616B – OCTOBER 2004 – REVISED APRIL 2008 TRIPLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS FEATURES 1 • • • • • • • • Qualified for Automotive Applications Supports 5-V VCC Operation Max tpd of 3.7 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Input and Open-Drain Output Accepts Voltages up to 5.5 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • • • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DCU PACKAGE (TOP VIEW) 1A 3Y 2A GND 1 8 VCC 2 7 3 6 4 5 1Y 3A 2Y See mechanical drawing for dimensions. DESCRIPTION/ORDERING INFORMATION This triple buffer/driver is designed for 1.65-V to 5.5-V VCC operation. The output of the SN74LVC3G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 125°C (1) (2) (3) VSSOP – DCU ORDERABLE PART NUMBER Reel of 3000 SN74LVC3G07QDCURQ1 TOP-SIDE MARKING (3) C07_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site. FUNCTION TABLE (EACH BUFFER/DRIVER) INPUT A OUTPUT Y H H L L 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2008, Texas Instruments Incorporated SN74LVC3G07-Q1 SCES616B – OCTOBER 2004 – REVISED APRIL 2008.................................................................................................................................................... www.ti.com LOGIC DIAGRAM (POSITIVE LOGIC) 1A 2A 3A 1 7 3 5 6 2 1Y 2Y 3Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.5 V (2) (3) VO Voltage range applied to any output in the high or low state 6.5 V IIK Input clamp current VI < 0 –0.5 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range (1) (2) (3) (4) 2 –65 ±100 mA 227 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC3G07-Q1 SN74LVC3G07-Q1 www.ti.com.................................................................................................................................................... SCES616B – OCTOBER 2004 – REVISED APRIL 2008 Recommended Operating Conditions (1) VCC Operating Supply voltage MAX 1.65 5.5 Data retention only 1.5 VCC = 2.3 V to 2.7 V High-level input voltage 1.7 VCC = 3 V to 3.6 V 0.7 × VCC 0.35 × VCC VCC = 1.65 V to 1.95 V Low-level input voltage V V 2 VCC = 4.5 V to 5.5 V VIL UNIT 0.65 × VCC VCC = 1.65 V to 1.95 V VIH MIN VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 V 0.3 × VCC VCC = 4.5 V to 5.5 V VI Input voltage 0 5.5 V VO Output voltage 0 5.5 V VCC = 1.65 V 4 VCC = 2.3 V IOL Low-level output current Δt/Δv 8 16 VCC = 3 V Input transition rise or fall rate VCC = 4.5 V 32 VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 VCC = 5 V ± 0.5 V TA ns/V 5 Operating free-air temperature (1) mA 24 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 100 µA VOL MAX IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 16 mA 3V 0.4 TA = –40°C to 85°C TA = –40°C to 85°C TA = 125°C VI = 5.5 V or GND VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND Ci VI = VCC or GND 0.55 3V TA = 125°C Ioff (1) TYP (1) 0.1 IOL = 32 mA A inputs MIN 1.65 V to 5.5 V IOL = 24 mA II VCC UNIT V 0.6 0.55 4.5 V 0.65 0 to 5.5 V ±5 µA 0 ±10 µA 1.65 V to 5.5 V 10 µA 500 µA 3 V to 5.5 V 3.3 V 3.5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC3G07-Q1 Submit Documentation Feedback 3 SN74LVC3G07-Q1 SCES616B – OCTOBER 2004 – REVISED APRIL 2008.................................................................................................................................................... www.ti.com Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) A Y tpd VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V MIN MAX 1.5 7.8 MIN MAX 1 4.3 VCC = 3.3 V ± 0.3 V MIN MAX 1.1 3.7 VCC = 5 V ± 0.5 V MIN MAX 1 2.9 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance Submit Documentation Feedback TEST CONDITIONS f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 3 3 4 5 UNIT pF Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC3G07-Q1 SN74LVC3G07-Q1 www.ti.com.................................................................................................................................................... SCES616B – OCTOBER 2004 – REVISED APRIL 2008 PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) RL S1 tPZL (see Notes E and F) VLOAD tPLZ (see Notes E and G) VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns VCC VCC 3V VCC VCC/2 VCC/2 1.5 V VCC/2 VLOAD CL 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF RL V∆ 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu th VI VM Input VM VM Data Input 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPHL tPLH VOH VM Output VM VOL tPHL tPLH VOH Output VI VM VM VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VI Output Control Output Waveform 1 S1 at VLOAD (see Note B) Output Waveform 2 S1 at VLOAD (see Note B) VM VM 0V tPZL tPLZ VLOAD/2 VM tPZH VOL + V∆ VOL tPHZ VM VLOAD/2 - V∆ VLOAD/2 ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms Copyright © 2004–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC3G07-Q1 Submit Documentation Feedback 5 PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty CLVC3G07QDCURG4Q1 PREVIEW US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC3G07QDCURQ1 ACTIVE US8 DCU 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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