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Publication Date : Oct. 2001 Revision : 1.5 ESMT "#2'2* *Note 1 1)Read interrupted by Read (BL=4) CLK CMD RD RD ADD A B QA0 DQ(CL2) DQ(CL3) QB0 QB1 QB2 QB3 QA0 QB0 QB1 QB2 QB3 t CC D *Note 2 2)Write interrupted by(Block) Write (BL=2) 3)Write interrupted by Read (BL=2) CLK CMD WR tC CD ADD WR WR A BW tCCD * Note 2 A B WR RD tC CD * Note 2 A B * Note 2 B *Note 4 DQ DA0 DB0 DB1 tCDL D C 0 Pi xe l t CDL *N ot e 3 * N ot e 3 DQ(CL2) DA0 DQ(CL3) DA0 DB0 DB1 DB0 DB1 tCDL * N ot e 3 4)Block Write to Block Write CLK CMD NOP BW BW Note 7 ADD A X B Note 4 DQ Pi xel Pi xe l t BWC *Note 6 FB56K9,,)%L.9"%"+%+),,('2,"+-,(+0,$'0+), 6K 9,,)%L.%+),,('2,"+ ( M,('.2,"('+ !2," 5 '(<C= 5(*(("2 )('','(<C= ?"-5?"-(! 5 ! " 56 !2,""") " :$,6(! (+( "#,%, $(,& Elite Semiconductor Memory Technology Inc. P. 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G G G G G G 8," Elite Semiconductor Memory Technology Inc. 9/@ A,6),5?, $(,&""&0,8," 9/@ 9/@ B:?<")6),/'"?, $(,&= B:?<")6),/'"?, $(,&= 9/@ 9/@ 9/@ 9/@ 9/@ B:?<")6),/'"?, $(,&= B:?<")6),/'"?, $(,&= 9/@ 9/@ 9/@ 9/@ 9/@ B:?"9'(0, B:?"9'(0, 9/@ 9/@ 9/@ B:?"9'(0, 9/@ B:?"42 "#(0, B:?"42 "#(0, 9/@ 9/@ 9/@ #!" ' ! (" 9/@ B:?"42 "#(0, B:?"42 "#(0, 9/@ 9/@ 9/@ 9/@ 9/@ B:?"9'(0, B:?"9'(0, 9/@ 9/@ 9/@ 6C6(!'',<6= C)'',<3= P. ?C?, $(,&<= ?C)?, $(,&<= Publication Date : Oct. 2001 Revision : 1.5 ESMT #01())*! FB5 ,"()$/2(( "#<"&$='),"&$%, '"& ! ('$ ),, ! 9&(+(!"% "0"'(M) "(+&("$+(!"'" ('+6.'%'"&$(0$( +(! )("0+) ".+)),(,)'.(',2,", #,,J)", B:?+(!%, $(,&"&,""'((%, $(,&+(!"'" ('+6<('?= 9&("0(+(!""' &("0(+(!(,""',,2( "#( #2(.! ! 8 8 ! 1! ! 4 0! 001 <',= G G G G G G G 9B>9* G G G G G /-"040,$"69(0, 0 G G /-"040,$"69(0, 40,$ G G 9/@ G G G 9/@ G G G G 9/@ G G G G G G B:?<("("040,$= G G G G G G G 9B>9* 6$ G G G G G /-"?2,*2"69 6(! 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Publication Date : Oct. 2001 Revision : 1.5 ESMT ),- *6 6 */- + ,!7 )/891),80 1 0 2 3 4 5 6 7 9 8 10 11 12 13 14 15 16 17 18 19 CLOCK tCL tCC HIGH CKE tRAS tRC tSH *Not e1 CS tSS tRCD tRP tSH RAS tSS tCCD tSH CAS tSS tSS tSH ADDR Ra Ca Cc Cb Rb tSH tSS *Note 2 *Note 2, 3 *Note 2, 3 BA BS BS BS A8/AP Ra *Note3 *Note 2, 3 *Not e4 BS *Note3 *Note 2 BS BS *Note 3 *Not e4 Rb tSH WE tSS *Note5 *Note 5 *Note 6 DSF tSS tSH tSH tSS DQM tRAC tSH tSAC Qa DQ tSLZ Db Qc tSS tOH tSHZ Row Active Rea d ( W r i te per B i t Enable or Disable) W rite or Block W rite Read Precharge Row Act ive (W r ite Per Bit E nable or D is abl e ) :Don't Care Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT G@H," < # %7%%% % (+3/ +" 6 "#74('8," 6(! 6(!6 %0 "." ? 6 :%,(" *"(+()%, $(,&.(#+(!( "#('0+), *"(+()%, $(,&.(#+(!6( "#('0+), /(+()%, $(,&.%, $(,&+(!('0+), /(+()%, $(,&.%, $(,&+(!6('0+), -"." +"%% ? 6 G ?, $(,& 6(! 6(!6 6$6(! : 4&+0 #8!"3 6 * :%,(" 6(!,2( "#.'"(+2,"%,+"0) "0,+(! 6(!,2( "#.(+2,"%,+"0) "0,+(! 6(!6,2( "#.'"(+2,"%,+"0) "0,+(!6 6(!6,2( "#.(+2,"%,+"0) "0,+(!6 K+ #8 * :%,(" B,(2," 6 !2," Elite Semiconductor Memory Technology Inc. "") " P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *5 /- + ):7),8; 0 1 2 3 4 5 6 9 8 7 10 11 12 13 15 16 17 Db1 Db2 Db3 14 18 19 CLOCK HIGH CKE *Note1 tRC CS tRCD RAS *Note 2 CAS Ra ADDR Rb Ca0 Cb0 BA A8 /A P Ra Rb WE DSF DQ M tOH DQ CL=2 Q a0 Q a1 Q a2 Q a3 Db0 tRAC *Note3 tSAC tSHZ tRDL *Not e 4 tO H CL = 3 Q a0 Qa1 Q a2 Q a3 Db0 Db1 tRAC *Not e 3 Row Active ( A- Ban k ) Read (A-Bank) Precharge ( A- Ban k ) Row Active ( A- B an k ) Db3 tRDL t S H Z *Note4 tSAC Db2 W rite (A- Ban k ) Precharge ( A- B an k ) :Don't Car e 1*+,2 (&%3%4*56768,+%,94,:34,;+*6*%<8,+,&+,4&'8*<,4'+*&( (*5<4,6='4>,6'&&+,443<+?349+*&'&76768,(@,&>+=ABC'8;*3+<3+;'+''C'8'?8,'D+,4*5(,&+,49 <4,6='4>,('9+C'8;*3+<3+588?, A$'D+,4D4*%+=,68*6E( (66,99+%,D4*%*5';;4,99(1F8'+,&67A!F .(3+<3+588?,A$'D+,4+=,,&;*D?349+( .GH! +388<'>,?+?349+ ?349+954'<A'4*3&;( Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT , *5 /- + ):7),8; 0 1 2 3 4 5 6 7 9 8 10 11 12 13 15 14 16 17 18 19 CLOCK HIGH CKE CS tRC D RAS *Note 2 CAS ADDR Ra C a0 Cb0 Cc0 C d0 BA A8 /A P Ra tRD L tCDL WE *Note2 DSF *Note3 *Note 1 DQM DQ CL=2 Qa0 CL = 3 Row Active ( A- B an k ) R ea d (A-Bank) Qa1 Qb0 Qb1 Dc 0 Dc1 Dd0 D d1 Qa0 Qa1 Qb0 Dc0 Dc 1 Dd0 D d1 R ea d (A-Bank) W rite (A- Ban k ) W rite (A- Ban k ) Precharge ( A- Ban k ) :Don't Care F B 5 A 2," '(( +0, +), ,(' '. * $)' + (,' $, %,", 2," (' (#"' +) " 42%, $(,&2"",,)%2,""&('(("%). +0,42%, $(,&.2"+2," * $)' (! "#("' "%) '(( %, $(,& (' 2$ (,"& %, $(,& +0, ' 0 +), 9%)'(((0,42%, $(,& 2"+(!'",( Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT -(: /-3( ,! 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS *Note4 ADDR RAa CAb CAa RBa CBa CBb BA A8 /AP RAa RBa WE DSF *Note2 tBWC DQM *Note3 *Note1 Pixel Mask Pixel Mask DQ Row Ac t i ve w i t h W rite-per- Bit Enable ( A- Ba nk ) Mas ked Block W rite ( A- Ban k ) P ixe l Mask Row Active ( B- B an k ) Masked Block W rite with Auto Pr echarge (A-Bank) Pixel Mask Bl ock W r i t e w i t h Auto Pr echar ge ( B- Bank) Bl oc k W r i t e ( B- Ban k ) :Don't Car e FB5)(!<*"C5(!.*"C5B(!= 56 !8," " 6 !8,". ' $)'+"B:? :$,6(! (+( "#,%, $(,& 6 !8,"(,"&,' Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT )*-(:<(+ - 7),8; 0 1 2 3 4 5 6 7 9 8 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS *Not e1 RBa CBa CAa RBa CBa RAa CAa RBa CBa A6 RAa CAa RBa CBa A8/AP RAa A0- 2 RAa A3 ,4 ,7 , 8 RAa A5 RBa BA WE DSF DQM DQ Col or I/O Mask Load Color Register Load M as k Register Row Active with W PB* Enable ( A -B an k ) P ixe l Mask I/O Mask Col or DBa0 DBa1 DBa2 DBa3 Row Ac tive Load Color with W PB* Regist er En able Masked Masked W rite (B-Ban k) Bloc k W r ite with Aut o (A - B an k ) Pr ech arge Load M as k Regi st er (B-Bank) W P B * : W r i t e- P er- B i t :D on' t Care FB5$- !0% "(',&", ('.2 ('"%"+ Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT , */- 22) ):7),8; 1 0 2 3 4 6 5 7 9 8 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE *Note1 ` CS RAS *No te2` CAS ADDR RAa CAa RBb CAc CBb CBd CAe BA A8/AP RAa RBb WE DSF LOW DQM DQ CL=2 Q Aa 0 QAa1 QAa 2 QAa3 QBb0 QBb1 QBb 2 QBb 3 Q A c 0 QA c 1 QBd 0 QBd1 Q Ae 0 Q Ae 1 QAa 0 QAa1 Q Aa 2 Q Aa 3 QBb0 QBb 1 Q Bb 2 QBb 3 Q A c 0 QA c 1 QBd 0 QBd1 Q Ae 0 QAe 1 CL = 3 Row Active ( A- Ban k) Row Active ( B- Ban k) Read (A- Bank ) Read (B- Bank ) R ead (B- Ban k) Read (A- Ban k ) Precharge ( A- Ban k) Read (A- Bank ) :Don't Care FB5 (+'H (,2$ 4 . (' 8/ (,$"&$($ !$"&$&"&'& A",,)%(+),,('+,2%, $(,&.+$$,('('$%, $(,&+(!)+$( Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT , /- 22) ):7),8; 0 1 2 3 4 5 6 9 8 7 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR RAa Key CAa RBb CAc CBb CBd BA A8 /AP RAa RBb tCDL WE DSF DQM DQ M ask Load Mas k Register Row Active with W rite-Per-Bit enable (A-Bank) D Aa0 DAa1 D Aa2 D Aa3 DBb0 D Bb1 DBb2 DBb3 DAc 0 DAc 1 DAc 2 D Ac 3 DBd0 DBd1 DBd2 DBd3 Row Active ( B- Ban k) W rite (B-Ban k) Masked W rite with aut o pr ec h ar g e ( A- Ban k ) Masked W rite ( A- Bank ) Elite Semiconductor Memory Technology Inc. W rite with auto P rech arge (B-Bank) :Don't Car e P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *5 /- 22) ):7),8; 0 1 2 3 4 5 6 7 9 8 10 11 12 13 CBb RAc 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR RAa CAa RBb CAc BA A8 /A P RAa RBb RAc tCDL *Note 1 WE DSF DQM DQ CL= 2 Q Aa0 QAa1 QAa2 QAa3 QAa0 QAa1 QAa 2 QAa3 CL= 3 Row Act ive (A-B an k ) Precharge ( A- B an k ) Read (A- Bank ) DBb0 DBb1 DBb2 DBb3 QAc0 QAc1 QAc2 DBb0 DBb1 DBb2 DBb3 QAc0 QAc1 W rite (B-Ban k) Row Active ( B- Ban k ) Read (A - Ban k ) Row Act ive (A -Ban k ) :Don' t Car e FB5$)'+ %2," Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *5 /-3( ,7),8; 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Db0 Db1 Db2 Db3 Db0 Db1 Db2 Db3 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR Ra Rb Ra Rb Ca Cb BA A8 /A P WE DSF DQM DQ CL= 2 Q a0 CL=3 Row Active ( A-Ban k ) Read wit h A u t o P r ec h ar g e ( A- Bank ) Row Ac t i ve (B -Ban k) Q a1 Q a2 Q a3 Q a0 Q a1 Q a2 Au ot Pr ec h ar g e St ar t Poi n t ( A- Bank ) Q a3 W ri te with Auto Pr echarge ( B- Bank) A u ot P r ec h ar g e Star t Poin t ( B- Bank ) :Don't Care FB5$)'+ ,'"") +0,",(%, $(,&(, <9$ (06),&$C7.648'('6 !2,"= Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *5 /-3( ,7),8; 0 1 2 3 4 5 6 7 9 8 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR Ra Rb Ra Rb Ca Ra Cb Ca BA A8 /A P Ra WE DSF DQM DQ CL=2 Qa0 DQ C L= 3 Row Active (A -B an k ) Qa1 Q b0 Q b1 Qa0 Qa1 Q b0 Read w it h Auto Precharge ( A- Bank) Row Act ive (B-B an k ) Db2 Qb1 Db3 Db2 Db3 Precharge ( B- B an k ) Row Ac tive (A-Bank ) Da0 Da1 Da0 Da1 W rite with Auto Preahar ge (A- Bank ) Read wit hout Aut o Pr eaharge( B- Bank ) AutoPreaharge Star t Poin t (A- Bank) :Don't Care FB58$4('<8,"= ('2"$()%, $(,&"")'(6(!(0,('66(!( "#(" 904('<8,"= ('2"$)()%, $(,&"")'(66(!+0,6(!()%, $(,&(,.6(! ()%, $(,&2"(,($- 066(!,(' ('"%)%" ( (' (+")'(6(!'),"&!(0,6(!()%, $(,&(, Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *5 /-3( ,7),8; 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Db0 Db1 Db2 Db3 Db0 Db1 Db2 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR Ra Ca Rb Cb BA A8 /A P Ra Rb WE DSF tRC D DQM DQ C L= 2 Q a0 CL= 3 Q a1 Q a2 Q a3 Q a0 Q a1 Q a2 Q a3 Db3 *Not e 1 Row Active ( A - B an k ) Read wit h Auto Pr echarge ( A- Bank) Read w it h A u ot P r ec h ar g e Au t o Pr ech ar g e St ar t Poi n t ( B- Bank ) ( A- Bank) Row Active ( B- Bank) Au ot Pr ec h ar g e St ar t Poi n t ( B- Bank) :Don't Care FB5 ('6(!"(2'"$"%,"' !"',"'0,(()%, $(,&(,%" Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT 0 1 2 3 4 5 6 7 8 9 11 10 12 13 14 15 16 17 19 18 CLOCK HIGH CKE CS RAS CAS ADDR RAa CAa CAb *Not e 1 *Not e 1 BA A8 /A P RAa WE DSF DQM *N ot e 2 1 Q Aa 0 Q A a 1 Q A a 2 Q A a 3 Q A a 4 DQ CL= 2 2 QAa0 QAa1 QAa2 QAa3 QAa4 CL=3 Row Active ( A-Ban k ) Read ( A- Ba n k ) Burst Stop 1 DAb0 DAb1 DAb2 DAb3 DAb4 DAb5 2 DAb0 DAb1 DAb2 DAb3 DAb4 DAb5 Read ( A- Ba n k ) Pr echar ge ( A- Ban k ) :Don't Care FB50)%(&'.+),"2(,%(,)'($'0+),()%, $(,&""%"+ +)$#("'*H(0,+),%.""(($ (0 4 ",,)% 6$ ((,"),('(+#""&'"(&,($(+.$ 6)(+),2,".6),%(' 4 ",,)%$)'+ %(,' (,0) 40,$""&'"(&,(0K)%(&2,"+),% L 6),%"#("'(0)%(&' Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT 0 1 2 3 4 5 6 7 9 8 10 11 12 13 14 15 16 17 18 19 CLOCK HIGH CKE CS RAS CAS ADDR RAa CAa CAb *Note1 *Note1 BA A8 /AP RAa tRD L tBDL WE DSF *Note3 DQM *Note2 DAa0 DAa1 DAa2 DAa3 DAa4 DQ Row Active ( A- B an k ) W rite (A-Ban k) DAb0 DAb1 DAb2 DAb3 DAb4 DAb5 Burst Stop W rite (A-Bank) Precharge ( A- Ban k ) :Don't Care FB5 0)%(&'.+),"2(,%(,)'($'0+),()%, $(,&""%"+ *(("($ 0+),% (' (+2,""$ ,,%'"&, 9"'0"'+%(,(,0<C= *(("($ ",,)%'+%, $(,& (+2,""$ ,,%'"&, 9"'0"'+%(,(,0<C= *(2,"",,)%'+%, $(,& ('"''),0 *$)'(!"#("'"%)'((%, $(,& (' 2$(,"&%, $(,&+0,'0+), 9%)'(((0,42%, $(,& 2"+(!'",( 6),%"#("'(0)%(&+),&$ Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT *),-= /-7),8.1 1 0 2 3 4 6 5 7 8 9 10 11 12 13 14 15 16 17 18 19 CLOCK *Not e 1 HIGH CKE CS RAS *Not e 2 CAS ADDR RAa CAa RB b CAb RAb CBc CAd BA A8 /A P RAa RAc RB b WE DSF DQM DQ C L= 2 QAa0 CL= 3 QAa0 Row Active ( A - B an k ) DAb0 DAb1 Row Ac ti ve ( B- Ban k) W rite (A- Ban k ) DAd0 DAd1 DBc 0 DAb0 DAb1 DAd0 DAd1 DBc 0 Row Active ( A- B an k ) Rea d (A - Ban k ) Precharge ( A- B an k ) W r i t e wi t h Auto Pr echarge ( B- Bank) R ea d w i t h Au t o Pr ec h ar g e ( A- Bank ) :Don't Care FB5 648'"(+'+"&EK"&$L(4<'4&",= $648'.$+),&$(2,""0"-'KL,&(,'0%,&,('+),&$ 8$6482," ('2"$()%, $(,&"- )'.!%"""'$( $)'+#"(' )%, $(,&"- )'($+),' ."$ (06482," (' A$- "((,$%, $(,& 8?60) ""(%"+(648' Elite Semiconductor Memory Technology Inc. P. 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Publication Date : Oct. 2001 Revision : 1.5 ESMT -22)/5>/- 1 0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 CLOCK *N ot e 2 *N ot e 1 CKE tRCmi n *N ot e 4 tSS *Not e 3 *N ot e 6 tSS *Not e 5 CS RAS *N ot e 7 *N ot e 7 CAS ADDR BA A8 /A P WE DSF DQM DQ Hi-Z Hi-Z Sel f R ef r esh En tr y S e l f R e f r e s h E xi t Auto Ref r es h :Don't Care FB5A:/BA/4/4/4/:*/ . 4 7 2"$/$)'+2($( ! 0, ! .($"%)" )'"&$ ! (+'H (,- %0,/ A$'#" ,(""0,0,$'(&(/(K2L 0=: $'#" ,0,0,$'"") ",J)",'+0,-"0,0,0,$ A:/G9A/4/4/:*/ !,(,('+(++0,,),"&/$"&$ (,0,$"&$ "")",J)",'(0,/&"&$"&$ %0,0,$-" 0+),(),0,$",J)",'+0,0,0,$,('(0,0,0,$-" "0$)+),,0,$ Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT (*,/- 0 1 2 3 4 (2/- 5 6 0 1 2 3 4 5 6 7 8 9 10 CLOCK HIGH HIGH CKE CS *N ot e 2 tRC RAS *Note 1 CAS *N ot e 3 ADDR Key Ra WE DSF DQM DQ Hi-Z MRS New Com man d Hi-Z Auto Ref res h New C om m an d :Don't Care F6$+(!%, $(,&$)'+ %''4&", ('(),0,$ :*/4/@9A/4/AQ/ FB5 . 4 . 7 8/ ( "#("('*02($( ! 2"$('',!2"",(' ,&", "") ! $)'++0,2 4 ( "#(" ?(,0,'4&",(+ Elite Semiconductor Memory Technology Inc. P. Publication Date : Oct. 2001 Revision : 1.5 ESMT ++ θ ++ ! " , / " 0 0, , , θ > 0 % .--/(- /)(- /7*-//- -+-,,- -//--- //-- /.-,77-- /---- /-,-,*--- ,*/-- ,*.-,7-- ,.--- ,.,--)(- -+-- -7(,)--1 -)(-1 -° ° --+- > 06 ! " 0 % % -,. ,/--,- , --( -,-. -,,* / -7( ,----+* --,( " -// -/ -+ ---. ---7 --7 -/-7-) -7, -7/, 0 //7( //- /.( -*+ -*+* -*7, 0, ,77- /--- /-,-))7 -)** -)+( ,)7( ,*/- ,*.( -(.* -((, -((( , ,7- ,.-- ,.,--/) --, --* -)( -+-7( --)1 , ,)-1 --/)1 -)(2! -° θ -° ( ° ° ° --- --+ Elite Semiconductor Memory Technology Inc. P. 06 % --.* ---/ --* --7 ---7 --, --,( --( ---+ -7-. -7, -7/ -*+ -*+* -*7, -))* -)** -)+* -(.* -((, -((( --/) --, --* --)1 --/)2! -° ( ° ° --- Publication Date : Oct. 2001 Revision : 1.5