SG1526B/SG2526B/SG3526B REGULATING PULSE WIDTH MODULATOR DESCRIPTION FEATURES The SG1526B is a high-performance pulse width modulator for switching power supplies which offers improved functional and electrical characteristics over the industry-standard SG1526. A direct pin-for-pin replacement for the earlier device with all its features, it incorporates the following enhancements: a bandgap reference circuit for improved regulation and drift characteristics, improved undervoltage lockout, lower temperature coefficients on oscillator frequency and current-sense threshold, tighter tolerance on softstart time, much faster SHUTDOWN response, improved double-pulse supperession logic for higher speed operation, and an improved output driver design with low shoot-through current, and faster rise and fall times. This versatile device can be used to implement single-ended or push-pull switching regulators of either polarity, both transformer-less and transformer-coupled. The SG1526B is specified for operation over the full military ambient temperature range of -55°C to 150°C. The SG2526B is characterized for the industrial range of -25°C to 150°C, and the SG3526B is designed for the commercial range of 0°C to 125°C. • • • • • • • • • • • • • • • • • 8 to 35 volt operation 5V low drift 1% bandgap reference 1Hz to 500KHz oscillator range Dual 100mA source/sink Digital current limiting Double pulse suppression Programmable deadtime Improved undervoltage lockout Single pulse metering Programmable soft-start Wide current limit common mode range TTL/CMOS compatible logic ports Symmetry correction capability Guaranteed 6 unit synchronization Shoot thru currents less than 100mA Improved shutdown delay Improved rise and fall time HIGH RELIABILITY FEATURES - SG1526B ♦ Available to MIL-STD-883 ♦ MIL-M38510/12603BVA - JAN1526BJ ♦ Radiation data available ♦ LMI level "S" processing available BLOCK DIAGRAM VREF +VIN Reference Regulator +VC Undervoltage Lockout GROUND To Internal Circuitry RD RT SYNC Oscillator OUTPUT A CT RESET CSOFTSTART COMPENSATION Soft Start S +VIN R Q T S + ERROR Q D Amp Q MEMORY F/F Q TOGGLE F/F Q — ERROR OUTPUT B METERING F/F + C.S. — C.S. SHUTDOWN LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 1 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B ABSOLUTE MAXIMUM RATINGS (Note 1) (Note 1) Input Voltage (VIN ) ............................................................... 40V Collector Supply Voltage (VC) ............................................. 40V Logic Inputs ......................................................... -0.3V to 5.5V Analog Inputs .......................................................... -0.3V to V IN Source/Sink Load Current (each output) ....................... 200mA Reference Load Current .................................................. 50mA Logic Sink Current ........................................................... 15mA Operating Junction Temperature Hermetic (J, L Packages) ............................................. 150°C Plastic (N, DW Packages) ............................................ 150°C Storage Temperature Range ............................ -65°C to 150°C Lead Temperature (Soldering, 10 Seconds) ................... 300°C Note 1. Exceeding these ratings could cause damage to the device. THERMAL DATA J Package: Thermal Resistance-Junction to Case, θ JC .................. 25°C/W Thermal Resistance-Junction to Ambient, θ JA .............. 70°C/W N Package: Thermal Resistance-Junction to Case, θ JC .................. 30°C/W Thermal Resistance-Junction to Ambient, θ JA ............. 60°C/W DW Package: Thermal Resistance-Junction to Case, θ JC .................. 35°C/W Thermal Resistance-Junction to Ambient, θ JA ............. 90°C/W L Package: Thermal Resistance-Junction to Case, θ JC ................... 35°C/W Thermal Resistance-Junction to Ambient, θ JA ........... 120°C/W Note A. Junction Temperature Calculation: TJ = TA + (PD x θJA). Note B. The above numbers for θ JC are maximums for the limiting thermal resistance of the package in a standard mounting configuration. The θ JA numbers are meant to be guidelines for the thermal performance of the device/pcboard system. All of the above assume no ambient airflow. RECOMMENDED OPERATING CONDITIONS (Note 2) Input Voltage ............................................................. 8V to 35V Collector Supply Voltage ........................................ 4.5V to 35V Sink/Source Load Current (each output) ................ 0 to 100mA Reference Load Current ........................................... 0 to 20mA Oscillator Frequency Range .............................. 1Hz to 500KHz Oscillator Timing Resistor .................................. 2KΩ to 150KΩ Oscillator Timing Capacitor ............................... 470pF to 20µF Available Deadtime Range at 40KHz ...................... 5% to 50% Operating Junction Temperature Range: SG1526B ....................................................... -55°C to 125°C SG2526B ......................................................... -25°C to 85°C SG3526B ............................................................ 0°C to 70°C Note 2. Range over which the device is functional. ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1526B with -55°C ≤ T A ≤ 125°C, SG2526B with -25°C ≤ TA ≤ 85°C, SG3526B with 0°C ≤ TA ≤ 70°C, and VIN = 15V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter Reference Section (Note 3) Output Voltage Line Regulation Load Regulation Temperature Stability (Note 9) Total Output Voltage Range (Note 9) Short Circuit Current Undervoltage Lockout Section RESET Output Voltage RESET Output Voltage Test Conditions TJ = 25°C VIN = 8 to 35V IL = 0 to 20mA Over Operating TJ VREF = 0V 4.95 5.00 5.05 4.90 5.00 5.10 20 10 10 7 10 20 10 25 50 15 50 15 4.90 5.00 5.10 4.85 5.00 5.15 25 50 125 25 50 125 VREF = 3.8V VREF = 4.8V 2.4 0.2 4.8 0.4 2.4 0.2 4.8 LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 SG1526B/2526B SG3526B Units Min. Typ. Max. Min. Typ. Max. 2 0.4 V mV mV mV V mA V V Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B ELECTRICAL CHARACTERISTICS (continued) Parameter Oscillator Section (Note 4) Initial Accuracy Voltage Stability Temperature Stability (Note 9) Minimum Frequency (Note 9) Maximum Frequency Sawtooth Peak Voltage Sawtooth Valley Voltage SYNC Pulse Width Error Amplifier Section (Note 5) Input Offset Voltage Input Bias Current Input Offset Current DC Open Loop Gain High Output Voltage Low Output Voltage Common Mode Rejection Supply Voltage Rejection PWM Comparator Section (Note 4) Minimum Duty Cycle Maximum Duty Cycle Test Conditions TJ = 25°C VIN = 8 to 35V Over Operating TJ RT = 150KΩ, CT = 20µF RT = 2KΩ, CT = 470pF VIN = 35V VIN = 8V RL = 2.0KΩ to VREF 500 2.5 0.5 RS ≤ 2KΩ RL ≥ 10MΩ VPIN1 - VPIN2 ≥ 150mV, ISOURCE = 100µA VPIN2 - VPIN1 ≥ 150mV, ISINK = 100µA RS ≤ 2KΩ VIN = 8V to 35V 70 66 45 ±8 1.0 10 1.0 3.0 1.0 1.0 3.5 1.1 2 500 2.5 0.5 5 2 -350 -1000 35 100 72 60 4.2 3.6 0.2 0.4 94 70 80 66 ±3 0.5 3 ±8 1.0 5 1.0 3.0 1.0 1.0 3.5 1.1 2 2 10 -350 -2000 35 200 72 4.2 0.2 0.4 94 80 49 0 45 49 % % % Hz KHz V V µs mV nA nA dB V V dB dB % % 2.4 4 0.2 0.4 -125 -200 -225 -360 200 2.4 4 0.2 0.4 -125 -200 -225 -360 200 V V µA µA ns 90 100 -3 110 -10 400 80 100 -3 120 -10 400 mV µA ns 0.1 100 0.4. 150 0.1 100 0.4. 150 V µA 12.5 13.5 12.5 13.5 12 13 12 13 0.2 0.3 0.2 0.3 2 1.2 1.2 2 50 150 50 150 0.3 0.4 0.3 0.4 0.1 0.15 0.1 0.15 V V V V µA µs µs 50 18 IL = 0mA FOSC = 40KHz (RT = 4.12KΩ ±1%, CT = .01µF ±1%, RD = 0Ω) VCM = 0 to 5.2V VCM = 0 to 12V 30 50 18 30 mA Note 7. VC = 15V Note 8. VIN = 35V Note 9. These parameters, although guaranteed over the recommended operating conditions, are not tested in production. LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 64 3.6 ±3 0.5 7 0 VCOMPENSATION = 0.4V VCOMPENSATION = 3.6V Digital Ports (SYNC, SHUTDOWN, and RESET) HIGH Output Voltage ISOURCE = 40µA LOW Output Voltage ISINK = 3.6mA VIH = 2.4V HIGH Input Current VIL = 0.4V LOW Input Current (Note9) SHUTDOWN Delay to Output Current Limit Comparator Section (Note 6) Sense Voltage RS ≤ 50Ω Input Bias Current Delay to Output (Note 9) Soft-Start Section Error Clamp Voltage RESET = 0.4V CS Charging Current RESET = 2.4V Output Drivers (each output) (Note 7) HIGH Output Voltage ISOURCE = 20mA ISOURCE = 100mA LOW Output Voltage ISINK = 20mA ISINK = 100mA Collector Leakage VC = 40V Rise Time CL = 1000pF Fall Time CL = 1000pF Power Consumption Section (Note 8) Standby Current SHUTDOWN = 0.4V Note 3. Note 4. Note 5. Note 6. SG3526B SG1526B/2526B Units Min. Typ. Max. Min. Typ. Max. 3 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B CHARACTERISTIC CURVES FIGURE 1. REFERENCE VOLTAGE VS. SUPPLY VOLTAGE FIGURE 2. REFERENCE TEMPERATURE STABILITY FIGURE 3. REFERENCE SHORT CIRCUIT FIGURE 4. REFERENCE RIPPLE REJECTION FIGURE 5. UNDER VOLTAGE LOCKOUT FIGURE 6. ERROR AMPLIFIER OPEN LOOP GAIN VS. FREQUENCY FIGURE 7. SOFTSTART TIME CONSTANT VS. CS FIGURE 8. CURRENT LIMIT TRANSFER FUNCTION FIGURE 9. COMPARATOR INPUT TO DRIVER OUTPUT DELAY LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 4 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B CHARACTERISTIC CURVES (continued) FIGURE 10. STANDBY CURRENT VS. SUPPLY VOLTAGE FIGURE 11. OUTPUT DRIVER DEADTIME VS. CT VALUE FIGURE 12. OUTPUT DRIVER DEADTIME VS. RD VALUE FIGURE 13. SUPPLY CURRENT VS. OUTPUT FREQUENCY FIGURE 14. SUPPLY CURRENT VS. OUTPUT FREQUENCY FIGURE 15. SUPPLY CURRENT VS. OUTPUT FREQUENCY FIGURE 16. OSCILLATOR FREQUENCY TEMPERATURE STABILITY FIGURE 17. OUTPUT DRIVER SATURATION VOLTAGE FIGURE 18. SHUTDOWN INPUT TO DRIVER OUTPUT DELAY LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 5 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B CHARACTERISTIC CURVES (continued) FIGURE 19. OSCILLATOR PERIOD VS. RT AND CT APPLICATION INFORMATION VOLTAGE REFERENCE The reference regulator of the SG1526B is a “band-gap” type; that is, the precision +5 volt output is derived from the very predictable base-emitter voltage of an NPN transistor. Since this is a sub-surface phenomenon, the resulting output exhibits excellent stability compared to earlier surface-breakdown zener designs. The reference output is stabilized at input voltages as low as +8 volts, and can provide up to 20mA of load current to external circuitry. An external PNP transistor can be used to boost the available current to many hundreds of mA. A rugged low-frequency audiotype transistor should be used, and lead lengths between the PWM and transistor should be as short as possible to minimize the risk of oscillation. FIGURE 20. EXTENDING REFERENCE OUTPUT CURRENT UNDERVOLTAGE LOCKOUT The undervoltage lockout circuit protects the SG1526B and the power devices it controls from inadequate supply voltage. If +VIN is too low, the circuit disables the output drivers and holds the RESET pin LOW. This prevents spurious output pulses while the control circuitry is stabilizing, and holds the soft-start timing capacitor in a discharged state. The circuit consists of a merged bandgap reference and comparator circuit which is active when the reference voltage has risen to 2VBE or 1.2 volts at 25oC. When the reference voltage rises to approximately +4.4 volts, the circuit enables the output drivers and releases the RESET pin, allowing a normal softstart. The comparator has 200mV of hysteresis to minimize oscillation at the trip point. When +VIN to the PWM is removed and the reference drops to +4.2 volts, the undervoltage circuit pulls RESET LOW again. The soft-start capacitor is immediately discharged, and the PWM is ready for another soft-start cycle. The SG1526B can operate from a +5 volt supply regulated to within ±4% by connecting the VREF pin to the +VIN pin. FIGURE 21. SIMPLIFIED UNDERVOLTAGE LOCKOUT SOFT-START CIRCUIT The soft-start circuit protects the power transistors and rectifier diodes from high current surges during power supply turn-on. When supply voltage is first applied to the SG1526B, the undervoltage lockout circuit holds RESET LOW with Q3. Q1 is turned on, which holds the soft-start capacitor voltage at zero. The second collector of Q1 clamps the output of the error amplifier to ground, guaranteeing zero duty cycle at the driver outputs. When the supply voltage reaches normal operating range, RESET will go HIGH. Q1 turns off, allowing the internal 100µA current source to charge CS. Q2 clamps the error amplifier output to 1.0 VBE above the voltage on CS. As the soft-start voltage ramps up to +5 volts, the duty cycle of the PWM linearly increases to whatever value the voltage regulation loop requires for an error null. Figure 7 gives the timing relationship between CS ramp time to 100% duty cycle. LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 FIGURE 22. SOFT-START CIRCUIT SCHEMATIC 6 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B APPLICATION INFORMATION (continued) DIGITAL CONTROL PORTS The three digital control ports of the SG1526B are bidirectional. Each pin can drive TTL and 5 volt CMOS logic directly, up to a fan-out of 10 low-power Schottky gates. Each pin can also be directly driven by open-collector TTL, open-drain CMOS, and open-collector voltage comparators, fan-in is equivalent to 1 low-power Schottky gate. Each port is normally HIGH; the pin is pulled LOW to activate the particular function. Driving SYNC LOW initiates a discharge cycle in the oscillator. Pulling SHUTDOWN LOW immediately inhibits all PWM output pulses. Holding RESET LOW discharges the soft-start capacitor. The logic threshold is +1.1 volts at +25oC. Noise immunity can be gained at the expense of fan-out with an external 2K pull-up resistor to +5 volts. FIGURE 23 DIGITAL CONTROL PORT SCHEMATIC OSCILLATOR The oscillator is programmed for frequency and dead time with three components: RT CT, and RD. Two waveforms are generated: a sawtooth waveform at pin 10 for pulse width modulation, and a logic clock at pin 12. The following procedure is recommended for choosing timing values: 1. With RD = 0Ω (pin 11 shorted to ground) select values for RT and CT from Figure 19 to give the desired oscillator period. Remember that the frequency at each driver output is half the oscillator frequency, and the frequency at the +VC terminal is the same as the oscillator frequency. 2. If more dead time is required, select a larger value of RD using Figure 14 as a guide. At 40 KHz dead time increases by 300 ns/Ω. 3. Increasing the dead time will cause the oscillator frequency to decrease slightly. Go back and decrease the value of RT slightly to bring the frequency back to the nominal design value. The SG1526B can be synchronized to an external logic clock by programming the oscillator to free-run at a frequency 10% slower than the sync frequency. A periodic LOW logic pulse approximately 0.5 µSec wide at the SYNC pin will then lock the oscillator to the external frequency. Multiple devices can be synchronized together by programming one master unit for the desired frequency, and then sharing its sawtooth and clock waveforms with the slave units. All CT terminals are connected to the CT pin of the master, and all SYNC terminals are likewise connected to the SYNC pin of the master. Slave RT terminals should not be left open; at least 50K should be connected from each pin to ground. Slave RD terminals may be either left open or grounded. FIGURE 24. OSCILLATOR CONNECTIONS ANDD WAVEFORMS ERROR AMPLIFIER The error amplifier is a transconductance design, with an output impedance of 2 megohms. Since all voltage gain takes place at the output pin, the open-loop gain/frequency characteristics can be controlled with shunt reactance to ground. When compensated for unity-gain stability with 100 pF, the amplifier has an open-loop pole at 400 Hz. The input connections to the error amplifier and determined by the polarity of the switching supply output voltage. For positive supplies, the common-mode voltage is +5.0 volts and the feedback connections in Figure 25A are used. With negative supplies, the common-mode voltage is ground and the feedback divider is connected between the negative output and the +5.0 volt reference voltage, as shown in Figure 25B. (A) FIGURE 25. ERROR AMPLIFIER CONNECTIONS LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 (B) 7 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B APPLICATION INFORMATION (continued) OUTPUT DRIVERS The totem-pole output drivers of the SG1526B are designed to source and sink 100mA continuously and 200mA peak. Loads can be driven either from the output pins 13 and 16, FIGURE 26. PUSH-PULL CONFIGURATION or from the +VC pin, as required. Curves for the saturation voltage at these outputs as a function of load current are found in Figure 17. FIGURE 27. SINGLE-ENDED CONFIGURATION FIGURE 28. DRIVING N-CHANNEL POWER MOSFETS SG1526B LAB TEST FIXTURE LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 8 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570 SG1526B/SG2526B/SG3526B CONNECTION DIAGRAMS & ORDERING INFORMATION Package 18-PIN CERAMIC DIP J - PACKAGE Part No. Ambient Temperature Range SG1526BJ/883B JAN1526BJ SG1526BJ/DESC SG1526BJ SG2526BJ SG3526BJ -55°C to 125°C -55°C to 125°C -55°C to 125°C -55°C to 125°C -55°C to 125°C 0°C to 70°C 18-PIN PLASTIC DIP N - PACKAGE SG2526BN SG3526BN -25°C to 85°C 0°C to 70°C 18-PIN WIDE BODY PLASTIC S.O.I.C. DW - PACKAGE SG2526BDW SG3526BDW -25°C to 85°C 0°C to 70°C 20-PIN CERAMIC LEADLESS CHIP CARRIER L- PACKAGE SG1526BL/883B SG1526BL (See Notes Below) -55°C to 125°C -55°C to 125°C Connection Diagram + ERROR - ERROR COMPENSATION 1 18 2 17 3 16 CSOFTSTART RESET - CURRENT SENSE + CURRENT SENSE SHUTDOWN RT 4 15 5 14 6 13 7 12 8 11 9 10 VREF +VIN OUTPUT B GROUND VCOLLECTOR OUTPUT A SYNC RDEADTIME CT +ERROR -ERROR COMPENSATION CSOFTSTART RESET - CURRENT SENSE + CURRENT SENSE SHUTDOWN 1 18 2 17 3 16 4 15 5 14 6 13 7 12 8 11 RDEADTIME RT 9 10 CT 3 1. N.C. 2. +ERROR 3. -ERROR 4. COMP 5. CSOFTSTART 6. RESET 7. - C.S. 8. + C.S. 9. SHUTDOWN 10. RT 2 1 VREF +VIN OUTPUT B GROUND +VCOLLECTOR OUTPUT A SYNC 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 11. CT 12. RDEADTIME 13. SYNC 14. OUTPUT A 15. +VCOLLECTOR 16. N.C. 17. GROUND 18. OUTPUT B 19. +VIN 20. VREF Note 1. Contact factory for JAN and DESC product availability. 2. All parts are viewed from the top. LINFINITY 4/90 Rev 1.1 2/94 Copyright 1994 9 Microelectronics Inc. 11861 Western Avenue ∞ Garden Grove, CA 92841 (714) 898-8121 ∞ FAX: (714) 893-2570