SEMICONDUCTOR PV1005UDF8B TECHNICAL DATA ESD/EMI Filter APPLICATION ・I/O ESD protection for mobile handsets, notebook, PDAs, etc. ・EMI filtering for data ports in cell phones, PDAs, notebook computers C A E 1 4 G ・EMI filtering for LCD, camera and chip-to-chip data lines GND PAD F B FEATURES H Pin 1 ・EMI/RFI filtering 8 ・ESD Protection to IEC 61000-4-2 Level 4 BOTTOM VIEW TOP VIEW ・Low insertion loss ・Good attenuation of high frequency signals DIM A B C D E F G H J K L ・Low clamping voltage ・Low operating and leakage current K L J ・Four elements in one package SIDE VIEW DESCRIPTION 1,8 : Filter channel 1 2,7 : Filter channel 2 3,6 : Filter channel 3 4,5 : Filter channel 4 PV1005UDF8B is an EMI filter array with electrostatic discharge (ESD) protection, which integrates four pi filters (C-R-C). These parts include ESD protection diodes on D 5 MILLIMETERS _ 0.10 1.70 + _ 0.10 1.35 + _ 0.10 1.20 + _ 0.05 0.20 + 0.40 _ 0.10 0.40 + _ 0.10 0.25 + 0.20 Min _ 0.05 0.50 + 0.127 0.02+0.03/-0.02 every pin, providing a very high level of protection for sensitive electronic components that may be subjected to electrostatic discharge. UDFN-8B The PV1005UDF8B provides the recommended line termination while implementing a low pass filter to limit EMI levels and providing ESD protection which exceeds IEC 61000-4-2 level 4 standard. The UDFN package is a very effective PCB space MARKING occupation and a very thin package (0.4mm Pitch, 0.5mm height) MAXIMUM RATING (Ta=25℃) CHARACTERISTIC SYMBOL RATING PR 100 *PD 400 Junction Temperature Tj 150 Storage Temperature Tstg DC Power Per Resistor Power Dissipation V1 UNIT mW Lot No. RECOMMENEDED FOOTPRINT (dimensions in mm) -55～150 * Total Package Power Dissipation 0.40 EQUIVALENT CIRCUIT 100Ω FILTERn* 1.66 0.55 FILTERn* 5pF 5pF 0 A Type Name 0.30 GND 0.25 0.70 GND ELECTRICAL CHARACTERISTICS (Ta=25℃) CHARACTERISTIC Reverse Stand-Off Voltage Reverse Breakdown Voltage SYMBOL TEST CONDITION VRWM VBR - MIN. TYP. MAX. UNIT - - 5 V It=1mA 6 - - V VRWM=3.3V - - 1.0 μA Cutoff Frequency fc-3dB VLine=0V, ZSOURCE=50Ω, ZLOAD=50Ω - 300 - MHz Channel Resistance RLINE Between Input and Output 80 100 120 Ω VLine=0V DC, 1MHz, Between I/O Pins and GND 12 15 18 VLine=2.5V, 1MHz, Between I/O Pins and GND 8 10 12 Reverse Leakage Current Line Capacitance 2009. 6. 3 IR CLINE Revision No : 0 pF 1/2 PV1005UDF8B ANALOG CROSSTALK S21 - FREQUENCY 0 CROSSTALK (dB) INSERTION LOSS (dB) 0 -10 -20 -30 -40 -30 -60 -90 -120 -150 1 10 100 1000 1 6000 10 6000 RLine - TEMPERATURE DIODE CAPACITANCE vs. INPUT VOLTAGE 2.0 110 108 RESISTANCE R (Ω) NORMALIZED CAPACITANCE 1000 FREQUENCY (MHz) FREQUENCY (MHz) 1.5 1.0 0.5 106 104 102 100 98 96 94 92 0.0 0 1 2 3 DIODE VOLTAGE (V) 2009. 6. 3 100 Revision No : 0 4 5 90 -40 -20 0 20 40 60 80 AMBIENT TEMPERATURE Ta ( C ) 2/2