ASM705/706/707/708 ASM813L April 2008 rev 1.6 Low Power µP Supervisor Circuits General Description Features The ASM705 / 706 / 707 / 708 and ASM813L are cost • effective CMOS supervisor circuits that monitors powersupply and battery voltage level, and µP/µC operation. • 4.40V threshold (ASM706/708) • The family offers several functional options. Each device Precision power supply monitor • 4.65V threshold (ASM705/707/813L) • generates a reset signal during power-up, power-down and Debounced manual reset input Voltage monitor • 1.25V threshold during brownout conditions. A reset is generated when • Battery monitor / Auxiliary supply monitor the supply drops below 4.65V (ASM705/707/813L) or • Watchdog timer (ASM705/706/813L) 4.40V (ASM706/708). For 3V power supply applications, • 200ms reset pulse width refer to the ASM705P/R/S/T data sheet. In addition, the • Active HIGH reset output (ASM707/708/813L) ASM705/706/813L feature a 1.6 second watchdog timer. • MicroSO package The ASM707/708 have both active-HIGH and active-LOW reset outputs but no watchdog function. The ASM813L Application has the same pin-out and functions as the ASM705 but has • an active-HIGH reset output. A versatile power-fail circuit • Portable/Battery-operated systems has a 1.25V threshold, useful in low battery detection and • Intelligent instruments for monitoring non-5V supplies. All devices have a manual • Wireless communication systems reset (MR) input. The watchdog timer output will trigger • • • PDAs and hend-held equipment a reset if connected to MR. Computers and embedded controllers Automative Systems Safety Systems All devices are available in 8-pin DIP, SO and MicroSO packages. Typical Operating Circuit PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018 www.pulsecoresemi.com Notice: The information in this document is subject to change without notice. ASM705/706/707/708 ASM813L April 2008 rev 1.6 Block Diagram Pin Configuration Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 2 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Pin Description Pin Number ASM705/706 DIP/ SO MicroSO ASM707/708 DIP/ SO MicroSO ASM813L DIP/ SO Name Function MicroSO 1 3 1 3 1 3 MR Manual reset input. The active LOW input triggers a reset pulse. A 250 µA pull-up current allows the pin to be driven by TTL/CMOS logic or shorted to ground with a switch. 2 4 2 4 2 4 VCC +5V power supply input. 3 5 3 5 3 5 GND Ground reference for all signals. 4 6 4 6 4 6 PFI 5 7 5 7 5 7 PFO 6 8 - - 6 8 WDI - - 6 8 - - NC 7 1 7 1 - - 8 2 - - 8 2 WDO - - 8 2 7 1 RESET RESET Power-fail input voltage monitor. With PFI less than 1.25V, PFO goes LOW. Connect PFI to Ground or VCC when not in use. Power-fail output. The output is active LOW and sinks current when PFI is less than 1.25V. Watchdog input. WDI controls the internal watchdog timer. A HIGH or LOW signal for 1.6sec at WDI allows the internal timer to run-out, setting WDO LOW. The watchdog function is disabled by floating WDI or by connecting WDI to a high impedance threestate buffer. The internal watchdog timer clears when: RESET is asserted; WDI is three-stated ; or WDI sees a rising or falling edge. Not Connected. Active LOW reset output. Pulses LOW for 200ms when triggered, and stays LOW whenever VCC is below the reset threshold. RESET remains LOW for 200ms after VCC rises above the reset threshold or MR goes from LOW to HIGH. A watchdog timeout will not trigger RESET unless WDO is connected to MR. Watchdog output. WDO goes LOW when the 1.6 second internal watchdog timer times-out and does not go HIGH until the watchdog is cleared. In addition, when VCC falls below the reset threshold, WDO goes LOW. Unlike RESET, WDO does not have a minimum pulse width and as soon as VCC exceeds the reset threshold, WDO goes HIGH with no delay. Active HIGH reset output. The inverse of RESET. The ASM813L only has a RESET output. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 3 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Detailed Description A proper reset input enables a microprocessor / microcontroller to start in a known state. ASM70X and ASM813L assert reset to prevent code execution errors during power-up, power-down and brown-out conditions. RESET/RESET Timing The RESET/RESET signals are designed to start a µP/µC in a known state or return the system to a known state. The ASM707/708 have two reset outputs, one activeHIGH RESET and one active-LOW RESET output. The ASM813L has only an active-HIGH output. RESET is simply the complement of RESET. Manual Reset (MR) RESET is guaranteed to be LOW with VCC above 1.2V. The active-LOW manual reset input is pulled high by a During a power-up sequence, RESET remains low until 250µA pull-up current and can be driven low by the supply rises above the threshold level, either 4.65V or CMOS/TTL logic or a mechanical switch to ground. An 4.40V. RESET goes high approximately 200ms after external debounce circuit is unnecessary since the crossing the threshold. 140ms minimum reset time will debounce mechanical pushbutton switches. During power-down, RESET goes LOW as VCC falls By connecting the watchdog output (WDO) and MR, a below the threshold level and is guaranteed to be under watchdog timeout forces RESET to be generated. The 0.4V with VCC above 1.2V. ASM813L should be used when an active-HIGH RESET In a brownout situation where VCC falls below the is required. threshold level, RESET pulses low. If a brown-out occurs Watchdog Timer during an already initiated reset, the pulse will continue The watchdog timer available on the ASM705/706/813L for a minimum of 140ms. monitors µP/µC activity. An output line on the processor is used to toggle the WDI line. If this line is not toggled Power Failure Detection With Auxiliary Comparator within 1.6 seconds, the internal timer puts the watchdog All devices have an auxiliary comparator with 1.25V trip output, WDO, into a LOW state. WDO will remain LOW point and uncommitted output (PFO) and noninverting until a toggle is detected at WDI. input (PFI). This comparator can be used as a supply If WDI is floated or connected to a three-stated circuit, the voltage monitor with an external resistor voltage divider. watchdog function is disabled, meaning, it is cleared and The attenuated voltage at PFI should be set just below not counting. The watchdog timer is also disabled if the 1.25 threshold. As the supply level falls, PFI is RESET is asserted. When RESET becomes inactive and reduced causing the PFO output to transit LOW. Normally the WDI input sees a high or low transition as short as PFO interrupts the processor so the system can be shut 50ns, the watchdog timer will begin a 1.6 second down in a controlled manner. countdown. Additional transitions at WDI will reset the watchdog timer and initiate a new countdown sequence. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 4 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 WDO will also become LOW and remain so, whenever the supply voltage, VCC , falls below the device threshold level. WDO goes HIGH as soon as VCC transitions above the threshold. There is no minimum pulse width for WDO as there is for the RESET outputs. If WDI is floated, WDO essentially acts as a low-power output indicator. Monitoring Voltages Other Than VCC The ASM705-708 can monitor voltages other than VCC using the Power Fail circuitry. If a resistive divider is connected from the voltage to be monitored to the Power Fail input (PFI), the PFO will go LOW if the voltage at PFI goes below 1.25V reference. Should hysteresis be desired, connect a resistor (equal to approximately 10 times the sum of the two resistors in the divider) between the PFI and PFO pins. A capacitor between PFI and GND Application Information will reduce circuit sensitivity to input high-frequency Ensuring That RESET is Valid Down to VCC = 0V noise. If it is desired to assert a RESET for voltages other When VCC falls below 1.1V, the ASM705-708 RESET than VCC then the PFO output is to be connected to the output no longer pulls down; it becomes indeterminate. MR. To avoid the possibility that stray charges build up and force RESET to the wrong state, a pull-down resistor should be connected to the RESET pin, thus draining such charges to ground and holding RESET low. The resistor value is not critical. A 100kΩ resistor will pull RESET to ground without loading it. Bi-directional Reset Pin Interfacing The ASM705/6/7/8 can interface with µP/µC bi-directional reset pins by connecting a 4.7kΩ resistor in series with the RESET output and the µP/µC bi-directional RESET pin. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 5 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Monitoring a Negative Voltage The Power-Fail circuitry can also monitor a negative supply rail. When the negative rail is OK, PFO will be LOW, and when the negative rail is failing (not negative enough), PFO goes HIGH (the opposite of when positive voltages are monitored). To trigger a reset, these outputs need to be inverted: adding the resistors and transistor as shown achieves this. The RESET output will then have the same sense as for positive voltages: good = HIGH, bad = LOW. It should be noted that this circuit’s accuracy depends on the VCC line, the PFI threshold tolerance, and the resistors. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 6 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Absolute Maximum Ratings Parameter Min Max Unit Pin Terminal Voltage with Respect to Ground VCC -0.3 6.0 V All other inputs1 -0.3 VCC + 0.3 V 20 mA Output Current: All outputs 20 mA Rate of Rise at VCC 100 V/µs Plastic DIP Power Dissipation (Derate 9mW/°C above 70°C) 700 mV 470 mW 330 mW Input Current at VCC and GND SO Power Dissipation (Derate 5.9mW/°C above 70°C) MicroSO Power Dissipation (Derate 4.1mW/°C above 70°C) Operating Temperature Range ASM705E/706E/707E/708E/813LE -40 +85 °C ASM705C/706C/707C/708C/813LC 0 70 °C -65 160 °C 300 °C 2 200 KV V Storage Temperature Range Lead Temperature (Soldering 10sec) ESD rating HBM MM Note: 1. The input voltage limits of PFI and MR can be exceeded if the input current is less than 10mA. These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 7 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Electrical Characteristics Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P,ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J) Parameter Operating Voltage Range SYMBOL VCC Supply Current ICC RESET Threshold VRT RESET Threshold Hysteresis RESET Pulse Width MR Pulse Width MR to RESET Out Delay MR Input Threshold MR Pullup current tRS tMD VIH VIL Max 75 75 50 50 4.65 4.40 5.5 5.5 5.5 140 140 140 140 4.75 4.50 40 140 0.25 VIL = 0.4V, VIH=0.8VCC, 50 3.5 VOH VOL ASM705/706/813L, VCC = 5V ISOURCE = 800µA ISINK = 3.2mA V ms 250 0.8 600 µs V µA 0.4 0.3 V 0.4 0.4 V 2.25 S 0.9 tWP VIH VIL ASM705/6/813L, WDI = VCC ASM705/6/813L, WDI = 0V ASM705/6/813L, ISOURCE = 800µA ASM705/6/813L, ISINK = 1.2mA VCC = 5V µA VCC - 1.5 1.00 PFI Input Threshold PFI Input Current 280 2.0 100 VCC - 1.5 V µs Note 1 ASM705/6/813L VOH 200 Unit mV 0.15 tWD VOL PFO Output Voltage 4.50 4.25 Note 1 MR = 0V ISOURCE = 800µA ISINK = 3.2mA ASM705/6/7/8, VCC = 1.2V, ISINK = 100µA ASM707/8/813L, ISOURCE = 800µA ASM707/8, ISINK = 1.2mA ASM813L, ISINK =3.2mA ASM813L, VCC = 1.2V, ISOURCE = 4µA WDI Input Current WDO Output Voltage TYP 1.2 1.1 1.2 tMR RESET Output Voltage WDI Input Threshold Min Note 1 RESET Output Voltage Watchdog Timeout Period WDI Pulse Width Test Conditions ASM705/6/7/8C ASM813L ASM705/6/7/8E, ASM813E ASM705/706C/813LC ASM705E/706E/813LE ASM707C/708C ASM707E/708E ASM705/707/813L, Note 1 ASM706/708 Note 1 -150 1.60 ns 50 -50 0.8 150 V µA VCC - 1.5 V 0.4 1.2 -25 VCC - 1.5 1.25 0.01 1.3 25 0.4 V nA V Notes 1: RESET (ASM705/6/7/8), RESET(ASM707/8, ASM813L) Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 8 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Package Dimensions 8-Pin MicroSO Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 9 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Package Dimensions (contd) Plastic DIP (8-Pin) Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 10 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Package Dimensions (contd) SO (8-Pin) Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 11 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Ordering Codes Part Number Reset Threshold Temperature Pins-Package Package Marking TIN - LEAD DEVICES ASM705 Active LOW Reset, Watchdog Output And Manual RESET ASM705CPA 4.65 0°C to +70 °C 8-Plastic DIP ASM705CPA ASM705CSA 4.65 0°C to +70 °C 8-SO ASM705CSA ASM705CUA 4.65 0°C to +70 °C 8-MicroSO ASM705CUA ASM705EPA 4.65 -40°C to +85°C 8-Plastic DIP ASM705EPA ASM705ESA 4.65 -40°C to +85°C 8-SO ASM705ESA ASM705EUA 4.65 -40°C to +85°C 8-MicroSO ASM705EUA 8-Plastic DIP ASM706CPA ASM706 Active LOW Reset, Watchdog Output And Manual RESET ASM706CPA 4.40 0°C to +70 °C ASM706CSA 4.40 0°C to +70 °C 8-SO ASM706CSA ASM706CUA 4.40 0°C to +70 °C 8-MicroSO ASM706CUA ASM706EPA 4.40 -40°C to +85°C 8-Plastic DIP ASM706EPA ASM706ESA 4.40 -40°C to +85°C 8-SO ASM706ESA ASM707 Active LOW & HIGH Reset with Manual RESET ASM707CPA 4.65 0°C to +70 °C 8-Plastic DIP ASM707CPA ASM707CSA 4.65 0°C to +70 °C 8-SO ASM707CSA ASM707CUA 4.65 0°C to +70 °C 8-MicroSO ASM707CUA ASM707EPA 4.65 -40°C to +85°C 8-Plastic DIP ASM707EPA ASM707ESA 4.65 -40°C to +85°C 8-SO ASM707ESA 8-Plastic DIP ASM708CPA ASM708Active LOW & HIGH Reset with Manual RESET ASM708CPA 4.40 0°C to +70 °C ASM708CSA 4.40 0°C to +70 °C 8-SO ASM708CSA ASM708CUA 4.40 0°C to +70 °C 8-MicroSO ASM708CUA ASM708EPA 4.40 -40°C to +85°C 8-Plastic DIP ASM708EPA ASM708ESA 4.40 -40°C to +85°C 8-SO ASM708ESA ASM813L Active HIGH Reset, Watchdog Output And Manual RESET ASM813LCPA 4.65 0°C to +70 °C 8-Plastic DIP ASM813LCPA ASM813LCSA 4.65 0°C to +70 °C 8-SO ASM813LCSA ASM813LCUA 4.65 0°C to +70 °C 8-MicroSO ASM813LCUA ASM813LEPA 4.65 -40°C to +85°C 8-Plastic DIP ASM813LEPA ASM813LESA 4.65 -40°C to +85°C 8-SO ASM813LESA Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 12 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Ordering Codes Part Number Reset Threshold Temperature Pins-Package Package Marking LEAD FREE DEVICES ASM705 Active LOW Reset, Watchdog Output And Manual RESET ASM705CPAF 4.65 0°C to +70 °C 8-Plastic DIP ASM705CPAF ASM705CSAF 4.65 0°C to +70 °C 8-SO ASM705CSAF ASM705CUAF 4.65 0°C to +70 °C 8-MicroSO ASM705CUAF ASM705EPAF 4.65 -40°C to +85°C 8-Plastic DIP ASM705EPAF ASM705ESAF 4.65 -40°C to +85°C 8-SO ASM705ESAF ASM705EUAF 4.65 -40°C to +85°C 8-MicroSO ASM705EUAF 8-Plastic DIP ASM706CPAF ASM706 Active LOW Reset, Watchdog Output And Manual RESET ASM706CPAF 4.40 0°C to +70 °C ASM706CSAF 4.40 0°C to +70 °C 8-SO ASM706CSAF ASM706CUAF 4.40 0°C to +70 °C 8-MicroSO ASM706CUAF ASM706EPAF 4.40 -40°C to +85°C 8-Plastic DIP ASM706EPAF ASM706ESAF 4.40 -40°C to +85°C 8-SO ASM706ESAF ASM707 Active LOW & HIGH Reset with Manual RESET ASM707CPAF 4.65 0°C to +70 °C 8-Plastic DIP ASM707CPAF ASM707CSAF 4.65 0°C to +70 °C 8-SO ASM707CSAF ASM707CUAF 4.65 0°C to +70 °C 8-MicroSO ASM707CUAF ASM707EPAF 4.65 -40°C to +85°C 8-Plastic DIP ASM707EPAF ASM707ESAF 4.65 -40°C to +85°C 8-SO ASM707ESAF 8-Plastic DIP ASM708CPAF ASM708Active LOW & HIGH Reset with Manual RESET ASM708CPAF 4.40 0°C to +70 °C ASM708CSAF 4.40 0°C to +70 °C 8-SO ASM708CSAF ASM708CUAF 4.40 0°C to +70 °C 8-MicroSO ASM708CUAF ASM708EPAF 4.40 -40°C to +85°C 8-Plastic DIP ASM708EPAF ASM708ESAF 4.40 -40°C to +85°C 8-SO ASM708ESAF ASM813L Active HIGH Reset, Watchdog Output And Manual RESET ASM813LCPAF 4.65 0°C to +70 °C 8-Plastic DIP ASM813LCPAF ASM813LCSAF 4.65 0°C to +70 °C 8-SO ASM813LCSAF ASM813LCUAF 4.65 0°C to +70 °C 8-MicroSO ASM813LCUAF ASM813LEPAF 4.65 -40°C to +85°C 8-Plastic DIP ASM813LEPAF ASM813LESAF 4.65 -40°C to +85°C 8-SO ASM813LESAF Note: For parts to be packed in Tape and Reel, add “-T” at the end of the part number. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 13 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 Feature Summary ASM705 ASM706 ASM707 ASM708 ASM813L Brownout detection ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ Manual RESET input ♦ ♦ ♦ ♦ ♦ Power-up/down RESET ♦ ♦ ♦ ♦ ♦ Watchdog Timer ♦ ♦ Power fail detector Active HIGH RESET output Active LOW RESET output RESET Threshold (V) ♦ ♦ ♦ ♦ ♦ ♦ ♦ 4.65 4.40 4.65 4.40 Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. ♦ 4.65 14 of 15 ASM705/706/707/708 ASM813L April 2008 rev 1.6 PulseCore Semiconductor Corporation 1715 S. Bascom Ave Suite 200 Campbell, CA 95008 Tel: 408-879-9077 Fax: 408-879-9018 www.pulsecoresemi.com Copyright © PulseCore Semiconductor All Rights Reserved Part Number: ASM705 / 706 / 707 / 708 ASM813L Document Version: 1.6 © Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective companies. PulseCore reserves the right to make changes to this document and its products at any time without notice. PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of PulseCore products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in PulseCore’s Terms and Conditions of Sale (which are available from PulseCore). All sales of PulseCore products are made exclusively according to PulseCore’s Terms and Conditions of Sale. The purchase of products from PulseCore does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of PulseCore or third parties. PulseCore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify PulseCore against all claims arising from such use. Low Power µP Supervisor Circuits Notice: The information in this document is subject to change without notice. 15 of 15