SNC21168A 1-CH H.Q. Speech Controller ===================== CONTENTS ===================== 1. INTRODUCTION........................................................................................................... 3 2. FEATURES ..................................................................................................................... 3 3. PIN ASSIGNMENT........................................................................................................ 4 4. BLOCK DIAGRAM ....................................................................................................... 4 5. FUNCTION DESCRIPTIONS ...................................................................................... 5 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12 OSCILLATOR .............................................................................................................. 5 ROM ......................................................................................................................... 5 RAM ......................................................................................................................... 5 POWER DOWN MODE ................................................................................................. 5 SAMPLING RATE COUNTER ........................................................................................ 5 AUTO REPEAT FUNCTION ........................................................................................... 5 I/O PORTS .................................................................................................................. 5 IR FUNCTION ............................................................................................................. 6 PWM IO CONTROL .................................................................................................... 6 WATCH DOG TIMER ................................................................................................... 6 PUSH-PULL OUTPUT................................................................................................... 7 EVENT MARK ............................................................................................................. 7 6. ABSOLUTE MAXIMUM RATING ............................................................................. 8 7. ELECTRICAL CHARACTERISTICS ........................................................................ 8 8. APPLICATION CIRCUIT ............................................................................................ 9 8.1 8.2 Ver1.1 GENERAL APPLICATION .............................................................................................. 9 MOTOR APPLICATION ............................................................................................... 10 1 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller AMENDENT HISTORY Version Date Ver1.0 April 24, 2009 First issue. Ver1.1 April 28, 2009 Revise system clock and electrical characteristics. Ver1.1 Description 2 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 1. INTRODUCTION SNC21168A is a one-channel voice synthesizer IC with Push-Pull direct drive circuit. It built-in a 4-bit tiny controller with four 4-bit I/O ports. By programming through the tiny controller in SNC21168A, user’s varied applications including voice section combination, key trigger arrangement, output control, and other logic functions can be easily implemented. 2. FEATURES Single power supply 2.4V – 5.5V System Clock is 2MHz, the instruction cycle is 4us 168 seconds voice capacity are provided (@6KHZ sample rate) Built in a 4-bit tiny controller I/O Port Four 4-bit I/O ports P1, P2, P3 and P6 are provided The driving/sink current of P3.2 & P3.3 is up to 8mA/16mA The IO pins P3.3 or P2.3 can be modulated with 38.5KHz carry signal to implement IR function. 6 PWM output for IO (P3.0~P3.3 & P6.0~P6.1) 128*4 bits RAM are provided Maximum 16k program ROM is provided 512K*10 shared ROM for voice data and program Readable ROM code data Built-in one channel High Quality speech synthesizer Adaptive playing speed from 2.5k-20kHz is provided Automatic repetition Support 5-bit ADPCM and 10 bit PCM format. Built in an 8-level volume control Push-Pull DAC circuit output, can directly connected to Speaker for sound output. 12 bit Push-Pull DA output. Event Mark function supported. Low-Voltage Detect circuit Watch Dog Timer Reset function. Ver1.1 3 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 3. PIN ASSIGNMENT Symbol P10~P13 P20~P23 P30~P33 P60~P63 RST TEST OSC DAON I/O I/O I/O I/O I/O I I I O Push-Pull output 1 DAOP O I I I I Push-Pull output 2 Positive power supply Negative power supply Positive power supply Negative power supply VDDIO GNDIO VDD GND Function Description I/O port 1: IO I/O port 2: IO I/O port 3: IO I/O port 6: IO Reset Chip (Active H) Test Pin Oscillation component connection pin 4. Block Diagram ROM Program/Speech Address Pointers/ STACK SRAM (128 nibbles) Timing Generator Sampling Rate Counter Watch Dog Timer Voice Synthesizer Timer ALU Ver1.1 Push-Pull Circuit Current DAC Circuit PWM IO IO port 1 OSC IO port 2 IO port 3 4 IO port 6 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 5. FUNCTION DESCRIPTIONS 5.1 Oscillator System clock define 2MHz, the source provided by external resistor ring oscillator. 5.2 ROM SNC21168A contains a substantial maximum 512K words (10-bit) internal ROM, which is shared by program and resource data. Program, voice and data are shared within this same 512K words ROM. 5.3 RAM SNC21168A contains maximum 128 nibble RAM (128 x 4-bits). The 128 nibble RAM is divided into eight pages (page 0 to page 7, 16 nibble RAM on each page). In our programming structure, users can use the instructions, PAGE n (n=0 to 7) to switch and indicate the RAM page. Besides, users can use direct mode, M0 ~ M15 in the data transfer type instructions, to access all 16 nibbles of each page. 5.4 Power Down Mode “End” instruction makes the IC entering into Stop Mode will stop the system clock for power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition (LH or HL) occurring on any IO pin can be used to start the system clock and return to normal operating mode. 5.5 Sampling Rate Counter The unique sampling rate counter is designed in voice channel to be able to play diverse voices at different sample playing rates. The playing rate can be adaptively set up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a high-quality voice synthesis that sounds very close to its original source when played through the same amplifier and speaker circuitry. 5.6 Auto Repeat Function A voice section can be repeated by the built-in special hardware of SNC21168A without any software effort. The function activated by setting the corresponding bit of a control register. Once the control register was setting, the channel will continue to play the voice section (the Next Section). 5.7 I/O Ports There are four 4-bit I/O ports P1, P2, P3 and P6. Any I/O can be individually programmed as either input pull low or output. Any valid data transition (H L or LH) of P1, P2, P3 and P6 can reactivate the chip when it is in power-down stage. Ver1.1 5 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller PA D Port Data Port Status Wea k To Internal Data Bus Read Control I/O Port Configuration Note: (1) Weak N-MOS can serve as pull-low resistor. (2) The driving/sink current of P3.3 & P3.2 is up to 8mA/16mA 5.8 IR Function Bit 3 of Mode Register is applied to control the IR function. P33 can be modulated with 38.5KHz square wave before sent out to P3.3 or P2.3 pin. P3.3 and P2.3 out is controlled by Mode1.1. If Mode1.1 set 1 IR is use P2.3, set “0” is use P3.3. The IR signal can be achieved by this modulated signal. 5.9 PWM IO control SNC21168A has support 6 PWM IO (P3.0~P3.3 & P6.0~P6.1). Each I/O has 8 bit independent duty register, and the 8 bit register are compare with 8 bits counter. If set use PWM IO function and internal counter start at 000H, the mapping I/O will set High. The 8 bits counter increment if the same duty-register, that will reset the mapping IO pin. 5.10 Watch Dog Timer SNC21168A built-in an internal WDT (Watch Dog Timer). This Watchdog timer would issue resets signal to this chip if it is not cleared before reaching terminal count (1 sec). The watchdog timer is enabled at reset and cannot be disabled. Ver1.1 6 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 5.11 Push-Pull Output An 8-level volume control Push-Pull DAC circuit is built-in SNC21168A. The maximum resolution of Push-Pull DAC is 12 bits. Two huge output stage circuits are designed in SNC21168A. With this advanced circuit, the chip is capable of driving speaker directly without external transistors. DAON DAOP Push-Pull Output 5.12 Event Mark This is a new function for SNC21168A series, it allows user to add a special mark in wave data by the voice edit tool “CoolEdit”, ”Goldwav”, “SoundForge”. User can insert event tags in anywhere of his wave file and can easy to get this special code to do his special action during voice playing. That means, it should be easily to control the I/O (such as LED or Motor) and other actions to synchronize with voice. Ver1.1 7 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 6. ABSOLUTE MAXIMUM RATING Items Supply Voltage Input Voltage Operating Temperature Storage Temperature Symbol VDD-V VIN TOP TSTG Min -0.3 VSS-0.3 0 -55.0 Max 6.0 VDD+0.3 55.0 125.0 Unit. V V o C o C 7. ELECTRICAL CHARACTERISTICS Item Operating Voltage Standby current Sym. Min. VDD 2.4 ISBY - Operating Current IOPR Input current of IIH P1, P2, P3, P6 Drive current of IOD P1, P2, P3.0, P3.1, P6 Sink Current of IOS P1, P2, P3.0, P3.1, P6 Drive current of P3.2, P3.3 IOD Sink current of P3.2, P3.3 IOS Push-Pull current IPP - Typ. Max. Unit Condition 3.0 5.5 V 3.0 uA VDD=3V, no load 5.0 VDD=4.5V, no load 300 uA VDD=3V, no load 3.0 uA VDD=3V,VIN=3V 3 4 - mA VDD=3V,VO=2.4V 4 6 - mA VDD=3V,VO=0.4V 6 10 - 8 16 70 - mA VDD=3V,VO=2.4V mA VDD=3V,VO=2.4V mA VDD=3V, Output 1K Sin wave. mA VDD=4.5V, Ouput 1K Sin wave. MHz VDD=3V Temp.=25℃ Min : -3% Max : +3% Push-Pull current IPP - 100 - Oscillation Freq. FOSC 1.98 2.05 2.12 Ver1.1 8 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 8. APPLICATION CIRCUIT 8.1 General application C1 104 3 *1.5AA VDDIO RST GNDIO - CVDD OSC SNC21XXX A + R1 220 0K 22 IO1 IO2 IO3 IO4 IO5 CGND Battery Box It is suggested to add a capacitor (C1), 104, between VDD with GND to keep power stable with general application. And this capacitor is strongly suggested to be as close to the chip as possible. Ver1.1 9 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller 8.2 Motor application Separate CPU power path with power path of large current application R2 10Ω Ω 10 + VDDIO M R1 220 220K Ω CVDD Battery Box C2 104 RST GNDIO SNC21XXXA 3* 1.5 AA OSC IO1 IO2 C1 104 IO3 IO4 IO5 CGND Rb 1 100Ω 100Ω C3 104 C4 104 M 8050 8050 Rb 2 100Ω 100Ω Separate CPU GND with large current application GND There are some suggestions about PCB layout when user use SNC21XXXA series IC with motor applications. (1) The capacitor C1 (104) C2 (104) is strongly suggested to be as close to the chip as possible. (2) It had better let OSC components (R) get close to IC chip. (3) OSC components had better get far away large current applications. (4) Separate IC power path with large current application power path to avoid affect IC working by power drop from large current application. (5) R2 (10Ω)separate VDDIO and CVDD. (6) Let power cable thicker, especially for large current application. (7) C3 and C4 (104) are connected at the positive point and negative point of the motor. Ver1.1 10 April 28, 2009 SNC21168A 1-CH H.Q. Speech Controller DISCLAIMER The information appearing in SONiX web pages (“this publication”) is believed to be accurate. However, this publication could contain technical inaccuracies or typographical errors. The reader should not assume that this publication is error-free or that it will be suitable for any particular purpose. SONiX makes no warranty, express, statutory implied or by description in this publication or other documents which are referenced by or linked to this publication. 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