FRA801G thru FRA807G 8.0 AMPS. Glass Passivated Fast Recovery Rectifiers FEATURES TO-220AC Glass passivated chip junction. High efficiency, Low VF High current capability High reliability High surge current capability Low power loss .185(4.70) .175(4.44) .412(10.5) MAX .055(1.40) .045(1.14) DIA .154(3.91) .148(3.74) .113(2.87) .103(2.62) .27(6.86) .23(5.84) .594(15.1) .587(14.9) PIN1 MECHANICAL DATA 2 .16(4.06) .14(3.56) Cases: TO-220AC Molded plastic Epoxy: UL 94V-0 rate flame retardant Terminals: Pure tin plated, Lead free. Leads solderable per MIL-STD-202, Method 208 guaranteed Polarity: As marked High temperature soldering guaranteed: o 260 C /10 seconds .16”, (4.06mm) from case. Mounting position: Any Weight: 2.24 grams .11(2.79) .10(2.54) .56(14.22) .53(13.46) .037(0.94) .027(0.68) .025(0.64) .014(0.35) .205(5.20) .195(4.95) PIN 1 PIN 2 CASE Dimensions in inches and (millimeters) Pb-free; RoHS-compliant MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS o Rating at 25 C ambient temperature unless otherwise specified. Single phase, half wave, 60 Hz, resistive or inductive load. For capacitive load, derate current by 20% Type Number Maximum Recurrent Peak Reverse Voltage Maximum RMS Voltage Maximum DC Blocking Voltage Maximum Average Forward Rectified Current Symbol FRA VRRM VRMS VDC 801G FRA 802G FRA 803G FRA 804G FRA 805G FRA 806G FRA 807G Units 50 35 50 100 70 100 200 140 200 400 280 400 600 420 600 800 560 800 1000 700 1000 V V V I(AV) 8.0 A Peak Forward Surge Current, 8.3 ms Single Half Sine-wave Superimposed on Rated Load (JEDEC method ) IFSM 150 A Maximum Instantaneous Forward Voltage @ 8.0A VF 1.3 5.0 100 V uA uA nS pF o C/W o C @TC = 55 oC Maximum DC Reverse Current @ TC=25 oC at Rated DC Blocking Voltage @ TC=125 oC Maximum Reverse Recovery Time ( Note 2 ) Typical Junction Capacitance ( Note 1 ) T J=25℃ Typical Thermal Resistance (Note 3) Operating and Storage Temperature Range Notes: IR Trr Cj RθJA 150 TJ ,TSTG 250 50 3.0 -65 to +150 500 1. Measured at 1 MHz and Applied Reverse Voltage of 4.0 Volts D.C. 2. Reverse Recovery Test Conditions: IF=0.5A, IR=1.0A, IRR=0.25A 3. Thermal Resistance from Junction to Case, with Heatsink size 2” x 3” x 0.25” Al-Plate. 09/18/2007 Rev.1.00 www.SiliconStandard.com 1 FRA801G thru FRA807G RATINGS AND CHARACTERISTIC CURVES (FRA801G THRU FRA807G) FIG.1- MAXIMUM FORWARD CURRENT DERATING CURVE FIG.2- TYPICAL REVERSE CHARACTERISTICS 100 8 40 INSTANTANEOUS REVERSE CURRENT. ( A) AVERAGE FORWARD CURRENT. (A) 10 6 4 2 0 0 50 100 o CASE TEMPERATURE. ( C) 150 FIG.3- MAXIMUM NON-REPETITIVE FORWARD SURGE CURRENT Tj=125 0C 10 2 1 0.4 PEAK FORWARD SURGE CURRENT. (A) 150 Tj=25 0C 0.2 TJ=125 0C 125 0.1 8.3ms Single Half Sine Wave JEDEC Method 100 0 20 40 60 80 100 120 140 PERCENT OF RATED PEAK REVERSE VOLTAGE. (%) 75 50 400 FIG.5- TYPICAL INSTANTANEOUS FORWARD CHARACTERISTICS 25 200 100 0 2 5 10 20 50 100 INSTANTANEOUS FORWARD CURRENT. (A) 1 NUMBER OF CYCLES AT 60Hz FIG.4- TYPICAL JUNCTION CAPACITANCE 120 Tj=25 0C f=1.0MHz Vsig=50mVp-p 100 CAPACITANCE.(pF) Tj=75 0C 4 80 60 40 40 20 10 4 2 1 Tj=25oC Pulse Width=300 s 1% Duty Cycle 0.4 20 0 0.1 0.2 0.5 1 5 10 50 100 0.1 0.6 500 1000 REVERSE VOLTAGE. (V) 0.8 1.0 1.2 1.4 1.6 1.8 2.0 INSTANTANEOUS FORWARD VOLTAGE. (V) FIG.6- REVERSE RECOVERY TIME CHARACTERISTIC AND TEST CIRCUIT DIAGRAM 50W NONINDUCTIVE 10W NONINDUCTIVE trr +0.5A (-) DUT (+) 50Vdc (approx) (-) PULSE GENERATOR (NOTE 2) 1W NON INDUCTIVE OSCILLOSCOPE (NOTE 1) NOTES: 1. Rise Time=7ns max. Input Impedance= 1 megohm 22pf 2. Rise Time=10ns max. Sourse Impedance= 50 ohms 09/18/2007 Rev.1.00 0 -0.25A (+) -1.0A www.SiliconStandard.com 1cm SET TIME BASE FOR 5/ 10ns/ cm 2 FRA801G thru FRA807G Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 09/18/2007 Rev.1.00 www.SiliconStandard.com 3