SS4035G Two-Cell Li-Ion and Li-Polymer Charge Management IC PRODUCT SUMMARY Charge management for two-cell Li-Ion or Li-Polymer battery packs Individual cell monitoring - avoids over-charging Pin-selectable charging current Cell-balancing control circuit - maximizes pack useful life FEATURES Optional external thermistor monitors the pack temperature Conditioning charging for reviving deeply discharged cells Timer function available to limit the charging time Pb-free, RoHS compliant SO-20 package DESCRIPTION The SS4035G is a charging control IC designed temperature is within the safe zone, the SS4035G for battery packs with two cells in series. When charges the battery in three phases: pre-charging, multiple cells in a battery pack are connected in constant-current, or constant-voltage. If the series, the weakest cell determines the overall voltage of the temperature sense input pin is higher pack capacity. The SS4035G has a cell-balance than Low Temp Threshold (Vtlow), or the battery control circuit to solve this problem, and monitors voltage is less than 3.1V, the SS4035G pre-charges the voltage of each cell to ensure that no cell is the battery with a low current. over-charged. The pulse width modulation (PWM) After the precharging, the SS4035G applies a output can be used as either a linear or switching constant current to the battery. The value of this charge-control circuit. Three digital input pins constant current is determined by the levels of determine the charge current. All these features pins S1, S2 and S3 during power up. When make the charging circuit design easy and flexible. the battery voltage is above the threshold, The SS4035G continuously monitors each cell the SS4035G begins constant-voltage charging voltage, cell current and the battery temperature. until the battery is fully charged. The battery is Any unspecified condition will stop the charging fully charged when the current drops down to to protect the battery cells. An external negative- the termination threshold. temperature-coefficient thermistor is used as a When the cell voltage is higher than the Balancing sensor to monitor the battery pack temperature. Threshold (Vbal), the cell balancing circuit is To be safe, charging is suspended if the voltage triggered if one cell voltage is higher than the of the temperature sense input pin is higher than other by more than 0.02V. Min Temp Threshold (VTmin) or lower than Max Temp Threshold (VTmax). When the battery 1/09/2006 Rev.3.01 www.SiliconStandard.com 1 of 11 SS4035G PIN CONFIGURATION CLED CFLED TESTIN TESTOUT CCTL N/C RES GND T I 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 S2 S1 BA2 BA1 AVDD S3 ROSC VDD V2 V1 PIN DESCRIPTION 1/09/2006 Rev.3.01 Pin Name Pin No I/O CLED CFLED TESTIN TESTOUT CCTL N/C RES GND T I V1 V2 VDD ROSC S3 AVDD BA1 BA2 S1 S2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 O O I O O O I G A A A A P I I P O O I I Description Charge control LED Charge Full control LED Test input Test output Charging Control, PWM output Not connected Reset Ground Temperature-sense voltage input Current-sense voltage input Cell 1 voltage (low side) Cell 2 voltage (high side) Operating voltage input Frequency control resistor Selection no.3 Operating voltage for analog circuit Balancing control for cell 1 Balancing control for cell 2 Selection no.1 Selection no.2 www.SiliconStandard.com 2 of 11 SS4035G ABSOLUTE MAXIMUM RATINGS DC Voltage ………… -0.3V to +7.0V I/O Voltage…... (GND-0.3V) TO (VDD+0.3V) Storage Temperature…………... -55°C to +125°C Operating Temperature………... -40°C to +85°C * Stresses beyond those listed as “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating condition for an extended period may affect device reliability. ELECTRICAL CHARACTERISTICS VDD = 4.5V – 5.5V, GND = 0V, TA = 25°C,, fosc = 8MHz, unless otherwise specified. Parameter Symbol Min. Typ. Max Unit Operating Voltage Operating Current VDD IOP 4.5 - 5.0 1.5 5.5 2 V mA Standby Current ISB - - 1 uA Input Low Voltage VIL1 GND - Input Low Voltage VIL2 GND - Input High Voltage Input High Voltage Input Leakage Current Output High Voltage VIH1 VIH2 0.2* VDD 0.15* VDD VDD VDD - 1 uA GND +0.6 VDD 0.8*VDD 0.85*VDD - IIL -1 VOH VDD-0.7 - Output Low Voltage VOL - - Analog Input Ain GND 1/09/2006 Rev.3.01 Condition No load, no ADC No load, no ADC, no WDT, no LVR V All I/O, except RES V RES V V All I/O, except RES RES V Input pins, Vin=VDD or GND All I/O, IOH=-10mA V All I/O, IOL=20mA V T, I, V1, V2 www.SiliconStandard.com 3 of 11 SS4035G ELECTRICAL CHARACTERISTICS (continued) VDD = 5V, GND = 0V, TA = 25°C, fosc = 8MHz, Rsens=100mΩ, unless otherwise specified. Parameter Symbol Min. Typ. Max Voltage Control 3.10 - Pre-charge Threshold Vlow CC/CV Threshold Vcv - 4.135 - V Maximum Cell Voltage Balancing Threshold Vmax Vbal - 4.235 4.135 - V V Bad Battery Threshold Vbad - 0.5 - V Unit Description V Switch to CV mode above this value Difference between Cell1 and Cell 2 voltage Temperature Sensing Min Temp Threshold Vtun - 4.31 - V Low Temp Threshold VTlow - 3.82 - V High Temp Threshold VThigh - 1.90 - V MaxTemp Threshold VTover - 1.54 - V Resume Temp Threshold VTrsm - 2.10 - V Ipre - Current Control 300 - Itaper - Precharge Current Taper Current Maximum Charge Time 1/09/2006 Rev.3.01 Tchg 250 Time Control 340 - Suspend charging if greater than this value Precharge if greater than this value Decrease current if less than this value Suspend charging if less than this value After maximum temperature is reached, resume charging if greater than this value. mA mA Fully charged if the taper current is below this value. Min www.SiliconStandard.com 4 of 11 SS4035G FUNCTIONAL DESCRIPTION A well-known Li-Ion charge algorithm is used by the the SS4035G continuously monitors each cell voltage, the SS4035G to control the charging. Figure 1 shows current and the battery temperature. Any unqualified shows the typical charge profile. Figure 2 is the control flow chart. During the process of charging, condition will stop the charging to protect the battery Trickle Charge CC Charge cells. CV Charge Finished PMV PPV PBV ICC PCV Capacity ICV PLV PEV ITC Figure 1. Typical Charge Profile 1/09/2006 Rev.3.01 www.SiliconStandard.com 5 of 11 SS4035G Power On Reset Start Timer Measure V1, V2, I, T No Temperature OK? Vcell, Vpack OK? No Time out? Yes I Regulate Vpack > Vlow ? No Pre-charge Yes I Regulate Vpack > Vcv? No Constant Current Yes V Regulate Turn on balancing Constant Voltage Yes I < Itaper ? No Cells unbalance ? No Yes Set Charge-Full End of Charge Figure 2. Control Flow Chart 1/09/2006 Rev.3.01 www.SiliconStandard.com 6 of 11 SS4035G CURRENT AND TEMPERATURE SENSING VDD VDD 16 13 1 2 15 20 19 7 14 8 AVDD VDD CLED CFLED S3 S2 S1 RES ROSC GND CCTL TESTIN TESTOUT V2 BA2 V1 BA1 FC T I SS4035G 5 3 4 12 18 11 17 6 9 10 6.8kΩ 103AT 10kΩ 50mΩ Figure 3. Current Sense and Temperature Sensor Figure 3 shows the current sense and temperature sensor. When a 103AT thermistor and a 6.8k resistor detect circuit. The SS4035G monitors the charging are used as recommended, the maximumum current by sensing at pin I (10) the voltage drop temperature, high temperature, resume temperature, across a small resistor, connected between VSS low temperature and minimum temperature are (battery negative) and GND (charger ground). The 60°C, 50°C, 45°C, 5°C and 10°C respectively. The value of this resistor should be between 50mΩ value of the resistor must be changed if a different and 150mΩ. To detect the temperature, a negative thermistor is used. To disable temperature sensing, temperature coefficient thermistor is used as a . pin T (9) must be connected to VDD. CELL VOLTAGE DETECTION AND BALANCING CONTROL R13 51kΩ R14 51kΩ VDD 16 13 1 2 15 20 19 7 14 8 AVDD VDD CLED CFLED S3 S2 S1 RES ROSC GND CCTL TESTIN TESTOUT V2 BA2 V1 BA1 FC T I 5 3 4 12 18 11 17 6 9 10 470k Ω P-channel MOSFET NPN 10kΩ Rb 51kΩ SS4035G 470k Ω P-channel MOSFET 10kΩ NPN Rb Figure 4. Voltage Sense and Balancing Control Figure 4 shows the cell voltage detection and cell guarantees that the input voltage on pin V2 (12) will balancing circuit. The pack voltage is divided by two not exceed VDD. When the cell voltage is above the (by using equal value resistors, R13 and R14). This “Balancing Threshold”, balance control is activated. 1/09/2006 Rev.3.01 www.SiliconStandard.com 7 of 11 SS4035G If any cell voltage is greater than the other by 0.02V transistor and sends a small current through resistor or more, the corresponding balance control output Rb. This slows down charging of the corresponding cell. goes high. It then turns on the corresponding by-pass The balance circuit turns off when the cells are balanced. CHARGING CONTROL V+ VB+ 3.3kΩ P-channel VDD MOSFET U? 16 13 1 2 15 20 19 7 14 8 AVDD VDD CLED CFLED S3 S2 S1 RES ROSC GND 5 3 4 12 18 11 17 6 9 10 CCTL TESTIN TESTOUT V2 BA2 V1 BA1 FC T I 10kΩ NPN 1kΩ CAP SS4035G Figure 5. Charging Control Figure 5 shows the linear charger mode for the MOSFET which is operating in the active region. SS4035G. The output of pin CCTL (5) is a pulse- This P-channel MOSFET must be chosen carefully width modulated (PWM) signal. This signal is to handle the required power dissipation. translated to a DC voltage to control the P-channel DIGITAL CONTROLS VDD 47K 8.6K 3K LED 1nF 3K LED 16 13 1 2 15 20 19 7 14 8 AVDD VDD CLED CFLED S3 S2 S1 RES ROSC GND CCTL TESTIN TESTOUT V2 BA2 V1 BA1 FC T I SS4035G Figure 6. Current Selection and Logic Control Figure 6 shows the connections for the digital pins have internal pull-ups. Table 1 shows the options for the SS4035G. Selection pins S1, S2 and S3 for selecting the required voltage for Isense. 1/09/2006 Rev.3.01 www.SiliconStandard.com 8 of 11 SS4035G Table 1. Current Selection Table S3 S2 S1 L L L L H H H H L L H H L L H H L H L H L H L H Isense Voltage 240 mV 200 mV 160 mV 120 mV 40 mV 60 mV 80 mV 100 mV RES (7) is the reset control. A low voltage on this pin will reset the device. Connect to VDD if not used. ROSC (14) is the frequency control input. For the SS4053G to work at 8MHz, this pin must be connected to VDD through an 8.6kΩ resistor. CLED (1) is the "charging" indication output. This pin goes low when the SS4035G is operating. CFLED (2) is the "fully charged" indication output. This pin goes low when the battery is fully charged. 1/09/2006 Rev.3.01 www.SiliconStandard.com 9 of 11 SS4035G PHYSICAL DIMENSIONS (units: inches) SO-20 C1 D F BA C E H Θ G 0.10mm C SEATING PLANE Symbol 1/09/2006 Rev.3.01 A B C C1 D E F G H min. 0.394 0.290 0.014 0.480 0.092 0.004 0.032 0.004 Q 0º Dimensions in inches nom. 0.050 - - www.SiliconStandard.com max. 0.419 0.300 0.020 0.520 0.104 0.038 0.012 10 º 10 of 11 SS4035G Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 1/09/2006 Rev.3.01 www.SiliconStandard.com 11 of 11