19-3379; Rev 4; 1/06 KIT ATION EVALU LE B A IL A AV Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers The MAX5477/MAX5478/MAX5479 nonvolatile, dual, linear-taper, digital potentiometers perform the function of a mechanical potentiometer, but replace the mechanics with a simple 2-wire digital interface. Each device performs the same function as a discrete potentiometer or variable resistor and has 256 tap points. The devices feature an internal, nonvolatile EEPROM used to store the wiper position for initialization during power-up. A write-protect feature prevents accidental overwrites of the EEPROM. The fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing interconnection complexity in many applications. Three address inputs allow a total of eight unique address combinations. The MAX5477/MAX5478/MAX5479 provide three nominal resistance values: 10kΩ (MAX5477), 50kΩ (MAX5478), or 100kΩ (MAX5479). The nominal resistor temperature coefficient is 70ppm/°C end-to-end and 10ppm/°C ratiometric. The low temperature coefficient makes the devices ideal for applications requiring a lowtemperature-coefficient variable resistor, such as lowdrift, programmable gain-amplifier circuit configurations. The MAX5477/MAX5478/MAX5479 are available in 16pin 3mm x 3mm x 0.8mm thin QFN and 14-pin 4.4mm x 5mm TSSOP packages. These devices operate over the extended -40°C to +85°C temperature range. Features ♦ Power-On Recall of Wiper Position from Nonvolatile Memory ♦ EEPROM Write Protection ♦ Tiny 3mm x 3mm x 0.8mm Thin QFN Package ♦ 70ppm/°C End-to-End Resistance Temperature Coefficient ♦ 10ppm/°C Ratiometric Temperature Coefficient ♦ Fast 400kbps I2C-Compatible Serial Interface ♦ 1µA (max) Static Supply Current ♦ Single-Supply Operation: +2.7V to +5.25V ♦ 256 Tap Positions per Potentiometer ♦ ±0.5 LSB DNL in Voltage-Divider Mode ♦ ±1 LSB INL in Voltage-Divider Mode Functional Diagram VDD GND HA 8-BIT SHIFT REGISTER 8 8 16-BIT LATCH SDA SCL I2C INTERFACE WA LA 16-BIT NV MEMORY HB 8 256 POSITION DECODER 256 WB MAX5477 MAX5478 MAX5479 A0 Mechanical Potentiometer Replacement Low-Drift Programmable-Gain Amplifiers Volume Control Liquid-Crystal Display (LCD) Contrast Control 256 POR WP Applications 256 POSITION DECODER A1 A2 LB Ordering Information/Selector Guide PART TEMP RANGE PIN-PACKAGE END-TO-END RESISTANCE (kΩ) 10 TOP MARK ABO PACKAGE CODE MAX5477ETE* -40°C to +85°C 16 Thin QFN MAX5477EUD -40°C to +85°C 14 TSSOP 10 — T1633F-3 U14-1 MAX5478ETE* -40°C to +85°C 16 Thin QFN 50 ABP T1633F-3 MAX5478EUD -40°C to +85°C 14 TSSOP 50 — U14-1 MAX5479ETE* -40°C to +85°C 16 Thin QFN 100 ABQ T1633F-3 MAX5479EUD -40°C to +85°C 14 TSSOP 100 — U14-1 *Future product—contact factory for availability. Pin Configurations appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX5477/MAX5478/MAX5479 General Description MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers ABSOLUTE MAXIMUM RATINGS SDA, SCL, VDD to GND .........................................-0.3V to +6.0V All Other Pins to GND.................................-0.3V to (VDD + 0.3V) Maximum Continuous Current into H_, L_, and W_ MAX5477......................................................................±5.0mA MAX5478......................................................................±1.3mA MAX5479......................................................................±0.6mA Continuous Power Dissipation (TA = +70°C) 16-Pin Thin QFN (derate 17.5mW/°C above +70°C) 1398mW 14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW Operating Temperature Range ...........................-40°C to +85°C Maximum Junction Temperature .....................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (VOLTAGE-DIVIDER MODE) Resolution 256 Taps Integral Nonlinearity INL (Note 2) ±1 Differential Nonlinearity DNL (Note 2) ±0.5 LSB ±1 LSB Dual Code Matching End-to-End Resistance Temperature Coefficient R0 and R1 set to same code (all codes) TCR Ratiometric Resistance Temperature Coefficient Full-Scale Error Zero-Scale Error LSB 70 ppm/°C 10 ppm/°C MAX5477 -4 MAX5478 -0.6 MAX5479 -0.3 MAX5477 4 MAX5478 0.6 MAX5479 0.3 LSB LSB DC PERFORMANCE (VARIABLE-RESISTOR MODE) Integral Nonlinearity (Note 3) INL Differential Nonlinearity (Note 3) DNL VDD = 3V ±3 VDD = 5V ±1.5 MAX5477 Dual Code Matching LSB ±1 MAX5478 ±1 MAX5479 ±1 R0 and R1 set to same code (all codes), VDD = 3V or 5V ±3 LSB LSB DC PERFORMANCE (RESISTOR CHARACTERISTICS) Wiper Resistance RW Wiper Capacitance CW End-to-End Resistance RHL 2 (Note 4) 325 675 10 MAX5477 7.5 10 12.5 MAX5478 37.5 50 62.5 MAX5479 75 100 125 _______________________________________________________________________________________ Ω pF kΩ Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers (VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS VDD = 3.4V to 5.25V Input High Voltage (Note 5) VIH Input Low Voltage VIL (Note 5) Output Low Voltage VOL ISINK = 3mA WP Pullup Resistance IWP Input Leakage Current ILEAK VDD < 3.4V 2.4 V 0.7 x VDD 0.8 0.4 255 V kΩ ±1 Input Capacitance V µA 5 pF HA = 1kHz (0 to VDD), LA = GND, LB = GND, measure WB -75 dB MAX5477 400 MAX5478 100 MAX5479 50 DYNAMIC CHARACTERISTICS Crosstalk 3dB Bandwidth (Note 6) Total Harmonic Distortion Plus Noise THD+N H_ = 1VRMS, f = 1kHz, L_ = GND, measure W_ kHz 0.003 % Years NONVOLATILE MEMORY RELIABILITY Data Retention Endurance TA = +85°C 50 TA = +25°C 200,000 TA = +85°C 50,000 Stores POWER SUPPLY Power-Supply Voltage VDD 2.70 Writing to EEPROM, digital inputs at GND or VDD, TA = +25°C (Note 7) Supply Current IDD Normal operation, digital WP = GND inputs at GND or VDD, WP = VDD TA = +25°C 5.25 250 400 15 20.6 0.5 1 V µA TIMING CHARACTERISTICS (VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C. See Figure 1.) (Notes 8 and 9) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG SECTION MAX5477 Wiper Settling Time (Note 10) tWS 325 MAX5478 500 MAX5479 1000 ns DIGITAL SECTION SCL Clock Frequency fSCL 400 kHz Setup Time for START Condition tSU:STA 0.6 µs Hold Time for START Condition tHD:STA 0.6 µs _______________________________________________________________________________________ 3 MAX5477/MAX5478/MAX5479 ELECTRICAL CHARACTERISTICS (continued) MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers TIMING CHARACTERISTICS (continued) (VDD = +2.7V to +5.25V, H_ = VDD, L_ = GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VDD = +5V, TA = +25°C. See Figure 1.) (Notes 8 and 9) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL High Time tHIGH 0.6 µs SCL Low Time tLOW 1.3 µs Data Setup Time tSU:DAT 100 Data Hold Time tHD:DAT 0 SDA, SCL Rise Time SDA, SCL Fall Time tR tF Setup Time for STOP Condition tSU:STO Bus Free Time Between STOP and START Condition tBUF Pulse Width of Spike Suppressed tSP Capacitive Load for Each Bus Line CB Write NV Register Busy Time ns 0.9 µs 300 ns 300 Minimum power-up rate = 0.2V/µs ns 0.6 µs 1.3 µs 50 ns (Note 11) 400 pF (Note 12) 12 ms Note 1: All devices are production tested at TA = +25°C and are guaranteed by design and characterization for -40°C < TA < +85°C. Note 2: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H_ = VDD and L_ = GND. The wiper terminal is unloaded and measured with a high-input-impedance voltmeter. Note 3: The DNL and INL are measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ = GND. For VDD = +5V, the wiper is driven with 400µA (MAX5477), 80µA (MAX5478), or 40µA (MAX5479). For VDD = +3V, the wiper is driven with 200µA (MAX5477), 40µA (MAX5478), or 20µA (MAX5479). Note 4: The wiper resistance is measured using the source currents given in Note 3. Note 5: The devices draw current in excess of the specified supply current when the digital inputs are driven with voltages between (VDD - 0.5V) and (GND + 0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics. Note 6: Wiper at midscale with a 10pF load (DC measurement). L_ = GND, an AC source is applied to H_, and the W_ output is measured. A 3dB bandwidth occurs when the AC W_/H_ value is 3dB lower than the DC W_/H_ value. Note 7: The programming current exists only during power-up and EEPROM writes. Note 8: The SCL clock period includes rise and fall times (tR = tF). All digital input signals are specified with tR = tF = 2ns and timed from a voltage level of (VIL + VIH) / 2. Note 9: Digital timing is guaranteed by design and characterization, and is not production tested. Note 10: This is measured from the STOP pulse to the time it takes the output to reach 50% of the output step size (divider mode). It is measured with a maximum external capacitive load of 10pF. Note 11: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the I2C-bus specification document linked to this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf Note 12: The idle time begins from the initiation of the STOP pulse. 4 _______________________________________________________________________________________ Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers SUPPLY CURRENT vs. TEMPERATURE (MAX5477) 0.6 VCC = 5V 0.4 VCC = 3V VCC = 5V 13 11 9 0.2 7 0 5 VCC = 3V 500 MAX5477/78/79 toc02 WP = GND 450 400 WIPER RESISTANCE (Ω) 0.8 15 MAX5477/78/79 toc1a WP = VDD SUPPLY CURRENT (µA) MAX5477/78/79 toc01 1.0 SUPPLY CURRENT (µA) WIPER RESISTANCE vs. INPUT CODE SUPPLY CURRENT vs. TEMPERATURE 350 300 250 200 150 100 50 -40 -15 10 35 60 85 TEMPERATURE (°C) 0 -40 -15 10 35 60 0 85 TAP-TO-TAP SWITCHING TRANSIENT TAP-TO-TAP SWITCHING TRANSIENT 32 64 96 128 160 192 224 256 INPUT CODE TEMPERATURE (°C) TAP-TO-TAP SWITCHING TRANSIENT MAX5477/78/79 toc04 MAX5477/78/79 toc03 MAX5477 CL = 10pF H_ = VDD FROM TAP 00 TO TAP 04 W_ 20mV/div MAX5478 CL = 10pF H_ = VDD FROM TAP 00 TO TAP 04 MAX5479 CW_ = 10pF H_ = VDD FROM TAP 00 TO TAP 04 1µs/div 200ns/div WIPER TRANSIENT AT POWER-ON MAX5477/78/79 toc07 MAX5477/78/79 toc06 W_ 20mV/div 400ns/div WIPER TRANSIENT AT POWER-ON WIPER TRANSIENT AT POWER-ON SDA 2V/div SDA 2V/div SDA 2V/div W_ 50mV/div MAX5477/78/79 toc05 VDD 2V/div MAX5477/78/79 toc08 VDD 2V/div VDD 2V/div W_ 1V/div W_ 1V/div W_ 1V/div 2µs/div MAX5479 TAP = 128 MAX5478 TAP = 128 MAX5477 TAP = 128 4µs/div 2µs/div _______________________________________________________________________________________ 5 MAX5477/MAX5478/MAX5479 Typical Operating Characteristics (VDD = +5V, H_ = VDD, L_ = GND, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VDD = +5V, H_ = VDD, L_ = GND, TA = +25°C, unless otherwise noted.) 0.2 MAX5478 0.2 0.15 0.05 0 0.1 INL (LSB) 0.20 0.10 0 32 64 96 -0.1 -0.2 -0.2 128 160 192 224 256 -0.3 0 32 64 96 CODE DIFFERENTIAL NONLINEARITY vs. CODE (VDM MODE) 0.2 0 0.10 0.04 0.02 0 -0.02 -0.1 -0.2 -0.3 -0.3 MAX5478 0.08 0.06 DNL (LSB) INL (LSB) 0 -0.2 128 160 192 224 256 DIFFERENTIAL NONLINEARITY vs. CODE (VRM MODE) 0.2 -0.1 96 INTEGRAL NONLINEARITY vs. CODE (VRM MODE) 0.1 0 64 CODE MAX5478 0.1 32 CODE MAX5477/78/79 toc13 MAX5478 128 160 192 224 256 0.3 MAX5477/78/79 toc12 0.3 0 -0.1 -0.3 0 DNL (LSB) 0.3 0.1 DNL (LSB) INL (LSB) 0.25 MAX5477 MAX5477/78/79 toc14 0.30 0.3 INTEGRAL NONLINEARITY vs. CODE (VDM MODE) MAX5477/78/79 toc10 MAX5477 MAX5477/78/79 toc09 0.35 DIFFERENTIAL NONLINEARITY vs. CODE (VDM MODE) MAX5477/78/79 toc11 INTEGRAL NONLINEARITY vs. CODE (VDM MODE) -0.04 -0.06 -0.08 64 96 64 96 128 160 192 224 256 64 96 128 160 192 224 256 DIFFERENTIAL NONLINEARITY vs. CODE (VDM MODE) INTEGRAL NONLINEARITY vs. CODE (VRM MODE) MAX5477/78/79 toc15 0.08 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.10 -0.12 -0.14 MAX5479 0 -0.04 -0.08 -0.12 -0.16 -0.20 64 96 128 160 192 224 256 CODE 0.20 MAX5479 0.16 0.12 0.08 INL (LSB) DNL (LSB) 0.04 32 32 INTEGRAL NONLINEARITY vs. CODE (VDM MODE) MAX5479 0 0 CODE 0.12 6 32 CODE 0.20 0.16 0 128 160 192 224 256 CODE MAX5477/78/79 toc17 32 -0.10 MAX5477/78/79 toc16 0 INL (LSB) MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers 0.04 0 -0.04 -0.08 -0.12 -0.16 -0.20 0 32 64 96 128 160 192 224 256 0 32 64 96 CODE _______________________________________________________________________________________ 128 160 192 224 256 CODE Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers CROSSTALK vs. FREQUENCY (MAX5477) -30 0 -0.04 -20 -40 -50 -60 -30 -40 -50 -60 -0.08 -70 -70 -0.12 -80 -80 -0.16 -90 -90 -0.20 -100 -100 32 64 96 128 160 192 224 256 0.1 1 10 100 1000 FREQUENCY (kHz) CODE CROSSTALK vs. FREQUENCY (MAX5479) -30 CW_ = 10pF 0 -1 -60 CW_ = 50pF -3 -1 -4 -2 -3 -4 -6 -90 -7 -7 -8 -8 10 100 1000 10,000 0.1 1 FREQUENCY (kHz) MIDSCALE WIPER RESPONSE vs. FREQUENCY (MAX5479) 1 0.1 1 10 100 1000 FREQUENCY (kHz) 1 MIDSCALE TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MAX5478) 10 MIDSCALE 1 THD+N (%) 0.1 THD+N (%) GAIN (dB) 0 1000 TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MAX5477) MAX5477/78/79 toc24 2 10 100 FREQUENCY (kHz) MAX5477/78/79 toc25 1 CW_ = 50pF -5 -100 0.1 1000 CW_ = 10pF 0 -6 -80 100 1 -5 -70 10 2 GAIN (dB) GAIN (dB) -50 1 MIDSCALE WIPER RESPONSE vs. FREQUENCY (MAX5478) -2 -40 0.1 FREQUENCY (kHz) 1 MAX5477/78/79 toc21 CW_ = 10pF -20 CROSSTALK (dB) 0.01 MIDSCALE WIPER RESPONSE vs. FREQUENCY (MAX5477) 0 -10 10,000 MAX5477/78/79 toc22 0 MAX5477/78/79 toc26 0.04 MAX5477/78/79 toc20 -20 CROSSTALK (dB) DNL (LSB) 0.08 CW_ = 10pF -10 CROSSTALK (dB) 0.12 CW_ = 10pF -10 0 MAX5477/78/79 toc19 MAX5479 0.16 0 MAX5477/78/79 toc18 0.20 CROSSTALK vs. FREQUENCY (MAX5478) MAX5477 toc23 DIFFERENTIAL NONLINEARITY vs. CODE (VRM MODE) -1 -2 CW_ = 10pF -3 0.1 0.01 0.01 0.001 -4 CW_ = 50pF 0.001 -5 0.1 1 10 FREQUENCY (kHz) 100 1000 0.0001 0.01 0.1 1 10 FREQUENCY (kHz) 100 0.01 0.1 1 10 100 FREQUENCY (kHz) _______________________________________________________________________________________ 7 MAX5477/MAX5478/MAX5479 Typical Operating Characteristics (continued) (VDD = +5V, H_ = VDD, L_ = GND, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VDD = +5V, H_ = VDD, L_ = GND, TA = +25°C, unless otherwise noted.) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY (MAX5479) 0.1 0.01 0.001 0.2 0 -0.2 -0.4 -0.6 0.0001 0.1 1 10 100 10 35 60 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -40 85 -15 0.3 0.2 0.1 0 -0.1 -0.2 600 550 500 SUPPLY CURRENT (µA) 0.4 35 SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE MAX5477/78/79 toc30 0.5 10 TEMPERATURE (°C) TEMPERATURE (°C) END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE (MAX5479) END-TO-END RESISTANCE CHANGE (%) 0.3 -0.5 -15 -40 FREQUENCY (kHz) WP = GND 450 400 350 300 250 200 -0.3 150 100 -0.4 50 VCC = 5V VCC = 3V 0 -0.5 -40 -15 10 35 TEMPERATURE (°C) 8 0.4 MAX5477/78/79 toc31 0.01 MAX5477/78/79 toc29 0.4 END-TO-END RESISTANCE CHANGE (%) 1 0.5 MAX5477/78/79 toc28 0.6 END-TO-END RESISTANCE CHANGE (%) MIDSCALE END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE (MAX5478) END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE (MAX5477) MAX5477/78/79 toc27 10 THD+N (%) MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers 60 85 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 DIGITAL INPUT VOLTAGE (V) _______________________________________________________________________________________ 60 85 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers PIN NAME FUNCTION TSSOP THIN QFN 1 15 HA Potentiometer A High Terminal 2 14 WA Potentiometer A Wiper Terminal 3 13 LA Potentiometer A Low Terminal 4 12 HB Potentiometer B High Terminal 5 11 WB Potentiometer B Wiper Terminal 6 10 LB Potentiometer B Low Terminal 7 9 WP Write-Protect Input. Connect to GND to allow changes to the wiper position and the data stored in the EEPROM. Connect to VDD or leave unconnected to enable the write protection of the EEPROM. See the Write Protect (WP) section for operating instructions. 8 7 GND 9 6 A2 Address Input 2. Connect to VDD or GND (see Table 1). 10 5 A1 Address Input 1. Connect to VDD or GND (see Table 1). 11 4 A0 12 3 SDA Address Input 0. Connect to VDD or GND (see Table 1). I2C Serial Data 13 2 SCL I2C Clock Input 14 1 VDD Power-Supply Input. Connect a +2.7V to +5.25V power supply to VDD and bypass VDD to GND with a 0.1µF capacitor installed as close to the device as possible. — 8, 16 N.C. — EP EP Ground No Connection. Do not connect. Exposed Paddle. Do not connect. SDA tBUF tSU:DAT tSU:STA tHD:DAT tLOW tHD:STA tSU:STO SCL tHIGH tHD:STA tR tF START CONDITION (S) REPEATED START CONDITION (SR) ACKNOWLEDGE (A) STOP CONDITION (P) START CONDITION (S) PARAMETERS ARE MEASURED FROM 30% TO 70%. Figure 1. I2C Serial-Interface Timing Diagram _______________________________________________________________________________________ 9 MAX5477/MAX5478/MAX5479 Pin Description MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers Detailed Description The MAX5477/MAX5478/MAX5479 contain two resistor arrays with 255 elements in each array. The MAX5477 has a total end-to-end resistance of 10kΩ, the MAX5478 has an end-to-end resistance of 50kΩ, and the MAX5479 has an end-to-end resistance of 100kΩ. The MAX5477/MAX5478/MAX5479 provide access to the high, low, and wiper terminals for a standard voltage-divider configuration. Connect H_, L_, and W_ in any desired configuration as long as their voltages remain between GND and VDD. A simple 2-wire I2C-compatible serial interface moves the wiper among the 256 tap points (Figure 2). A nonvolatile memory stores the wiper position and recalls the stored wiper position upon power-up. The nonvolatile memory is guaranteed for 50 years for wiper data retention and up to 200,000 wiper store cycles. Analog Circuitry The MAX5477/MAX5478/MAX5479 consist of two resistor arrays with 255 resistive elements; 256 tap points are accessible to the wipers, along the resistor string between H_ and L_. The wiper tap point is selected by programming the potentiometer through the I2C interface. An address byte, a command byte, and 8 data bits program the wiper position for each potentiometer. The H_ and L_ terminals of the MAX5477/MAX5478/ MAX5479 are similar to the two end terminals of a mechanical potentiometer. The MAX5477/MAX5478/ MAX5479 feature power-on reset circuitry that loads the wiper position from the nonvolatile memory at power-up. Table 1. Slave Addresses ADDRESS INPUTS H_ SLAVE ADDRESS A2 A1 A0 GND GND GND 0101000 GND GND VDD 0101001 GND VDD GND 0101010 GND VDD VDD 0101011 VDD GND GND 0101100 VDD GND VDD 0101101 VDD VDD GND 0101110 VDD VDD VDD 0101111 S256 R255 S255 R254 S254 RW 256-POSITION DECODER W_ S3 R2 WIPER CODE 02h S2 R1 S1 L_ Figure 2. Potentiometer Configuration 10 ______________________________________________________________________________________ Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers COMMAND WP = 0 WP = 1 Write to VREG I2C data is written to VREG. Wiper position updates with I2C data. No change to NVREG. Copy NVREG to VREG. Wiper position updates with NVREG data. No change to NVREG. Write to NVREG No change to VREG or wiper position. I2C data is written to NVREG. No change to VREG or wiper position. No change to NVREG. Copy NVREG to VREG Copy NVREG to VREG. Wiper position updates with NVREG data. No change to NVREG. Copy NVREG to VREG. Wiper position updates with NVREG data. No change to NVREG. Copy VREG to NVREG Copy VREG to NVREG. No change to VREG or wiper position. No change to VREG or wiper position. No change to NVREG. Table 3. Command Byte Summary ADDRESS BYTE 1 SCL CYCLE NUMBER 2 3 4 5 6 7 COMMAND BYTE 8 START (S) A6 A5 A4 A3 A2 A1 A0 DATA BYTE 9 10 11 12 13 14 15 16 17 18 ACK (A) TX NV V R3 R2 R1 R0 19 20 21 22 23 24 25 26 27 ACK ACK D7 D6 D5 D4 D3 D2 D1 D0 (A) (A) VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 NVREGxVREG 0 1 0 1 A2 A1 A0 0 0 1 1 0 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 VREGxNVREG 0 1 0 1 A2 A1 A0 0 0 1 0 1 0 0 0 1 D7 D6 D5 D4 D3 D2 D1 D0 VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 NVREGxVREG 0 1 0 1 A2 A1 A0 0 0 1 1 0 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 VREGxNVREG 0 1 0 1 A2 A1 A0 0 0 1 0 1 0 0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 VREG 0 1 0 1 A2 A1 A0 0 0 0 0 1 0 0 1 1 D7 D6 D5 D4 D3 D2 D1 D0 NVREG 0 1 0 1 A2 A1 A0 0 0 0 1 0 0 0 1 1 D7 D6 D5 D4 D3 D2 D1 D0 NVREGxVREG 0 1 0 1 A2 A1 A0 0 0 1 1 0 0 0 1 1 D7 D6 D5 D4 D3 D2 D1 D0 VREGxNVREG 0 1 0 1 A2 A1 A0 0 0 1 0 1 0 0 1 1 D7 D6 D5 D4 D3 D2 D1 D0 STOP NOTES (P) WIPER A ONLY WIPER B ONLY WIPERS A AND B Digital Interface Write Protect (WP) The MAX5477/MAX5478/MAX5479 feature an internal, nonvolatile EEPROM that stores the wiper state for initialization during power-up. The shift register decodes the command and address bytes, routing the data to the proper memory registers. Data written to a volatile memory register immediately updates the wiper position, or writes data to a nonvolatile register for storage (see Table 3). The volatile register retains data as long as the device is powered. Removing power clears the volatile register. The nonvolatile register retains data even after power is removed. Upon power-up, the power-on reset circuitry controls the transfer of data from the nonvolatile register to the volatile register. A write-protect feature prevents accidental overwriting of the EEPROM. Connect WP to VDD or leave unconnected to prevent any EEPROM write cycles. Writing to the volatile register (VREG) while WP = 1 updates the wiper position with the protected data stored in the nonvolatile register (NVREG). Connect WP to GND to allow write commands to the EEPROM and to update the wiper position from either the value in the EEPROM or directly from the I2C interface (Table 2). Connecting WP to GND increases the supply current by 19.6µA (max). To ensure a fail-safe, write-protect feature, write the data to be protected to both the nonvolatile and volatile registers before pulling WP high. Releasing WP (WP = 0) and sending partial or invalid I2C commands (such as single-byte address polling) can load the volatile ______________________________________________________________________________________ 11 MAX5477/MAX5478/MAX5479 Table 2. Write-Protect Behavior of VREG and NVREG MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers register with input shift register data and change the wiper position. Use valid 3-byte I 2C commands for proper operation. This precautionary operation is necessary only when transitioning from write protected (WP = 1) to not write protected (WP = 0). Serial Addressing The MAX5477/MAX5478/MAX5479 operate as slave devices that send and receive data through an I2C-/ SMBus™-compatible 2-wire serial interface. The interface uses a serial data access (SDA) line and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master, typically a microcontroller, initiates all data transfers to the MAX5477/MAX5478/MAX5479, and generates the SCL clock that synchronizes the data transfer (Figure 1). The MAX5477/MAX5478/MAX5479 SDA line operates as both an input and an open-drain output. The SDA line requires a pullup resistor, typically 4.7kΩ. The MAX5477/MAX5478/MAX5479 SCL line operates only as an input. The SCL line requires a pullup resistor (typically 4.7kΩ) if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. SCL and SDA should not exceed VDD in a mixed-voltage system, despite the open-drain drivers. Each transmission consists of a START (S) condition (Figure 3) sent by a master, followed by the MAX5477/MAX5478/MAX5479 7-bit slave address plus the NOP/W bit (Figure 4), 1 command byte and 1 data byte, and finally a STOP (P) condition (Figure 3). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master controller signals the beginning of a transmission with a START condition by transitioning SDA from high to low while SCL is high. The master controller issues a STOP condition by transitioning the SDA from low to high while SCL is high, when it finishes SDA 0 START 1 MSB 0 1 SDA SCL S P START CONDITION STOP CONDITION Figure 3. Start and Stop Conditions communicating with the slave. The bus is then free for another transmission (Figure 3). Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 5). Acknowledge The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 6). Thus, each byte transferred effectively requires 9 bits. The master controller generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, so the SDA line remains stable low during the high period of the clock pulse. Slave Address The MAX5477/MAX5478/MAX5479 have a 7-bit-long slave address (Figure 4). The 8th bit following the 7-bit slave address is the NOP/W bit. Set the NOP/W bit low for a write command and high for a no-operation command. The MAX5477/MAX5478/MAX5479 provide three address inputs (A0, A1, and A2), allowing up to eight devices to share a common bus (Table 1). The first 4 bits (MSBs) of the MAX5477/MAX5478/MAX5479 slave addresses are always 0101. A2, A1, and A0 set the next A2 A1 A0 NOP/W LSB SCL Figure 4. Slave Address SMBus is a trademark of Intel Corporation. 12 ______________________________________________________________________________________ ACK Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers SDA MAX5477/MAX5478/MAX5479 CLOCK PULSE FOR ACKNOWLEDGMENT START CONDITION SCL 1 2 8 9 NOT ACKNOWLEDGE SCL SDA DATA STABLE, DATA VALID CHANGE OF DATA ALLOWED ACKNOWLEDGE Figure 5. Bit Transfer Figure 6. Acknowledge D15 COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION D14 D13 D12 D11 D10 D9 D8 ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 S SLAVE ADDRESS 0 COMMAND BYTE A A P ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 NOP/W Figure 7. Command Byte Received ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX5477/MAX5478/MAX5479 REGISTERS D15 D14 D13 D12 D11 D10 D9 ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 D8 D7 D6 D5 D4 D3 D2 D1 D0 ACKNOWLEDGE FROM MAX5477/MAX5478/MAX5479 S SLAVE ADDRESS 0 A COMMAND BYTE NOP/W A DATA BYTE A P 1 BYTE Figure 8. Command and Single Data Byte Received 3 bits in the slave address. Connect each address input to VDD or GND to set these 3 bits. Each device must have a unique address to share a common bus. Message Format for Writing Write to the MAX5477/MAX5478/MAX5479 by transmitting the device’s slave address with NOP/W (8th bit) set to zero, followed by at least 1 byte of information (Figure 7). The 1st byte of information is the command byte. The bytes received after the command byte are the data bytes. The 1st data byte goes into the internal register of the MAX5477/MAX5478/MAX5479 as selected by the command byte (Figure 8). Command Byte Use the command byte to select the source and destination of the wiper data (nonvolatile or volatile memory registers) and swap data between nonvolatile and volatile memory registers (see Table 3). Command Descriptions VREG: The data byte writes to the volatile memory register and the wiper position updates with the data in the volatile memory register. NVREG: The data byte writes to the nonvolatile memory register. The wiper position is unchanged. NVREGxVREG: Data transfers from the nonvolatile memory register to the volatile memory register (wiper position updates). ______________________________________________________________________________________ 13 MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers 5V 5V H_ 30V 30V W_ MAX5477 MAX5478 MAX5479 MAX480 H_ VOUT L_ MAX5477 MAX5478 MAX5479 MAX480 VOUT W_ L_ Figure 9. Positive LCD Bias Control Using a Voltage-Divider VREGxNVREG: Data transfers from the volatile memory register into the nonvolatile memory register. Nonvolatile Memory The internal EEPROM consists of a 16-bit nonvolatile register that retains the value written to it prior to power down. The nonvolatile register is programmed with the midscale value at the factory. The nonvolatile memory is guaranteed for 50 years for wiper position retention and up to 200,000 wiper write cycles. A write-protect feature prevents accidental overwriting of the EEPROM. Connect WP to VDD or leave open to enable the writeprotect feature. The wiper position only updates with the value in the EEPROM when WP = VDD. Connect WP to GND to allow EEPROM write cycles and to update the wiper position from nonvolatile memory or directly from the I2C serial interface. Power-Up Upon power-up, the MAX5477/MAX5478/MAX5479 load the data stored in the nonvolatile memory register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile memory register. This initialization period takes 10µs. Standby The MAX5477/MAX5478/MAX5479 feature a low-power standby mode. When the device is not being programmed, it enters into standby mode and supply current drops to 500nA (typ). Applications Information The MAX5477/MAX5478/MAX5479 are ideal for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the display contrast), or for programmable filters with adjustable gain and/or cutoff frequency. 14 Figure 10. Positive LCD Bias Control Using a Variable Resistor Positive LCD Bias Control Figures 9 and 10 show an application where the MAX5477/MAX5478/MAX5479 provide an adjustable, positive LCD bias voltage. The op amp provides buffering and gain to the resistor-divider network made by the potentiometer (Figure 9) or by a fixed resistor and a variable resistor (see Figure 10). Programmable Filter Figure 11 shows the MAX5477/MAX5478/MAX5479 in a 1st-order programmable application filter. Adjust the gain of the filter with R2, and set the cutoff frequency with R3. Use the following equations to calculate the gain (A) and the -3dB cutoff frequency (fC): A = 1+ fC = R1 R2 1 2π × R 3 × C Offset Voltage and Gain Adjustment Connect the high and low terminals of one potentiometer of a MAX5477 between the NULL inputs of a MAX410 and the wiper to the op amp’s positive supply to nullify the offset voltage over the operating temperature range. Install the other potentiometer in the feedback path to adjust the gain of the MAX410 (Figure 12). Adjustable Voltage Reference Figure 13 shows the MAX5477/MAX5478/MAX5479 used as the feedback resistors in multiple adjustable voltage reference applications. Independently adjust the output voltages of the MAX6160 parts from 1.23V to V IN - 0.2V by changing the wiper positions of the MAX5477/MAX5478/MAX5479. ______________________________________________________________________________________ Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers V+ VIN R3 C MAX410 7 6 MAX410 R1 2 HB 4 R2 = RHL x D / 256 WHERE RHL = END-TO-END RESISTANCE AND = D DECIMAL VALUE OF WIPER CODE R1 HB WB R2 1 8 V- R2, R3 = RHL x D / 256 WHERE RHL = END-TO-END RESISTANCE AND D = DECIMAL VALUE OF WIPER CODE LA HA VOUT 3 MAX5477 MAX5478 MAX5479 1/2 MAX5477 WA LA HA MAX5477/MAX5478/MAX5479 5V WA 1/2 MAX5477 R2 WB LB LB Figure 11. Programmable Filter Figure 12. Offset Voltage Adjustment Circuit 5V IN V OUT1 OUT IN OUT 10kΩ FOR THE MAX5477 R 50kΩ VOUT_ = 1.23V x FOR THE MAX5478 R 100kΩ VOUT_ = 1.23V x FOR THE MAX5479 R VOUT_ = 1.23V x VOUT2 HB HA MAX6160 MAX6160 ADJ 1/2 MAX5477 1/2 MAX5478 1/2 MAX5479 WA R GND LA ADJ 1/2 MAX5477 1/2 MAX5478 1/2 MAX5479 WB R GND WHERE R = RHL x D / 256 AND D = DECIMAL VALUE OF WIPER CODE LB Figure 13. Adjustable Voltage Reference Pin Configurations Chip Information TRANSISTOR COUNT: 12,651 PROCESS: BiCMOS TOP VIEW VDD 1 SCL 2 SDA A0 N.C. HA WA LA 16 15 14 13 12 HB MAX5477 MAX5478 MAX5479 3 11 WB 10 LB 4 9 5 6 7 8 A1 A2 GND N.C. THIN QFN (3mm x 3mm) WP HA 1 14 VDD WA 2 13 SCL LA 3 HB 4 MAX5477 MAX5478 MAX5479 12 SDA 11 A0 WB 5 10 A1 LB 6 9 A2 WP 7 8 GND TSSOP (4.4mm x 5mm) ______________________________________________________________________________________ 15 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) (NE - 1) X e E MARKING 12x16L QFN THIN.EPS MAX5477/MAX5478/MAX5479 Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers E/2 D2/2 (ND - 1) X e AAAA D/2 e CL D D2 k CL b 0.10 M C A B E2/2 L E2 0.10 C C L 0.08 C C L A A2 A1 L L e e PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 PKG 8L 3x3 12L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 b 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 D 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 E 2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10 e L 0.65 BSC. 0.35 N 0.75 0.45 0.02 0 - 0.02 0.25 - 0.50 4 4 0.05 0 0.20 REF - 0.40 16 3 0.05 0.20 REF 0.25 0.30 3 2 0 A1 A2 0.65 12 2 NE 0.55 0.02 0.05 0.20 REF - 0.25 - 1 2 EXPOSED PAD VARIATIONS 0.50 BSC. 0.50 BSC. 8 ND k 0.55 16L 3x3 I PKG. CODES E2 D2 PIN ID JEDEC MIN. NOM. MAX. MIN. NOM. MAX. TQ833-1 0.25 0.70 1.25 0.25 0.70 1.25 0.35 x 45° T1233-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-3 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1233-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-1 T1633-2 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° T1633F-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 T1633FH-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45° WEED-2 WEEC WEED-2 T1633-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 T1633-5 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45° WEED-2 - NOTES: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. N IS THE TOTAL NUMBER OF TERMINALS. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. DRAWING CONFORMS TO JEDEC MO220 REVISION C. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY. WARPAGE NOT TO EXCEED 0.10mm. PACKAGE OUTLINE 8, 12, 16L THIN QFN, 3x3x0.8mm 21-0136 16 I 2 2 ______________________________________________________________________________________ Dual, 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers TSSOP4.40mm.EPS PACKAGE OUTLINE, TSSOP 4.40mm BODY 21-0066 I 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX5477/MAX5478/MAX5479 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)