AKM AKD4113-B

ASAHI KASEI
[AKD4113-B]
AKD4113-B
AK4113-B Evaluation Board Rev.1
GENERAL DESCRIPTION
AKD4113-B is the evaluation board for AK4113, 192kHz digital audio receiver. This board has optical,
cannon connector and BNC connector to interface with other digital audio equipment.
„ Ordering guide
AKD4113-B
---
Evaluation board for AK4113
(A cable for connecting with printer port of IBM-AT compatible PC
and a control software are packed with this.)
FUNCTION
† Digital interface
-S/PDIF :
6 channel input (optical or BNC)
1 channel output (optical or BNC)
- Serial audio data I/F :
1 output (for DIR data output. 10-pin port)
-Serial control data I/F
1 input/output port (10-pin port)
5V
GND
REG
Control
3.3V
Opt
RX1
RX2
AK4113
RX6
Opt
TX0
Serial Data out
(For DIR)
Figure 1. AKD4113-B Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
<KM076501>
2004/11
-1-
ASAHI KASEI
[AKD4113-B]
Evaluation Board Manual
„ Operating sequence
(1) Set up the power supply lines.
[+ 5V]
(Red) = 5V
[GND]
(Black) = 0V
(2) Set up the evaluation mode and jumper pins. (Refer to the following item.)
(3) Connect cables. (Refer to the following item.)
(4) Power on.
The AK4113 should be reset once bringing PDN(SW2) “L” upon power-up.
„ Evaluation modes
(1) Evaluation for DIR
S/PDIF in (optical or BNC) – AK4113 – Serial Data out (10pin port)
The DIR generates MCLK, BICK and LRCK SDATA from the received data through optical
connector(PORT1: TORX176) or BNC connector. The AKD4113-B can be connected with the AKM’s DAC
evaluation board via 10-line cable.
a.
Set-up of Bi-phase Input
RX1 and RX2-6 should not select BNC connector at the same time.
a-1. RX1
Connector
JP2(RX1)
Optical (PORT1)
OPT
BNC (J2)
BNC
Table 1. Set-up of RX1
a-2. RX2, 3, 4, 5 and 6 can be inputted from a BNC (J2) connector only.
Only RX1 and RX5 can be used in parallel mode.
a-2-1. Set-up of the jumper on the sub board.
Mode
Serial mode
Parallel mode
JP19
RX2
DIF0
JP21
JP22
JP23
JP24
RX3
RX4
RX6
RX4
DIF1
DIF2
IPS
IPS
Table 2. Set-up of the Jumper on the sub board
JP25
RX5
DIF0
JP26
RX6
DIF1
a-2-2. Set-up of the jumper on the main board.
RX3
RX4
RX5
RX6
RX2
JP6
JP7
JP8
JP9
JP5
JP
Short
RX4
RX5
RX6
Short
The jumper, which selects the Rx channel, should be Short.
Table 3. Set-up of RX2, 3, 4, 5 and 6
Input
<KM076501>
2004/11
-2-
ASAHI KASEI
[AKD4113-B]
a-3. Set-up of AK4113 input path
It sets up by SW 1_1 (IPS pin) in parallel mode. Please set up IPS2-0 bits in serial mode.
IPS2 bit
0
0
0
0
1
1
1
1
IPS1 bit
IPS0 bit
INPUT Data
0
0
RX1
0
1
RX2
1
0
RX3
1
1
RX4
0
0
RX5
0
1
RX6
1
0
No use
1
1
No use
Table 4. Recovery Data Select (Serial)
Default
IPS0 pin
INPUT Data
L
RX1
Default
H
RX5
Table 5. Recovery Data Select (parallel mode)
b.
Set-up of clock input and output
SDTO
5
NC
GND
BICK
LRCK
GND
10
GND
1
GND
PORT2
DIR
MCLK
The signal level outputted/inputted from PORT2 is 3.3V.
6
Figure 2. PORT2 pin layout
b-1. MCKO1/MCKO2
The output of MCKO1 pin or MCKO2 pin can be selected by JP12. The output frequency of MCKO1/MCKO2
is selected by OCKS 1-0.
Output
JP12
signal
Default
MCKO1
MCKO1
MCKO2
MCKO2
Table 6. MCKO1/MCKO2 set-up
OCKS1 pin
(SW3_2)
OCKS1 bit
OCKS0 pin
(SW3_3)
OCKS0 bit
0
0
1
1
0
1
0
1
(X’tal)
MCKO1
MCKO2
256fs
256fs
256fs
256fs
256fs
128fs
512fs
512fs
256fs
128fs
128fs
64fs
Table 7. Master Clock Frequency Select
<KM076501>
fs (max)
96 kHz
96 kHz
48 kHz
192 kHz
Default
2004/11
-3-
ASAHI KASEI
[AKD4113-B]
b-2. Set-up of BICK and LRCK input and output
Please select SW 2_7 (DIR_I/O) according to the setup of audio format of AK4113 (Refer to Table 7).
Output signal
SW3_7 (DIR_I/O)
Slave mode
0
Master mode
1
Table 8. DIR_I/O set-up
c.
Default
Set-up of Audio data format
It sets up by SW 1_2, SW 1_3 and SW1_4 in parallel mode. Please set up DIF2-0 bit in serial mode.
DIF2 pin
(SW1_4)
DIF2 bit
DIF1 pin
(SW1_3)
DIF1 bit
DIF0 pin
(SW1_2)
DIF0 bit
0
0
0
0
1
0
0
1
2
0
1
0
3
0
1
1
4
1
0
0
5
1
0
1
6
1
1
0
7
1
1
1
Mode
DAUX
SDTO
LRCK
BICK
I/O
24bit, Left
justified
24bit, Left
justified
24bit, Left
justified
24bit, Left
justified
24bit, Left
justified
24bit, I2S
24bit, Left
justified
16bit, Right
justified
18bit, Right
justified
20bit, Right
justified
24bit, Right
justified
24bit, Left
justified
24bit, I2S
24bit, Left
justified
24bit, I2S
24bit, I2S
I/O
H/L
O
64fs
O
H/L
O
64fs
O
H/L
O
64fs
O
H/L
O
64fs
O
H/L
O
64fs
O
L/H
O
O
H/L
I
L/H
I
64fs
64128fs
64128fs
I
Default
I
Table 9. Audio data format
d.
Set-up of CM1 and CM0
The operation mode of PLL is selected by CM1 and CM0. In parallel mode, it can be selected by SW2_1 and
JP18. In serial mode, it can be selected by CM1-0 bits.
CM1 pin
(SW3_1)
CM1 bit
CM0 pin (JP18)
(UNLOCK)
PLL
X'tal
Clock
source
SDTO
source
0
1
ON
OFF
ON
ON
ON (Note)
ON
ON
ON
PLL (RX)
X'tal
PLL (RX)
X'tal
RX
DAUX
RX
DAUX
CM0 bit
0
0
0 (CM0)
1 (CDTO/CM0=H)
1
0 (CM0)
Default
1
1 (CDTO/CM0=H)
ON
ON
X'tal
DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-Down)
Note: When the X’tal is not used as clock comparison for fs detection (XTL0, 1= “1,1”), the X’tal is OFF.
Table 10. Clock Operation Mode Select
<KM076501>
2004/11
-4-
ASAHI KASEI
[AKD4113-B]
(2) Evaluation for DIT
S/PDIF in (optical or BNC)– AK4113 – S/PDIF out (optical or BNC)
a.
Set-up of a Bi-phase output signal
As for TX, only the loop back mode of RX corresponds. In serial mode, it can be selected by OPS2-0 bits.
This mode is not supported in parallel mode.
Connector
JP13 (TX)
Optical (PORT4)
OPT
BNC (J4)
BNC
Table 11. Set-up of TX
„ Serial control
The AK4113 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT6
(uP-I/F) with PC by 10-line flat cable packed with the AKD4113-B. Take care of the direction of connector. There
is a mark at pin#1. The pin layout of PORT6 is as Figure 3.
GND
GND
GND
GND
CCLK
CSN
1
CDTI
2
NC
PORT6
uP I/F
GND
SW1_6
JP18
CDTO/CM0=“H”
L
SDA and CM0=“L”(Note)
H
Note: In IIC mode, the chip address is fixed to “01”.
Table 12. Set-up of parallel mode and serial mode
CDTO
Mode
4 wire Serial
IIC
JP20
IIC
IIC
10
9
Figure 3. PORT6 pin layout
This evaluation board encloses control software. A software operation procedure is included in an evaluation board
manual.
<KM076501>
2004/11
-5-
ASAHI KASEI
[AKD4113-B]
„ Toggle switch set-up
SW2
PDN
„ LED indication
LE1
INT0
LE2
INT1
Reset switch for AK4113. Set to “H” during normal operation. Bring to “L” once after the
power is supplied.
Bright when INT0 pin goes to “H”.
Bright when INT1 pin goes to “H”.
„ DIP switch (SW1) set-up: -off- means “L”
No.
Switch Name
Function
1
IPS0
Set-up of IPS0 pin. (in parallel mode)
2
DIF0
Set-up of DIF0 pin. (in parallel mode)
3
DIF1
Set-up of DIF1 pin. (in parallel mode)
4
DIF2
Set-up of DIF2 pin. (in parallel mode)
5
IPS1/IIC
Set-up of IIC pin. (in serial mode) “L”: 4 wire Serial, “H”: IIC
Set-up
of P/SN pin. “L”: Serial mode, “H”: parallel mode
6
P/SN
7
TEST
Don’t care
8
ACKS
Don’t care
„ DIP switch (SW3) set-up: -off- means “L”
No.
Switch Name
Function
1
CM1
Set-up of CM1 pin. (in parallel mode)
2
OCKS1
Set-up of OCKS1 pin. (in parallel mode)
3
OCKS0
Set-up of OCKS0 pin. (in parallel mode)
4
PSEL
Don’t care
5
XTL0
Don’t care
6
XTL1
Don’t care
Set-up of the transmission direction of 74AC245
DIR_I/O
7
“L”: When inputting from PORT2, “H”: When outputting from PORT2
8
DIT_I/O
Don’t care
<KM076501>
2004/11
-6-
ASAHI KASEI
„ Jumper set up.
No.
Jumper Name
1
D3V/VD
2
RX1
5,6
RX2-3
7,8,9,10
RX4-7
11,12
DIR MCLK ,
DIT MCLK
13
TX0
18
SDA/CDTO
19
RX2/DIF0
20
IIC/FS96
21
RX3/DIF1
22
RX4/DIF2
23
RX6/IPS
24
RX4/IPS
25
RX5/DIF0
26
RX6/DIF1
[AKD4113-B]
Function
Set-up of Power supply source for 74AC245.
D3V : D3V (default)
VD : VD
Set-up of RX1 input circuit.
OPT : Optical (default)
BNC : BNC
Set-up of RX2-3 input circuit.
RX4-7 set-up depending serial/parallel mode
RX4-7 : Serial mode (default)
DIF2-0,IPS0 : Parallel mode
MCKO set-up for PORT5(DIT) and PORT2(DIR)
MCKO1 : MCKO1 of AK4113 (default)
MCKO2 : MCKO2 of AK4113
Set-up of TX0 output circuit.
OPT : Optical (default)
BNC : BNC
Set-up of SDA/CDTO pin.
4 wire Serial : CDTO/CM0=“H”. (default)
IIC : SDA and CM0=“L”
Set-up depending serial/parallel mode
RX2: Serial mode (default)
DIF0: Parallel mode
Set-up depending serial/parallel mode
IIC: Serial mode (default)
FS96: Parallel mode
Set-up depending serial/parallel mode
RX3: Serial mode (default)
DIF1: Parallel mode
Set-up depending serial/parallel mode
RX4: Serial mode (default)
DIF2: Parallel mode
Set-up depending serial/parallel mode
RX6: Serial mode (default)
IPS: Parallel mode
Set-up depending serial/parallel mode
RX4: Serial mode (default)
IPS: Parallel mode
Set-up depending serial/parallel mode
RX5: Serial mode (default)
DIF0: Parallel mode
Set-up depending serial/parallel mode
RX6: Serial mode (default)
DIF1: Parallel mode
<KM076501>
2004/11
-7-
ASAHI KASEI
[AKD4113-B]
Control Software Manual
„ Set-up of evaluation board and control software
1. Set up the AKD4113-B according to previous term.
2. Connect IBM-AT compatible PC with AKD4113-B by 10-line type flat cable (packed with AKD4113-B). Take care
of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on
Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”.
In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows
NT.)
3. Insert the CD-ROM labeled “AKD4113-B Evaluation Kit” into the CD-ROM drive.
4. Access the CD-ROM drive and double-click the icon of “akd4113-b0.exe” to set up the control program.
5. Then please evaluate according to the follows.
„ Operation flow
Keep the following flow.
1. Set up the control program according to explanation above.
2. Click “Write default” button.
3. Then set up the dialog and input data.
„ Explanation of each buttons
1. [Port Setup] :
Set up the printer port.
2. [Write default] :
Initialize the register of AK4113.
3. [All Write] :
Write all registers that is currently displayed.
4. [Read All] :
All the registers of AK4113 are read.
5. [Function1] :
Dialog to write data by keyboard operation.
6. [F3] :
Dialog of sequential writing.
7. [SAVE] :
Save the current register setting.
8. [OPEN] :
Write the saved values to all register.
9. [Write] :
Dialog to write data by mouse operation.
10. [Read] :
The data corresponding to each register is read.
<KM076501>
2004/11
-8-
ASAHI KASEI
[AKD4113-B]
„ Explanation of each dialog
1. [Function1 Dialog] : Dialog to write data by keyboard operation
Address Box:
Data Box:
Input register address in 2 figures of hexadecimal.
Input register data in 2 figures of hexadecimal.
If you want to write the input data to AK4113, click “OK” button. If not, click “Cancel” button.
2. [Write Dialog] : Dialog to write data by mouse operation
There are dialogs corresponding to each register.
Click the “Write” button corresponding to each register to set up the dialog. If you check the check box, data
becomes “H” or “1”. If not, “L” or “0”.
If you want to write the input data to AK4113, click “OK” button. If not, click “Cancel” button.
„ Indication of data
Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the
part that is not defined in the datasheet.
„ Attention on the operation
If you set up Function1 dialog, input data to all boxes. Attention dialog is indicated if you input data or address that is not
specified in the datasheet or you click “OK” button before you input data. In that case set up the dialog and input data once
more again. These operations does not need if you click “Cancel” button or check the check box.
<KM076501>
2004/11
-9-
ASAHI KASEI
[AKD4113-B]
Revision History
Date
(YY/MM/DD)
04/11/11
04/11/30
Manual
Revision
KM076500
KM076501
Board
Revision
0
1
Reason
Contents
First Edtion
Modification
Circuit diagram (U1-15 pin and U1-1 pin) is changed
IMPORTANT NOTICE
• These products and their specifications are subject to change without notice. Before considering any use or
application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor
concerning their current status.
• AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application
or use of any information contained herein.
• Any export of these products, or devices or systems containing them, may require an export license or other
official approval under the law and regulations of the country of export pertaining to customs and tariffs,
currency exchange, or strategic materials.
• AKM products are neither intended nor authorized for use as critical components in any safety, life support, or
other hazard related device or system, and AKM assumes no responsibility relating to any such use, except
with the express written consent of the Representative Director of AKM. As used here:
(a) A hazard related device or system is one designed or intended for life support or maintenance of safety or
for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
(b) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing
it, and which must therefore meet very high standards of performance and reliability.
• It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise
places the product with a third party to notify that party in advance of the above content and conditions, and the
buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from
any and all claims arising from the use of said product in the absence of such notification.
<KM076501>
2004/11
- 10 -
5
4
3
2
1
33
34
35
INT0
36
INT1
37
CM0/CDTO/CAD1
39
38
CM1/CDTI/SDA
IIC
OCKS1/CCLK/SCL
OCKS0/CSN/CAD
D
40
41
42
43
44
I2C
45
46
47
48
CN3
INT0
D
INT1
CN4
U7
CN2
1
49
52
C23
5p
54
2
DVSS
CM1/CDTI/SDA
29
3
TVDD
OCKS1/CCLK/SCL
28
4
V/TX
OCKS0/CSN/CAD0
27
5
XTI
MCKO1
26
6
XTO
MCKO2
25
7
PDN
DAUX
24
8
R
BICK
23
9
AVDD
SDTO
22
10
AVSS
LRCK
21
11
RX1
INT0
20
32
2
31
30
5p
55
29
27
11.2896MHz
56
26
R61
25
15k
24
1
57
C25
10u
+
C26
0.1u
2
RX1
23
59
RX2
22
JP19
2
I2C
12
RX2/DIF0
FS96/I2C
19
JP21
2
13
RX3/DIF1
P/SN
18
JP22
2
14
RX4/DIF2
INT1
17
IIC
TVDD
TVDD
21
B
2
1
RX2
DIF0
3
FS96
1
61
1
RX3
3
DIF1
20
P/SN
RX3
1
RX4
3
DIF2
19
INT1
JP23
63
RX6
RX5
RX6/IPS
16
IPS
3
1
IPS/RX4
18
2
15
3
JP24
RX4
2
64
TXO
JP20
B
62
V/TX
INT0
3
60
C
28
X1
C24
58
30
P/SN
2
P/SN
1
C
CM0/CDTO/CAD1
AVDD
V/TX
53
DVDD
0.1u
C22
1
TVDD
1
C20
0.1u
2
51
10u
C21
+
+
50
C19
10u
FS96
1
IPS
17
AK4113
JP25
JP26
RX5
DIF1
RX6
LRCK
A
16
SDTO
15
BICK
14
13
12
MCKO2
11
MCKO1
10
9
8
7
6
DAUX
DIF2/RX7
5
PDN
4
DIF1/RX6
3
1
2
DIF0/RX5
2
2
A
1
3
1
3
DIF0
Title
CN1
Size
A3
Date:
5
4
3
2
AKD4113-B
Document Number
R ev
SUB
Tuesday, November 30, 2004
1
Sheet
1
3
of
3
5
4
3
2
1
CN4
D3V
VD
JP1
1
D3V
2
3
VD
PORT1
For U3, U4
6
6
D3V/VD
5
5
L1
4
3
2
1
GND
VCC
GND
OUT
C7
TORX176
C1
C2 C3 C4
C5
0.1u
0.1u0.1u0.1u
0.1u 0.1u
0.1u
C6
49
10u
1
1
For U1, U2, U5
D3V
2
VD
50
C8
+
2
For U6
VD
R1
10u
51
JP2
OPT 1
XLR 3
B NC 5
470
D
2
4
6
AVDD
1
OUT
C11
47u
IN
3
10u
1
RX1
R4
0.1u
AVDD
AVDD
2
1
RX2
2
C15
47u
IPS0
D IF0
D IF1
DIF2/XSEL
IPS1/IIC
P/SN/ANS
TEST
ACKS
R8
D3V
short
2
SW1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
9
8
7
6
5
4
3
2
1
61
JP7
1
RX4
2
3
IPS0
D3V
RX3
AVDD
AVDD
IPS0/RX4
JP8
1
RX5
2
3
D IF0
RP1
JP9
1
RX6
2
3
D IF1
TEST
TEST
DIF1/RX6
100
R12
K
EMCK2
H
1
DAUX2
R10
DAUX
DAUX2
8
MCKO1
R22
R23
100k
47k
47k
47k
47k
47k
47k
R70
R71
R72
R73
R74
R75
18
17
16
15
14
13
12
11
B0
B1
B2
B3
B4
B5
B6
B7
20
D3V/VD
U3
GND
100k
R15
R16
R18
R20
A0
A1
A2
A3
A4
A5
A6
A7
2
3
4
5
6
7
8
9
DIR
OE
1
19
47k
47k
47k
47k
47k
47k
3
4
5
6
7
8
MCKO2
100
R76
R77
R78
R79
R80
R81
10
R13
OVDD
OVDD
100
R14
100
R17
BICK
100
100
R19
R21
SDTO
11
12
13
LRCK
14
15
A
16
74AC245
10
DIR
A
100
100
100
100
2
MCKO
DIT_MCLK
JP12
MCKO1 1
2
3
MCKO2
DIR_MCLK
MCLK
BICK
LRCK
SDTO
DAUX
1
9
JP11
1
MCKO1
2
3
MCKO2
0.1u
74LVC157
D3V/VD
64
100
C16
SW2
PDN
3
L
U2B
74HC14
4
VIN
VIN
7
12
R11
14
4Y
100
7
9
A
7
3Y
C
63
B
U2A
74HC14
2
3
2Y
D3V
10k
D1
1S1588
1
G
A/B
4
DVDD
DVDD
2
15
1
1Y
DIF2/XSEL/RX7
14
16
1A
1B
2A
2B
3A
3B
4A
4B
D3V
EMCK1
R9
D3V
2
3
5
6
11
10
14
13
GND
U1
B
PDN
JP10
1
RX7
2
3
DIF2/XSEL
D3V
62
CN1
DIF0/RX5
IPS1/IIC
P/SN/ANS
TEST
ACKS
47k
1
2
3
4
5
60
JP6
1
short
PORT2
G ND 10
G ND 9
G ND 8
G ND 7
NC
6
59
JP5
+
OVDD
C
58
R5
75
1
3
C14
47u
IN
C13
1
1
1
2
R7
OUT
GND
2
57
J2
RX0
2
3
4
5
T3
TA48M033F
+
56
VD
R6
short
54
TVDD/VDD
short
DVDD
53
55
2
2
1
+
2
short
GND
R3
AVDD
ACKS
ACKS
+5V
L2
52
D
P/SN/ANS
P/SN/ANS
T2
LP2950A
AVDD
DIR_I/O
Title
Size
A3
Date:
5
4
3
2
AKD4113-B
Document Number
R ev
MAIN
Tuesday, November 30, 2004
1
Sheet
1
1
of
2
5
4
3
2
1
CN2
B
GND
+5V
T45_BK
T45_BK
1
1
C
U
17
18
19
+5V
VOUT
20
D
D
JP13
PORT4
5
5
6
6
TX0
IN
VCC
IF
GND
1
4
3
2
1
VD
TVDD
TVDD/VDD
OPT
2
TX0
3
21
22
B NC
C17
R33
1k
TOTX176
23
0.1u
24
J4
T5
TX0
2
3
4
5
R36
DA02-F
1
4
25
8
R37
1
5
1:1
240
26
150
27
28
29
OVDD
OVDD
C
30
C
31
14
32
LE1
A
CN3
U2C
R45
K
6
EMCK
EMCK2
5
1k
INT0
33
34
14
7
74HC14
INT1
9
D3V
10k
R49
470
R51
10k
R52
470
R54
10k
R55
470
U2E
11
10
PORT6
10
8
6
4
2
14 7
74HC14
U2F
9
7
5
3
1
CSN
R56
SCL/CCLK
SDA/CDTI
51
SDA(ACK)/CDTO
P/SN/ANS
2
3
5
6
11
10
14
13
1A
1B
2A
2B
3A
3B
4A
4B
15
1
G
A/B
CM0/CDTO/CAD1
1Y
4
2Y
7
3Y
9
4Y
12
CM1/CDTI/SDA
100
R53
37
38
B
100
VD
OCKS1/CCLK/SCL
39
U6A
OCKS0/CSN/CAD0
1
2
74LVC157
12
36
R50
DVDD
74LS07
8
13
35
DVDD
40
41
7
14
VD
B
U5
R48
74HC14
14
1k
16
8
7
INT1
U2D
R47
K
D3V
A
GND
LE2
D3V
INT0
uP-I/F
7
74HC14
R58
JP18
D3V
CM1/FS1
OCKS1/FS2
OCKS0/FS0
PSEL
XTL0/CKS1
XTL1/TRANS
DIR_I/O
DIT_I/O
SW3
1
2
3
4
5
6
7
8
SDA
CDTO/CM0=H
CM0=L
10k
16
15
14
13
12
11
10
9
D3V
1
3
5
D3V
42
R57
R59
10k
2
4
6
R60
SDA/CDTO
100
43
100
IPS1/IIC
PSEL
D3V/VD
XTL0
RP2
XTL1
U6D
8
9
74LS07
47k
U6C
6
5
11
U6E
10
Title
74LS07
Size
A3
Date:
5
4
3
47
A
74LS07
7
7
74LS07
46
12
74LS07
7
DIR_I/O
DIT_I/O
45
48
U6F
13
44
7
U6B
4
3
7
9
8
7
6
5
4
3
2
1
A
IPS1/IIC
2
AKD4113-B
Document Number
R ev
MAIN
Tuesday, November 30, 2004
1
Sheet
1
2
of
2