ARTESYN PTH12050Y

PTHxx050Y
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
•
•
•
•
•
•
•
•
•
•
•
Non-isolated DDR/QDR Memory Bus Termination Module
1
VTT bus termination output (output tracks the system VREF)
6 A output current (8 A Peak)
3.3 Vdc, 5 Vdc or 12 Vdc input voltage
DDR and QDR compatible
ON/OFF inhibit (for VTT standby)
Under-voltage lockout
Operating temperature range: -40 ºC to +85 ºC
Efficiencies up to 88%
Output overcurrent protection (non-latching, auto-reset)
Point-of-Load-Alliance (POLA) compatible
Available RoHS compliant
NEW Product
The PTHxx050Y are a new series of non-isolated dc-dc converters designed
specifically for bus termination in DDR and QDR memory applications. Operating from
either a 3.3 Vdc, 5 Vdc or 12 Vdc input, the modules generate a VTT output that will
source or sink up to 6 A of current to accurately track their VREF input. VTT is the
required bus termination supply voltage, and VREF is the reference voltage for the
memory and chipset bus receiver comparators. VREF is usually set to half the VDDQ
power supply voltage. The PTHxx050Y series employs an actively switched
synchronous rectifier output to provide state of the art stepdown switching conversion.
The products are small in size and are an ideal choice where space, performance and
high efficiency are desired.
2 YEAR WARRANTY
SPECIFICATIONS
All specifications are typical at nominal input, VREF = 1.25 V, full load at 25 °C
unless otherwise stated. Cin, Co1 and Co2 = typical value
OUTPUT SPECIFICATIONS
Output current
(over ∆VREF range)
INPUT SPECIFICATIONS CONTD.
All models
Continuous (See Note 1)
Repetitive pulse (See Note 2)
Tracking range for VREF
0.55-1.8 V
Tracking tolerance to VREF (VTT - VREF)
(over line, load
and temperature)
Ripple and noise
20 MHz bandwidth
Load transient response
(See Note 5)
Output capacitance:
Non-ceramic values
(See Notes 5 and 6)
Ceramic values
(See Note 5)
(See Note 7)
±6 A
±8 A
-10 mV to +10mV
20 mV pk-pk
80 µs settling time
Overshoot/undershoot 25 mV typ.
PTH03050Y 470 µF typ., 3,300 µF max.
PTH05050Y 470 µF typ., 3,300 µF max.
PTH12050Y 940 µF typ., 3,300 µF max.
PTH03050Y 200 µF typ., 300 µF max.
PTH05050Y 200 µF typ., 300 µF max.
PTH12050Y 400 µF typ., 600 µF max.
4 mΩ min
ESR (non-ceramic)
Input capacitance
(See Note 4)
PTH03050Y and PTH05050Y
PTH12050Y
Remote ON/OFF
470 µF
560 µF
Active high
GENERAL SPECIFICATIONS
Efficiency
Io = 4 A
PTH03050Y
PTH05050Y
PTH12050Y
88% typ.
87% typ.
84% typ.
PTH03050Y
PTH05050Y
PTH12050Y
550- 650 kHz
550-650 kHz
200-300 kHz
Non-isolated
Insulation voltage
Switching frequency
EN60950
UL/cUL60950
Approvals and
standards
Material flammability
Dimensions
UL94V-0
(L x W x H)
22.10 x 12.57 x 8.50 mm
0.870 x 0.495 x 0.335 in
2.9 g (0.10 oz)
Weight
MTBF
Telcordia SR-332
6,000,000 hours
INPUT SPECIFICATIONS
Input current
No load
Input voltage range
PTH03050Y
PTH05050Y
PTH12050Y
Undervoltage lockout:
PTH03050Y
PTH05050Y
PTH12050Y
10 mA
2.95-3.65 Vdc
4.5-5.5 Vdc
10.8-13.2 Vdc
ENVIRONMENTAL SPECIFICATIONS
Thermal performance
(See Note 2)
MSL (‘Z’ suffix only)
Vin increasing 2.45 V typ., 2.80 V max.
Vin decreasing 2.20 V min., 2.40 V typ.
Vin
Vin
Vin
Vin
increasing 4.30 V typ., 4.45 V max.
decreasing 3.40 V min., 3.70 V typ.
increasing
9.5 V typ., 10.4 V max.
decreasing
8.80 V min., 9.0 V typ.
Operating ambient,
temperature
Non-operating
-40 ºC to +85 ºC
-40 ºC to +125 ºC
JEDEC J-STD-020C Level 3
PROTECTION
Overcurrent threshold
(auto reset)
All models
12 A typ.
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
PTHxx050Y
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
2
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
OUTPUT
POWER
(MAX.)
INPUT
VOLTAGE
VTT
RANGE
OUTPUT
CURRENT
(MIN.)
OUTPUT
CURRENT
(MAX.)
EFFICIENCY
(TYP.)
MODEL
NUMBER (9,10)
10.8 W
2.95-3.65 Vdc
0.55-1.8Vdc
0A
±6 A
88%
PTH03050Y
10.8 W
4.5-5.5 Vdc
0.55-1.8Vdc
0A
±6 A
87%
PTH05050Y
10.8 W
10.8-13.2 Vdc
0.55-1.8Vdc
0A
±6 A
84%
PTH12050Y
Part Number System with Options
PTH05050YAST
Packaging Options
No Suffix = Trays
T = Tape and Reel (8)
Product Family
Point of Load Alliance
Compatible
Input Voltage
03 = 3.3 V, 05 = 5 V
and 12 = 12 V
Mounting Option (9)
D = Horizontal Through-Hole (Matte Sn)
H = Horizontal Through-Hole (Sn/Pb)
S = Surface-Mount (63/37 Sn/Pb
pin solder material)
Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu
pin solder material)
Output Current
05 = 6 A
Mechanical Package
Always 0
Pin Option
A = Through-Hole Std. Pin Length (0.140”)
A = Surface-Mount Tin/Lead Solder Ball
Output Voltage Code
Y = DDR Module
Notes
1
2
3
4
5
Rating is conditional on the module being directly soldered to a 4 layer
PCB with 1 oz. copper. See the SOA curves or contact the factory for
appropriate derating. The PTH03050Y and PTH05050Y require no
derating up to 85 °C operating temperature and natural convection
airflow.
Up to 10 ms pulse period at 10% maximum duty.
This control pin has an internal pull-up to the input voltage Vin. If it is left
open-circuit the module will operate when input power is applied. A small
low-leakage (<100 nA) MOSFET is recommended for control. For further
information, consult Application Note 178.
An input capacitor is required for proper operation. The capacitor must
be rated for a minimum of 300 mA rms (750 mA rms for 12 V input) of
ripple current.
The typical value of external output capacitance value ensures that VTT
meets the specified transient performance requirements for the memory
bus terminations. Lower values of capacitance may be possible when the
measured peak change in output current is consistently less than 3 A.
Test conditions were 15 A/µs load step, -1.5 A to +1.5 A.
6
This is the calculated maximum. The minimum ESR limitation will often
result in a lower value. Consult Application Note 178 for further details.
7 This is the typical ESR for all the electrolytic (non-ceramic) output
capacitance. Use 7 mΩ as the minimum when using max ESR values to
calculate.
8 Tape and reel packaging only available on the surface-mount versions.
9 To order Pb-free (RoHS compatible) surface-mount parts replace the
mounting option ‘S’ with ‘Z’, e.g. PTHxx050YAZ. To order Pb-free (RoHS
compatible) through-hole parts replace the mounting option ‘H’ with ‘D’,
e.g. PTHxx050YAD.
10 NOTICE: Some models do not support all options. Please contact your
local Artesyn representative or use the on-line model number search tool at
http://www.artesyn.com/powergroup/products.htm to find a suitable
alternative.
International Safety Standard Approvals
UL/cUL CAN/CSA-C22.2 No. 60950
File No. E174104
TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044
CB Report and Certificate to IEC60950, Certificate No. US/8292/UL
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
PTHxx050Y
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
3
AMBIENT TEMPERATURE (ºC)
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
8
80
70
60
Nat conv
50
40
30
OUTPUT CURRENT (A)
90
6
5
Nat conv
100 LFM
200 LFM
4
3
2
1
20
0
0
1
2
3
4
5
0
6
10
20
30
40
50
60
70
80
AMBIENT TEMPERATURE (ºC)
OUTPUT CURRENT (C)
Figure 1 - Safe Operating Area
Vin = 3.3 V, VREF = 1.25 V, Iout = 6 A (See Note A)
Figure 2 - Safe Operating Area
Vin = 12V, VREF = 1.25 V, Iout = 6 A (See Note A)
Vin
100
90
1
1k
1%
3
Vin
3.3V
5.0V
12.0V
80
70
60
2
1k
1%
4
Cin
(Required)
Standby
+
VTT
6
PTHxx050Y
(Top View)
Con
hf-Ceramic
5
Co1
Low-ESR
(Required)
+ Co2
Ceramic
(Optional)
Q1
BSS138
(Optional)
GND
50
0
1
2
3
4
5
VTT Termination Island
EFFICIENCY (%)
VREF
VDDQ
SSTL-2
Data/
Address/
Bus
6
OUTPUT CURRENT (A)
Figure 3 - Efficiency vs Load Current
VREF = 1.25 V (See Note B)
Figure 4 - Standard Application
Notes
A The SOA curves represent the conditions at which internal components
are within the Artesyn derating guidelines.
B Characteristic data has been developed from actual products tested at
25 °C. This data is considered typical data for the converter.
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005
PTHxx050Y
3.3/5/12 Vin Single Output
DC-DC CONVERTERS
Non-isolated DDR/QDR Memory Bus Termination Module
4
For the most current data and application support visit www.artesyn.com/powergroup/products.htm
NEW Product
0.140
(3.55)
0.870 (22.10)
0.060
(1.52)
0.060
(1.52)
0.750 (19.06)
6
1
0.125
(3.18)
0.125
(3.18)
0.125
(3.18)
ø0.040 (1.02)
6 Places
2
0.375 0.495
(12.57)
(9.52)
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
3
5
4
0.070 (1.78)
(Standoff Shoulder)
TOP VIEW
Host Board
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
PIN CONNECTIONS
0.335 (8.50)
MAX.
PIN NO.
FUNCTION
SIDE VIEW
1
Ground
2
VREF
3
Vin
4
Inhibit*
5
N/C
6
VTT
Figure 5 - Plated Through-Hole Mechanical Drawing
*Denotes negative logic:
Open = Normal operation
Ground = Function active
0.870 (22.10)
0.060
(1.52)
0.125
(3.18)
0.125
(3.18)
0.125
(3.18)
0.060
(1.52)
0.750 (19.06)
0.335 (8.50)
max.*
*After solder reflow
on customer board
6
1
2
Solder Ball
ø0.040 (1.02)
6 Places
0.495
0.375 (12.57)
(9.52)
3
Lowest Component
0.010 min. (0.25)
Bottom side Clearance
5
4
TOP VIEW
SIDE VIEW
Host Board
Dimensions in Inches (mm)
Tolerances (unless otherwise specified)
2 Places ±0.030 (±0.76)
3 Places ±0.010 (±0.25)
Figure 6 - Surface-Mount Mechanical Drawing
Datasheet © Artesyn Technologies® 2005
The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising
from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent
accompany the sale of any such product(s) or information contained herein.
Please consult our website for the following items: 4 Application Note
www.artesyn.com
File Name: PTHxx050Y.pdf Rev (02): 19 Dec 2005