ADSD-1410S Dual 14-Bit, 10MSPS Sampling A/D Converter FEATURES • • • • • • • INPUT/OUTPUT CONNECTIONS 14-bit resolution; 10MSPS sampling rate Functionally complete; ±2.5V input range No missing codes over full temperature range Edge-triggered ±5V supplies, 1.6 Watts 76dB SNR, –83dB THD Ideal for both time and frequency domain applications GENERAL DESCRIPTION The ADSD-1410S is a functionally complete, dual 14-bit, 10MSPS, sampling A/D converter. Its standard, 40-pin, triple-wide SMT DIP contains two fast-settling sample/hold amplifiers, two 14-bit A/D converters, multiplexed output buffers, a precision reference, and all the timing and control logic necessary to operate from either two or a single start convert pulse. The ADSD-1410S is optimized for wideband frequencydomain applications and is fully FFT tested. The ADSD1410S requires only ±5V supplies and typically consumes 1.6 Watts. The digital output power supply is capable of directly driving 5V or 3V logic systems. Models are available in either commercial 0 to +70°C or military -55 to +125°C operating temperature ranges. PIN FUNCTION PIN FUNCTION 1 INPUT A 40 INPUT B 2 +5VA 39 +5VA 3 ANALOG GROUND 38 ANALOG GROUND 4 N.C. 37 N.C. 5 OFFSET A 36 OFFSET B 6 RANGE 35 N.C. 7 1.6V REF 34 EOC A 8 ANALOG GROUND 33 ANALOG GROUND 9 –5V 32 –5V 10 ENABLE A 31 ENABLE B 11 START A 30 START B 12 VDD 29 EOC B 13 BIT 14 (LSB) 28 BIT 1 (MSB) 14 BIT 13 27 BIT 2 15 BIT 12 26 BIT 3 16 BIT 11 25 BIT 4 17 BIT 10 24 BIT 5 18 BIT 9 23 BIT 6 19 BIT 8 22 BIT 7 20 DGND 21 DGND /&&3%4!$*534! n 3( !.!,/').054! !$# "-3" " " /&&3%4!$*534" " " !$# n 3( !.!,/').054" " " " " " " "5&&%2 " 2%& 62%& " " "5&&%2 2!.'% %.!",%" %.!",%! 34!24#/.! 4)-).'!.$ #/.42/,,/')# 34!24#/." %/#! %/#" 6$$ n6 6! !'.$ $'.$ .# Figure 1. ADSD-1410S Functional Block Diagram www.cd4power.com Page 1 of 5 ® ® ADSD-1410S ABSOLUTE MAXIMUM RATINGS PARAMETERS +5VCC Supply (Pins 2, 39) –5VEE Supply (Pins 9, 32) VDD Supply (Pin 12) Digital Inputs (Pins 10, 11, 30, 31) Analog Input (Pins 1, 40) Lead Temp. (10 seconds) LIMITS UNITS 0 to +6 0 to –6 –0.3 to (VCC +0.3) –0.3 to (VDD +0.3) ±7 +300 Volts Volts Volts Volts Volts °C FUNCTIONAL SPECIFICATIONS (TA = +25°C, VCC = +5V, VDD = +5V, VEE = –5V, 10MSPS sampling rate,Vin = ±2.5V and a minimum 7 minute warmup unless otherwise specified.) ANALOG INPUTS MIN. TYP. MAX. UNITS Input Voltage Range Input Impedence Input Capacitance — 610 — ±2.5V 620 7 — 630 15 Volts Ω pF +2.4 — — — — — — — — +0.8 +10 –10 Volts Volts μA μA — — — ±1 ±1 ±2 — — — LSB LSB LSB –0.99 –0.99 –0.99 ±0.5 ±0.5 ±0.75 +1.5 +1.5 +1.75 LSB LSB LSB — — — ±0.25 ±0.25 ±0.5 ±0.5 ±0.5 ±0.8 %FSR %FSR %FSR — — — ±0.3 ±0.3 ±0.6 ±0.6 ±0.6 ±0.8 %FSR %FSR %FSR DIGITAL INPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" PERFORMANCE Integral Non-Linearity +25°C (fin=10kHz) 0 to +70°C –55 to +125°C Differential Non-Linearity (fin = 10kHz) +25°C 0 to +70°C –55 to +125°C Offset Error +25°C (see Figure 3) 0 to +70°C –55 to +125°C Gain Error +25°C (see Figure 3) 0 to +70°C –55 to +125°C No Missing Codes 14 Bits Resolution VDD = +5V VDD = +3.3V Logic "0" VDD = +5V VDD = +3.3V Logic Loading "1" VDD = +5V VDD = +3.3V Logic Loading "0" VDD = +5V VDD = +3.3V Internal Reference Voltage, +25°C 0 to +70°C External Current www.cd4power.com MIN. TYP. MAX. UNITS — — –84 –83 –80 –77 dB dB 74 74 76 76 — — dB dB 72 72 75 75 — — dB dB — — –87 –86 –82 –80 dB dB — –80 — dB — — — — 14 14 — — — — ±10 5 MHz MHz ns ps — — 25 ns — — 85 250 — — dB μVrms 1 25 25 — 50 50 10 500 500 MHz ns ns 2 6 10 ns 0 1 1 7 6 6 12 13 13 ns ns ns Power Supply Ranges –5VEE Supply +5VCC Supply VDD Supply –5.25 +4.75 +3.0 –5.0 +5.0 +5.0 –4.75 +5.25 VCC Volts Volts Volts Power Supply Currents –5VEE Supply +5VCC Supply VDD Supply Power Dissipation Power Supply Rejection –100 — — — — –89 +230 +2.0 1.6 — — +245 +5.0 1.7 ±0.01 mA mA mA Watts %FSR%V Total Harm. Distort. (–0.5dB) dc to 500kHz 500kHz to 5MHz Signal-to-Noise Ratio (w/o distortion, –0.5dB dc to 500kHz 500kHz to 5MHz Signal-to-Noise Ratio (and distortion, –0.5dB) dc to 500kHz 500kHz to 5MHz Spurious Free Dyn. Range ➀ dc to 500kHz 500kHz to 5MHz Two-tone IMD Distortion (fin = 4.85MHz, fs = 10MHz, –0.5dB) Input Bandwidth (–3dB) Small Signal (–20dB input) Large Signal (–0.5dB input) Aperture Delay Time Aperature Uncertainty S/H Acq. Time, (to ±0.003%FSR) Step input Feedthrough Rejection (fin = 5MHz) Noise TIMING SPECIFICATIONS –55 to +125°C 14 Bits OUTPUTS Output Coding Logic Level Logic "1" DYNAMIC PERFORMANCE Offset Bin. +3.8 +2.48 — — — — — — — — — — — — — — — — +0.5 +0.5 –8 –4 +8 +4 Volts Volts Volts Volts mA mA mA mA +1.5 +1.5 — +1.6 +1.6 — +1.7 +1.7 5 Volts Volts mA Conversion Rate Start Convert High Start Convert Low Start Convert to EOC Delay EOC to Data Valid Delay Output Enable Delay Output Disable Delay POWER REQUIREMENTS PHYSICAL/ENVIRONMENTAL Oper. Temp. Range, Ambient ADSD-1410S ADSD-1410S-EX Storage Temperature Range Package Type 0 –55 –65 — +70 — +125 — +150 40-pin, SMT TDIP °C °C °C Footnote: ➀ Same specification as In-Band Harmonics and Peak Harmonics. Page 2 of 5 ® ® ADSD-1410S TECHNICAL NOTES Table 2. Offset Adjustment 1. Rated performance requires using good high-frequency circuit board layout techniques. Connect the digital and analog grounds to one point, the analog ground plane beneath the converter. Due to the inductance and resistance of the power supply return paths, return the analog and digital ground separately to the power supplies. Input Range Offset Adjust +1/2 LSB ±2.5V +0.000153V Table 3. Output Coding CALIBRATION PROCEDURE 1. Connect the converter per Figure 3. Apply a pulse of 50 nanoseconds typical to START CONVERT (pin 11) at a rate of 2MHz. This rate is chosen to reduce flicker if LED's are used on the outputs for calibration purposes. 2. Zero (Offset) Adjustments Apply a precision voltage reference source between ANALOG INPUT A (pin 1) and SIGNAL GROUND (pin 3), then adjust the reference source output per Table 2. Adjust trimpot R1 until the code flickers equally between 10 0000 0000 0000 and 10 0000 0000 0001. 3. Repeat above step for Analog Input B (Pin 40). Use trimpot R2 for the zero (Offset) adjustment . OUTPUT CODING MSB LSB INPUT RANGE ±2.5V 11 11 11 10 01 00 00 00 +2.499695 +1.875000 +1.250000 ±0.000000 –1.250000 –1.875000 –2.499695 –2.500000 1111 1000 0000 0000 0000 1000 0000 0000 1111 0000 0000 0000 0000 0000 0000 0000 1111 0000 0000 0000 0000 0000 0001 0000 BIPOLAR SCALE +FS – 1LSB +3/4FS +1/2FS 0 –1/2FS –3/4FS –FS+1LSB –FS 4. To confirm proper operation of the device, vary the precision reference voltage source to obtain the output coding listed in Table 3. N3ECPERDIVISION . 34!24 #/.6%24 N3EC N3EC N3EC N3EC %/# $!4!/54 . . . . %.!",%! N3EC N3EC NSMIN %.!",%" $!4! !OR"/54 N3EC ()'(: ()'(: $ATA.! $ATA." Figure 2. ADSD-1410S Timing Diagram www.cd4power.com Page 3 of 5 ® ® ADSD-1410S 6$$ n6 U& 6 U& U& U& U& )NPUT! U& )NPUT" & U& .# 62%& %/#! 2ANGE '.$ )N! )N" 2 + 2 + 6 /FFSET! !$3$3 /FFSET" %/#" n6 ")4-3" ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4 ")4,3" 3TART! 3TART" 37 Notes: ➀ Outputs are enabled by either turning ENABLE A (Pin 10) or ENABLE B (Pin 31) low for respective analog inputs A or B. A high on both ENABLE A and ENABLE B results in disabling the output bus (High Z). %NABLE" %NABLE! 6 37 6 See timing diagram for details. Figure 3. ADSD-1410S Connection Diagram THERMAL REQUIREMENTS The ADSD-1410S sampling A/D converter is fully characterized and specified over the commercial operating temperature (ambient) range of 0 to +70°C and military temperature range of –55 to +125°C (EX suffix). All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electricallyinsulating, thermally-conductive "pads" may be installed underneath the package. Minimal air flow over the surface can greatly help reduce the package temperature. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should www.cd4power.com Page 4 of 5 ® ® ADSD-1410S MECHANICAL DIMENSIONS INCHES (mm) Opening In Shell To Prevent Fluid Entrapment 2.10 0.262 0.06 0.025 Typ. 0.100 Typ. 1.900 0.10 1.09 0.015 Thick Copper Leads Bottom Of Leads To Be Coplanar to 0.005 ORDERING INFORMATION MODEL NUMBER OPERATING TEMP. RANGE ADSD-1410S ADSD-1410S-EX 0 to +70°C –55 to +125°C Contact C&D Technologies (Datel) for high-reliability versions C&D Technologies (NCL), Ltd. Milton Keynes, England Tel: +44 (0) 1908.615232 E-mail: [email protected] C&D Technologies (DATEL) S.a.r.l. Montigny Le Bretonneux, France Tel: +33 (0) 1.34.60.01.01 E-mail: [email protected] C&D Technologies (DATEL), Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 Tel: 508.339.3000, 800.233.2765 Fax: 508.339.6356 www.cd4power.com E-mail: [email protected] ISO 9001:2000 REGISTERED DS-0559A 06/06 C&D Technologies (DATEL) GmbH München, Germany Tel: +49 (0) 89.544334.0 E-mail: [email protected] C&D Technologies KK Tokyo and Osaka, Japan Tel: +81 3.3779.1031, 6.6354.2025 E-mail: [email protected], [email protected] C&D Technologies (DATEL) China Shanghai, People’s Republic of China Tel: +86.50273678 E-mail: [email protected] DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark. www.cd4power.com Page 5 of 5