Model 635 LVPECL or LVDS CLOCK OSCILLATOR FEATURES • • • • • • • • • • • Standard 7.5x5.0mm Surface Mount Footprint Differential LVPECL or LVDS Output Fundamental or Overtone Crystal Low Phase Jitter Frequency Range 19.44 – 250 MHz Frequency Stability, ±50 ppm Standard (±20 ppm, ±25 ppm and ±100 ppm available) +2.5Vdc or +3.3Vdc Operation Operating Temperature to –40°C to +85°C Output Enable Standard Tape & Reel Packaging RoHS/Green Compliant (6/6) DESCRIPTION The Model 635 is a ceramic packaged Clock oscillator offering reduced size and enhanced stability. The small size means it is perfect for any application. The enhanced stability means it is the perfect choice for today’s communications applications that require tight frequency control. ORDERING INFORMATION 635 M OUTPUT TYPE FREQUENCY IN MHz P = PECL, Pin 1 Enable Pin 2 N.C. (standard) L = LVDS, Pin 1 Enable Pin 2 N.C. (standard) E = PECL, Pin 2 Enable Pin 1 N.C. V = LVDS, Pin 2 Enable Pin 1 N.C. M - indicates MHz and decimal point. Frequency is recorded with minimum 4 significant digits to the right of the "M". FREQUENCY STABILITY 6 5 3 2 = = = = ± ± ± ± SUPPLY VOLTAGE 20 ppm * 25 ppm 50 ppm (standard) 100 ppm (over -40°C to 85°C only) 2 = 2.5 Vdc 3 = 3.3 Vdc OPERATING TEMPERATURE RANGE C = -20°C to +70°C (standard) I = -40°C to +85°C * - Not available with 'I' temperature range. Consult factory for availability before ordering. Example Part Number: 635P3C3155M5200 Document No. 008-0284-0 Page 1 - 4 Rev. D ٠ ٠ ٠ CTS Electronic Components, Inc. ٠ 171 Covington Drive ٠ Bloomingdale, IL 60108 ٠ ٠ ٠ ٠ ٠ ٠ www.ctscorp.com ٠ ٠ ٠ Model 635 7.5x5.0mm Low Cost LVPECL or LVDS Clock Oscillator Electrical and Waveform Parameters Absolute Maximums ELECTRICAL CHARACTERISTICS PARAMETER Maximum Supply Voltage Storage Temperature Frequency Range (See Note 1) LVPECL and LVDS Frequency Stability (See Note 2 and Ordering Information) SYMBOL VCC TSTG CONDITIONS - fO - ∆f/fO TA Operating Temperature Commercial Industrial Supply Voltage Supply Current LVPECL LVDS Start Up Time Phase Jitter Period Jitter Enable Function Enable Input Voltage Disable Input Voltage Disable Current Enable Time LVPECL WAVEFORM Output Load Output Duty Cycle Output Voltage Levels Logic '1' Level Logic '0' Level Rise and Fall Time fO < 100 MHz fO > 100 MHz LVDS WAVEFORM Output Load Output Duty Cycle Differential Output Voltage Differential Output Error Offset Voltage Offset Error Output Voltage Levels Logic '1' Level Logic '0' Level Rise and Fall Time fO < 100 MHz fO > 100 MHz VCC ±5% ICC Maximum Load TS tjrms pjrms MIN -0.5 -55 TYP - MAX 5.0 125 19.44 - 250 - - - 20, 25, 50 or 100 - -20 -40 2.38 3.14 VIH VIL IIL TPLZ Application of VCC Bandwidth 12 kHz - 20 MHz Standby Pin 1 or Pin 2 Logic '1', Output Enabled Pin 1 or Pin 2 Logic '0', Output Disabled Pin 1 or Pin 2 Logic '1' , Output Disabled Pin 1 or Pin 2 Logic '1' RL SYM @ VCC - 1.3V VOH VOL PECL Load PECL Load TR, TF - @ 20% - 80% Levels RL SYM VOD VOS - Between Outputs @ 1.25V RL = 100 Ohms VOH VOL LVDS Load LVDS Load TR, TF LVDS Load - @ 20% - 80% Levels UNIT V °C MHz ± ppm °C 2.5 3.3 70 85 2.63 3.47 - 50 25 3 - 100 60 5 1 5 mA 0.7*VCC - - 0.3*VCC 20 5 uA ns 45 50 - 55 Ohms % VCC - 1.025V - - VCC - 1.62V V - 0.8 0.5 1.0 0.6 ns 45 247 1.125 - 100 350 1.25 - 55 454 50 1.375 50 Ohms % mV mV V mV 0.9 1.43 1.1 1.6 - V - 0.8 0.5 1.0 0.6 ns 25 V ms ps RMS ps RMS V Notes: 1. For frequencies above 160 MHz consult factory for availability. 2. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 10 year aging. PECL/LVDS OUTPUT WAVEFORM Tr Tf VOH OUT 80% VOS 50% ENABLE TRUTH TABLE PIN 1 or PIN 2 PIN 4 / PIN 5 Logic ‘1’ Output Open Output Logic ‘0’ High Imp. 20% OUT VOL UPTIME (t) PERIOD (T) DUTY CYCLE = t/T x 100 (%) Document No. 008-0284-0 ٠ ٠ ٠ CTS Electronic Components, Inc. ٠ Page 2 - 4 171 Covington Drive Rev. D ٠ Bloomingdale, IL 60108 ٠٠٠ Model 635 7.5x5.0mm Low Cost LVPECL or LVDS Clock Oscillator TEST CIRCUIT, PECL LOAD TEST CIRCUIT, LVDS LOAD Vcc - 2.0V RL 50 CH2 + CH2 + mA - + POWER SUPPLY RL 50 4 + CH1 + POWER SUPPLY (Thevenin Equivalent) 0.01uF 2 Enable Input or N.C. 4 D.U.T. - Vcc - 2.0V 1 1 5 0.01uF VM - D.U.T. VM - 5 mA - 6 CH1 6 + RL 100 (Thevenin Equivalent) 3 2 3 Enable Input or N.C. N.C. or Enable Input N.C. or Enable Input MECHANICAL SPECIFICATIONS PACKAGE DRAWING MARKING INFORMATION (7.7) MAX 0.303 1. 2. 3. 4. (1.4) 0.055 PIN 1 IDENTIFIER (1.27) 0.050 CTS ** YYWW 635P3C3 ● XXXMXXXX (5.0 ±0.2) 0.197 ±0.008 (3.73) 0.147 4 5 6 3 2 1 ** - Manufacturing Site Code. YYWW – Date code, YY – year, WW – week. Truncated CTS part number. XXXMXXXX - Frequency marked with 4 significant digits after the ‘M’. NOTES 1. Termination pads (e4), barrier-plating is nickel (Ni) with gold (Au) flash plate. 2. Reflow conditions per JEDEC J-STD-020. (2.54) 0.100 (5.08) 0.200 (2.0) MAX 0.079 Key: (mm) Inch D.U.T. PIN ASSIGNMENTS SUGGESTED SOLDER PAD GEOMETRY PIN 1 2 3 4 5 6 .071 [1.80] C BYPASS 5 6 4 SYMBOL EOH or N.C. EOH or N.C. GND Output Output VCC DESCRIPTION Enable (std) or optional No Connect No Connect (std) or optional Enable Circuit & Package Ground RF Output Complimentary RF Output Supply Voltage .165 [4.20] .079 [2.00] 2 1 3 .100 [2.54] .200 [5.08] Key: [mm] Inch Document No. 008-0284-0 ٠ ٠ ٠ CTS Electronic Components, Inc. ٠ Page 3 - 4 171 Covington Drive Rev. D ٠ Bloomingdale, IL 60108 ٠٠٠ Model 635 7.5x5.0mm Low Cost LVPECL or LVDS Clock Oscillator TAPE AND REEL INFORMATION DIMENSIONS IN MILLIMETERS 17.5 2.0 Ø13 4.0 8.0 Ø1.50 1.75 2.40 2.10 120° 16.0 8.40 7.90 Ø60 5.70 5.40 Ø180 Ø23 DIRECTION OF FEED Device quantity is 1,000 pieces per 180mm reel. ENVIRONMENTAL SPECIFICATIONS Temperature Cycle: 400 cycles from –55°C to +125°C, 10 minute dwell at each temperature, 1 minute transfer time between temperatures. Mechanical Shock: 1,500g’s, 0.5mS duration, ½ sinewave, 3 shocks each direction along 3 mutually perpendicular planes (18 total shocks). Sinusoidal Vibration: 0.06 inches double amplitude, 10 to 55 Hz and 20g’s, 55 to 2,000 Hz, 3 cycles each in 3 mutually perpendicular planes (9 times total). Gross Leak: No leak shall appear while immersed in an FC40 or equivalent liquid at +125°C for 20 seconds. Fine Leak: Mass spectrometer leak rates less than 2x10-8 ATM cc/sec air equivalent. Resistance to Solder Heat: Product must survive 3 reflows of +260°C peak, 10 seconds maximum. High Temperature Operating Bias: 2,000 hours at +125°C, maximum bias, disregarding frequency shift. Frequency Aging: 1,000 hours at +85°C, full bias, less than ±5 ppm shift. Moisture Sensitivity Level: Level 1 per JEDEC J-STD-020. QUALITY AND RELIABILITY Quality systems meet or exceed the requirements of ISO 9000:2000 standards. Document No. 008-0284-0 ٠ ٠ ٠ CTS Electronic Components, Inc. ٠ Page 4 - 4 171 Covington Drive Rev. D ٠ Bloomingdale, IL 60108 ٠٠٠