Preliminary DFBM-CS320 DFBM-CS320 Bluetooth TM Module Class 2 Wireless communication module TM compliant with Bluetooth Specification V2.0+EDR FEATURES: z Suitable for Cellular Phones, PDAs, Digital Cameras, .…….. z Small size and Low Profile using high-density packaging technology for space critical applications. z High sensitivity for better reception. z Various interfaces: UART or USB. z Wide operating temperature range: -40~+85℃. Device diagram UART / USB SPI PIO/AIO PCM Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 General Specification Bluetooth Specification Version 2.0+EDR Frequency 2402~2480MHz Modulation GFSK/DQPSK/8DPSK Transmission Rate 721K / 2M / 3M bps Receive Sensitivity Typ. -78dBm Maximum Output Power +4dBm(Class 2) Operating Voltage 2.7~3.6V Current Consumption 35 mA Operating Temperature -40~+85℃ Antenna Impedance 50Ω Package Size 7.5*6.5*1.6 (mm) Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Interface Interface Description Antenna External Antenna 50Ω UART Interface PIO Interface TX, RX, RTS, CTS(9600bps~1.5Mbps) Synchronous Serial Interface for firmware download Full speed Universal Serial Bus interface Supports continuous transmission and reception of PCM encoded audio data over Bluetooth 8 terminals AIO Interface 1 terminals SPI Interface USB Interface PCM Interface Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 External Reference Clock Input The DFBM-CS320 RF local oscillator and internal digital clocks are derived from the reference clock at DFBM-CS320 XTAL_IN input. This reference may be either an external clock or from a crystal connected between XTAL_IN and XTAL_OUT. The external clock can either be a digital level square wave or sinusoidal and this may be directly coupled to XTAL_IN without the need for additional components. If the peaks of the reference clock are below 0 V or above 1.8 V, it must be driven through a DC blocking capacitor (~33pF) connected to XTAL_IN. The external clock signal should meet the specifications as below table. Min Typ Max Frequency 7.5 MHz 16 MHz 40 MHz Duty cycle 20 : 80 50 : 50 80 : 20 - - 15ps rms 400mV pk-pk - 1.8V * Edge Jitter (At Zero Crossing) Signal Level * If the external clock is driven through a DC blocking capacitor then maximum allowable amplitude is reduced from 1.8V to 800mV pk-pk. Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Host transport selection The firmware configures itself when it boots by reading the values on a set of PIO pins. Pin Values Features Host Transport PIO[0] PIO[1] PIO[4] Auto System Clock Auto Baud Rate Adaptation Adaptation 0 0 0 BCSP (default) Available (*1) Available (*2) 0 0 1 BCSP with UATR configured to Available (*1) use 2 stop bits and no parity Available (*2) 0 1 0 USB, 16 MHz crystal Not available Not appropriate 0 1 1 USB, 26 MHz crystal Not available Not appropriate 1 0 0 Three-wire UART Available (*1) Available (*2) 1 0 1 H4DS Available (*1) Available (*2) 1 1 0 UART (H4) Available (*1) Available (*2) 1 1 1 Undefined - - (*1) If a UART-based host transport is selected and the firmware does not know its clock frequency (because PSKEY_ANA_FREQ contains no value), then the firmware attempts to lock on to the available system clock signal. Use of this mechanism implies booting the firmware twice, as described in [AUTOBAUD]. PSKEY_ANA_FREQ has no default value. (*2) If a UART-based host transport is selected and the baud rate defined in PSKEY_UART_BAUDRATE is zero (the default value), then the baud rate adaptation process is invoked, as described in [AUTOBAUD]. If the PS Key contains a non-zero baud rate then the UART is configured with this value. If the system clock adaptation mechanism is used, it may result in the processor running slower than normal, so the consequent (measured) baud rate will also be affected. Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Application Circuit Crystal mode circuit External mode circuit *****Note: The circuits are offered without warranty and Delta is unable to accept any liability for direct or consequential loss associated with their use. It is therefore important for designers to ensure that their design is properly evaluated in a Design Verification Test. Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Pin description Pin No. Name 1 Vdd_3.15V 2 VREG_IN Supply Voltage (3.15V , 2.2~3.6V), INPUT 3 Vdd_1.8V Supply Voltage (1.8V), OUTPUT 4 PIO_1 Programmable input/output line 5 PIO_0 Programmable input/output line 6 PIO_10 Programmable input/output line 7 AUX_DAC 8 Gnd Ground 9 ANT RF input/output 10 Gnd Ground 11 PIO_9 Programmable input/output line 12 PIO_2 Programmable input/output line 13 PIO_3 Programmable input/output line 14 SPI_MOSI Serial Peripheral Interface data input 15 SPI_MISO Serial Peripheral Interface data output 16 SPI_CLK Serial Peripheral Interface clock 17 SPI_CSB Chip select for Serial Peripheral Interface, active low Data Sheet Description Supply Voltage (3.15V , 2.7~3.6), INPUT Voltage DAC May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 18 Gnd 19 Reset B 20 PIO_5 Programmable input/output line 21 PIO_4 Programmable input/output line 22 USB_DP USB data plus with selectable internal 1.5kohm pull-up resistor 23 USB_DN USB data minus 24 PCM_IN Synchronous data input 25 PCM_CLK Synchronous data clock 26 PCM_SYNC Synchronous data sync 27 PCM_OUT 28 Gnd 29 UART_RTS 30 UART_TX UART data output active high 31 UART_CTS UART clear to send active low 32 UART_RX 33 AIO_0 34 XTAL_OUT 35 XTAL_IN 36 Gnd Data Sheet Ground An active low reset Synchronous data output Ground UART request to send active low UART data input active high Analogue Programmable input/output Drive for crystal For crystal or external clock input Ground May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Dimensions (mm) Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change Preliminary DFBM-CS320 Record of changes Date Content of change May 18,2005 Preliminary document release Maker Susan Lin Contact information: Website: http://www.deltaww.com Email: [email protected] (Worldwide) Email: Data Sheet May 18, 2005 Proprietary Information and Specifications are Subject to Change