EXAR XRDAN30

XRDAN30
Introduction
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Figure 2. Equivalent Circuit at Full Scale for
AC Analysis
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The Effect of DAC Output Capacitance
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Figure 2. ( ,
4, Gain
(dB)
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Amp Main
Pole
P1
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Figure 3. Op Amp Open Loop Characteristics
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Figure 1. Typical Configuration CMOS IOUT
DAC with External Op Amp forming Voltage
Output Configuration
R IN
20 Lo g (
)
R IN + Rf
Gain
(dB)
R IN • R f x C O =
1
P2
Figure 4. Feedback Signal Path
Transfer Characteristics
XRDAN30
4, 5
Gain
(dB)
5
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5
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Figure 8. Op Amp Open Loop Characteristics
Figure 5. Root Locus
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R IN
20 Lo g (
)
R IN + Rf
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5
R IN • R f x (C Z + C O)
6
6
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Figure 9. Feedback Signal Path
Transfer Characteristics
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5
6
5
Figure 6. Typical Zero Compensation of Co
General Pole
Figure 10. Root Locus
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Figure 7. Equivalent Circuit at Full Scale for
AC Analysis
XRDAN30
6
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20 Lo g (
R IN
)
R IN + Rf
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-
5
:
+2
-
R A • R IN • R f x (C Z + C O)
6
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/01
Figure 14. Feedback Signal Path
Transfer Characteristics
Figure 11. Typical Zero Compensation of Co
General Pole
5
6
6
5
Figure 15. Root Locus
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Figure 12. Equivalent Circuit at Full Scale
for AC Analysis
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Gain
(dB)
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5
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4
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Figure 16. Typical Zero Compensation of Co
General Pole
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Figure 13. Op Amp Open Loop Characteristics
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XRDAN30
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