J591 APCI-IB40 2192-09099-000-000 APCI-IB40 Introduction The APCI-IB40 is a 32-bit PCI Local Bus I/O board which provides 40 digital I/O lines and three timer/counters. Each I/O line can be configured as either an input or an output. The board also has the facility to define the power-up/reset state of those lines to be used as outputs. The I/O connector conforms to Arcoms standard signal conditioning system (SCS) and may be used to drive a range of Signal Conditioning Boards (SCB), contact Arcom for more details. Features 40 Digital I/O lines. Open collector outputs can sink 24mA @ 0.45V, Sources from 4K7 Ohm at +5V. Bit programmable for input or output. 8254 Compatible Timer/Counter (Three 16-bit Counters). Board Access LED (Red). User programmable LED (Green). 32-Bit PCI 2.1 Compliant Interface. EEPROM for PCI Interface configuration. 50 Way D-Type I/O Connector (Configured for Arcom Signal Conditioning System). Operating Temperature range 0 to +70 C. Power Consumption 220mA @ +5V. MTBF 370,030 hours (using generic figures from MIL-HDBK-217F at ground benign). Getting Started Power down your PC system. Install the board in a spare PCI Slot (See Installation for CE compliance). Power up system with MSDOS. Run APCI.EXE (supplied on the utility disk), this will search for the board and check I/O access. If this fails, check board is correctly located. Warning This board contains CMOS devices which may be damaged by static electricity. Please ensure antistatic precautions are taken at all times when handling this board. If for any reason this board is returned to Arcom Control Systems, please ensure it is adequately packed to prevent damage during shipment. Page 1 2192-09099-000-000 J591 APCI-IB40 Operation PCI Bus Interface The PCI bus is a high speed alternative to ISA bus, it has been designed to overcome some of the limitations of ISA bus, and provide faster throughput for I/O intensive peripheral devices. PCI bus also supports Plug and Play configuration which allows the system software to allocate resources during initialisation helping to overcome resource conflicts, which might exist in a system. The APCI-IB40 uses a single chip PCI bus slave controller which is designed and manufactured by PLX Technology. This device has been designed to fully support the PCI 2.1 specification and provides plug and play software capabilities. During power-up initialisation the PCI BIOS will detect the card and assign a unique I/O address location and interrupt line. This ensures that there are no resource conflicts on the PCI bus. Multiple cards are supported through this mechanism without the need for address decode links. The PLX device contains a standard type 00H configuration space header. The table below shows the registers within this header which are required for configuration of the APCI-IB40. Configuration Space Header Offset 00-01H 02-03H 18-1BH 2C-2DH 2E-2FH 3CH Register Name Vendor ID Device ID Base Address Register Subsytem Vendor ID Subsystem ID Interrupt Line Description ID of PCI device manufacturer ID of PCI device I/O base address assigned to card ID of board manufacturer ID of Board Interrupt line assigned to device Value 10B5H (PLX Technology) 9050H 0000xxxx 13ABH (ARCOM) 0591H (APCI-IB40) 0x These registers can be accessed using PCI BIOS functions. Please contact Arcom control systems customer support team (Tel: 01223 412428) for a copy of the PCI BIOS Specification if required. Digital I/O If an I/O line is to be used as an output, writing a 0 to the corresponding bit in the output register will turn the output buffer on and it will sink current. This will force the output line to a logic 0. When the software output enable feature is selected the output control latch must be written to with 01H before the outputs will be enabled. Since each output has an open collector drive, each line can alternatively be configured as an input by switching the output buffer OFF (Writing 1 to the corresponding bit in the output register) and then driving the line either high or pulling it low via an external source. For lines using the software output enable feature the power-up links can be used to set the outputs to a defined state at power on. If the output buffers are permanently enabled the power up state can not be guaranteed. Page 2 J591 APCI-IB40 2192-09099-000-000 Electrical configuration of each digital I/O line: Note:- If an I/O line is to be configured as an input, it is necessary that the power-up link for that group of lines is set in the A position. This means that any lines to be used as outputs will be set high, or OFF. A good rule is to keep the lines to be used as inputs and those to be used as outputs in separate groups of eight I/O lines. Timer/Counter The APCI-IB40 contains an 8254 compatible timer/counter. This device contains three 16-bit counters, each with its own clock input, gate input and output pin. The clock input to counter 0 is driven from an on board frequency source which is selected by LK1 to be 1MHZ, 100KHZ or 10KHZ, and the output can be used to generate an interrupt signal. The clock and gate inputs for the remaining counters are derived from I/O lines 24-27, and the output signals are routed to I/O lines 16-17 via LK3-4. As this device is compatible with the counter/timer used on a PC/AT motherboard programming information can be found in most PC reference guides. A data sheet for this device can be obtained from our customer support team if required (Tel: 01223 412428). I/O Map The APCI-IB40 uses an indexed I/O addressing scheme to access the on-board devices and special function registers. Two consecutive I/O locations are required to implement this scheme, the base address is used to set the index value and the base+1 address is used to access the device. The I/O base address is set by the PCI BIOS during initialisation (refer to the PCI Bus section of this manual for details). A PCI BIOS function call may be used to determine the base address once the system has been initialised. Multiple boards may be used in a system as each will be given a unique address. Address Base Base Base+1 Read/Write Write Read Read/Write Register Name Index Register Clear Interrupt Data Register Function Write Index value Read clears pending interrupt Read/Write data to and from registers Page 3 2192-09099-000-000 J591 APCI-IB40 Index Registers Index 00 Read/Write Write Register Name Output Control Latches I/O lines 0-7 Status of I/O lines 0-7 00 Read 01 Write 01 Read 02 Write 02 Read 03 Write 03 Read 04 Write 04 Read Output Control Latches I/O lines 32-39 Status of I/O lines 32-39 05 Read Interrupt source register 06-0F 10 11 12 13 N/A Read/Write Read/Write Read/Write Write Not Used Counter 0 Counter 1 Counter 2 Timer/Counter Control Word Output Control Latches I/O lines 8-15 Status of I/O lines 8-15 Output Control Latches I/O lines 16-23 Status of I/O lines 16-23 Output Control Latches I/O lines 24-31 Status of I/O lines 24-31 Special Function Register Index 80 Read/Write Write Register Name User LED 81 Read Board Ident 90 Write Output buffer enable Function Bit 0-7 0 = Output 0 1 = Output 1 Bit 0-7 0 = Input 0 1 = Input 1 Bit 0-7 0 = Output 0 1 = Output 1 Bit 0-7 0 = Input 0 1 = Input 1 Bit 0-7 0 = Output 0 1 = Output 1 Bit 0-7 0 = Input 0 1 = Input 1 Bit 0-7 0 = Output 0 1 = Output 1 Bit 0-7 0 = Input 0 1 = Input 1 Bit 0-7 0 = Output 0 1 = Output 1 Bit 0-7 0 = Input 0 1 = Input 1 Bit 0 = 1 Counter/Timer 0 Bit 1 = 1 Counter/Timer 1 Bit 2-7 Not used N/A Refer to manufactures data sheet for programming information Bit Function Bit 0 0 = LED off 1 = LED on Bit 1-7 Not used Bit 0-7 Always gives value of 00H for APCI-IB40 Bit 0 0 = Outputs disabled 1 = Outputs enabled Bit 1-7 Not used. Interrupts The APCI-IB40 has one interrupt output signal which is routed to an IRQ line during the PCI BIOS initialisation. This interrupt line is expanded on board to provide two interrupt sources. These interrupts are connected to the output signals from counter 0 and counter 1. An interrupt source register has been provided at index 05H (See Index Registers table). As PCI interrupts are level triggered the interrupt service routine must determine the source of the interrupt then clear the interrupt, this is achieved by reading from the base address location. A PCI BIOS call can be used to determine the IRQ signal assigned to this card. Page 4 J591 APCI-IB40 2192-09099-000-000 Links Throughout this section a + indicates the default link position. Default Link Position Diagram Counter 0 Clock Frequency selection LK1 is used to select the clock frequency for counter 0. LK1 A+ B C CLK 0 Input 1MHZ 100KHZ 10KHZ Timer/Counter Output Signals LK3 & LK4 are used to route the counter/timer output signals to the 50 way I/O connector. These signals share pins with I/O lines 16 and 17. LK3 LK4 Connects timer/counter channel 2 output to ribbon cable pin 24 (I/O Line 17) Connects timer/counter channel 1 output to ribbon cable pin 23 (I/O Line 16) Note:- These signals are buffered before being sent to the links, and have the same open-collector output stage as the other I/O signals. When these links are fitted the corresponding output line should be set to a logic 1 i.e. OFF. If the timer/counter outputs are not required the links should not be fitted. Power Up Output State Control LK10-14 are used to set the power up state of the digital I/O lines, which are to be used as outputs. Each link is associated with a group of eight I/O lines. Link LK10 LK11 LK12 LK13 LK14 I/O Lines 0-7 8-15 16-23 24-31 32-39 Position A + 1 1 1 1 1 Position B 0 0 0 0 0 Page 5 2192-09099-000-000 J591 APCI-IB40 I/O Outputs Enabled by Software LK20-24 are used to select between permanent or software enabled output buffers. When software control is selected the output buffers are enabled by writing 01H to the software enable register at index 90H. Link LK20 LK21 LK22 LK23 LK24 I/O Lines 0-7 8-15 16-23 24-31 32-39 Position A + Software Software Software Software Software Position B Permanent Permanent Permanent Permanent Permanent Note:- A jumper must be fitted to each link, to ensure correct operation. User Configuration Record Diagram Link LK1 LK3 LK4 LK10 LK11 LK12 LK13 LK14 LK20 LK21 LK22 LK23 LK24 Page 6 Default A OPEN OPEN A A A A A A A A A A User J591 APCI-IB40 2192-09099-000-000 D-50 I/O Connector (PL1) Pin Assignments The pin assignments are listed with the pin number of the D-50 connector and also the pin number when a 50-way IDC ribbon cable is connected to the D-50. The pin assignments conform to the Arcom signal conditioning system (SCS) and may be connected to an external signal conditioning board. Signal Name 0V 0V I/O Line 0 I/O Line 1 I/O Line 2 I/O Line 3 I/O Line 4 I/O Line 5 I/O Line 6 I/O Line 7 0V I/O Line 32 I/O Line 8 I/O Line 9 I/O Line 10 I/O Line 11 I/O Line 12 I/O Line 13 I/O Line 14 I/O Line 15 0V I/O Line 33 I/O Line 16 (CT1 O/P) I/O Line 17 (CT2 O/P) I/O Line 18 I/O Line 19 D-type Pin No. 1 34 18 2 35 19 3 36 20 4 37 21 5 38 22 6 39 23 7 40 24 8 41 Ribbon Cable 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 25 24 9 42 25 26 Signal Name I/O Line 20 I/O Line 21 I/O Line 22 I/O Line 23 0V I/O Line 34 I/O Line 24 (Gate 1 I/P) I/O Line 25 (CLK 1 I/P) I/O Line 26 (Gate 2 I/P) I/O Line 27 (CLK 2 I/P) I/O Line 28 I/O Line 29 I/O Line 30 I/O Line 31 0V I/O Line 35 I/O Line 36 I/O Line 37 I/O Line 38 I/O Line 39 12V +12V +5V +5V D-type Pin No. 26 10 43 27 11 44 28 Ribbon Cable 27 28 29 30 31 32 33 12 34 45 35 29 36 13 46 30 14 47 31 15 48 32 16 49 33 17 50 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Page 7 2192-09099-000-000 J591 APCI-IB40 Installation for CE Compliance To maintain compliance with the requirements of the EMC directive (89/336/EEC), this product must be correctly installed. The PC system in which the board is housed must be CE compliant as declared by the manufacturer. The type of external I/O cable required can be chosen according to the notes below: 1. Remove the cover of the PC observing any additional instructions of the PC manufacturer. 2. Locate the board in a spare PCI slot and press gently but firmly into place. 3. Ensure that the metal bracket attached to the board is fully seated. 4. fit the bracket clamping screw and firmly tighten this on the bracket. Note:- Good contact of the bracket to the chassis is essential. 5. Replace the cover of the PC observing any additional instructions of the PC manufacturer. Cable Cable length 1 Metre or less : Cable 1 Metre to 3 Meters : > 3 Meters or noisy environment : Ribbon cable satisfactory. Commerial screened cable. Use fully screened cable with metal backshells e.g. Arcom CAB50CE The following standards have been applied to this product: BS EN50081-1 BS EN50082-1 BSEN55022 Page 8 : 1992 Generic Emissions Standard, Residential, Commercial, Light Industry : 1992 Generic Immunity Standard, Residential, Commercial, Light Industry : 1995 ITE Emissions, Class B, Limits and Methods. J591 APCI-IB40 2192-09099-000-000 Revision History Manual Issue A PCB V1 Iss 2 980313 Comments First released in this format. Page 9 2192-09099-000-000 J591 APCI-IB40 Product Information Full information about other Arcom products is available via the Fax-on-Demand System, (Telephone Numbers are listed below), or by contacting our WebSite in the UK at: www.arcom.co.uk , or in the US at: www.arcomcontrols.com Useful Contact Information Customer Support Tel: +44 (0)1223 412 428 Fax: +44 (0)1223 403 400 E-mail: [email protected] United Kingdom Arcom Control Systems Ltd Clifton Road Cambridge CB1 4WH, UK Tel: 01223 411 200 Fax: 01223 410 457 FoD: 01223 240 600 Sales Tel: Fax: E-mail E-mail United States Arcom Control Systems Inc 13510 South Oak Street Kansas City MO 64145 USA Tel: 816 941 7025 Fax: 816 941 0343 FoD: 800 747 1097 +44 (0)1223 411 200 +44 (0)1223 410 457 [email protected] or for the US [email protected] France Arcom Control Systems Centre daffaires SCALDY 23 rue Colbert 7885 SAINT QUENTIN Cedex, FRANCE Tel: 0800 90 84 06 Fax: 0800 90 84 12 FoD: 0800 90 23 80 Germany Kostenlose Infoline: Tel: 0130 824 511 Fax: 0130 824 512 FoD: 0130 860 449 Italy NumeroVerde: FoD: 1678 73600 Belgium Groen Nummer: Tel: 0800 7 3192 Fax: 0800 7 3191 Netherlands Gratis 06 Nummer: Tel: 06022 11 36 Fax: 06022 11 48 The choice of boards or systems is the responsibility of the buyer, and the use to which they are put cannot be the liability of Arcom Control Systems Ltd. However, Arcoms sales team is always available to assist you in making your decision. © 1997 Arcom Control Systems Ltd Arcom Control Systems is a subsidiary of Fairey Group Plc. Specifications are subject to change without notice and do not form part of any contract. All trademarks recognised. Arcom Control Systems Ltd operate a company-wide quality management system which has been certified by the British Standards Institution (BSI) as compliant with ISO9001:1994 Page 10