TECHNICAL DATA IN74AC574 Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS The IN74AC574 is identical in pinout to the LS/ALS574, HC/HCT574. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS outputs. Data meeting the setup time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip-flops, but when Output Enable is high, all device outputs are forced to the high-impedance state; thus, data may be stored even when the outputs are not enabled. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA; 0.1 µA @ 25°C • High Noise Immunity Characteristic of CMOS Devices • Outputs Source/Sink 24 mA ORDERING INFORMATION IN74AC574N Plastic IN74AC574DW SOIC TA = -40° to 85° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE PIN 20=VCC PIN 10 = GND Inputs Output Enable D Q L H H L L L X no change X Z L H Clock L,H, X X = don’t care Z = high impedance 466 Output IN74AC574 MAXIMUM RATINGS* Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin ±20 mA IOUT DC Output Sink/Source Current, per Pin ±50 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW -65 to +150 °C 260 °C VOUT IIN Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TJ Junction Temperature (PDIP) TA Operating Temperature, All Package Types IOH Output Current - High IOL Output Current - Low tr, tf * Parameter Input Rise and Fall Time (except Schmitt Inputs) * Min Max Unit 2.0 6.0 V 0 VCC V 140 °C +85 °C -24 mA 24 mA 150 40 25 ns/V -40 VCC =3.0 V VCC =4.5 V VCC =5.5 V 0 0 0 VIN from 30% to 70% VCC This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 467 IN74AC574 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VCC Guaranteed Limits V 25 °C -40°C to 85°C Unit VOUT=0.1 V or VCC-0.1 V 3.0 4.5 5.5 2.1 3.15 3.85 2.1 3.15 3.85 V Maximum Low Level Input Voltage VOUT=0.1 V or VCC-0.1 V 3.0 4.5 5.5 0.9 1.35 1.65 0.9 1.35 1.65 V Minimum High-Level Output Voltage IOUT ≤ -50 µA 3.0 4.5 5.5 2.9 4.4 5.4 2.9 4.4 5.4 V 3.0 4.5 5.5 2.56 3.86 4.86 2.46 3.76 4.76 3.0 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 VIN= VIH or VIL IOL=12 mA IOL=24 mA IOL=24 mA 3.0 4.5 5.5 0.36 0.36 0.36 0.44 0.44 0.44 Symbol Parameter VIH Minimum High-Level Input Voltage VIL VOH Test Conditions * VIN=VIH or VIL IOH=-12 mA IOH=-24 mA IOH=-24 mA VOL Maximum Low-Level Output Voltage IOUT ≤ 50 µA V * IIN Maximum Input Leakage Current VIN=VCC or GND 5.5 ±0.1 ±1.0 µA IOZ Maximum ThreeState Leakage Current VIN (OE)= VIH or VIL VIN =VCC or GND VOUT =VCC or GND 5.5 ±0.5 ±5.0 µA IOLD +Minimum Dynamic Output Current VOLD=1.65 V Max 5.5 75 mA IOHD +Minimum Dynamic Output Current VOHD=3.85 V Min 5.5 -75 mA ICC Maximum Quiescent Supply Current (per Package) VIN=VCC or GND 5.5 80 µA * 8.0 All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Note: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC 468 IN74AC574 AC ELECTRICAL CHARACTERISTICS(CL=50pF, Input tr=tf=3.0 ns) VCC* Symbol Parameter Guaranteed Limits 25 °C V Min -40°C to 85°C Max Min Unit Max fmax Maximum Clock Frequency (50% Duty Cycle) (Figure 1) 3.3 5.0 75 95 60 85 tPLH Propagation Delay, Clock to Q (Figure 1) 3.3 5.0 3.5 2.0 13.5 9.5 3.5 2.0 15 11 ns tPHL Propagation Delay, Clock to Q (Figure 1) 3.3 5.0 3.5 2.0 12 8.5 3.5 2.0 13.5 9.5 ns tPZH Propagation Delay, Output Enable to Q (Figure 2) 3.3 5.0 2.5 2.0 11 8.5 2.5 2.0 12 9.0 ns tPZL Propagation Delay, Output Enable to Q (Figure 2) 3.3 5.0 3.0 1.5 10.5 8.0 3.5 2.0 11.5 9.0 ns tPHZ Propagation Delay, Output Enable to Q (Figure 2) 3.3 5.0 4.0 2.0 12 9.5 4.5 2.0 13 10.5 ns tPLZ Propagation Delay, Output Enable to Q (Figure 2) 3.3 5.0 2.0 1.5 9.0 7.5 2.5 1.5 10 8.5 ns CIN Maximum Input Capacitance 5.0 5.0 MHz 5.0 pF Typical @25°C,VCC=5.0 V CPD Power Dissipation Capacitance 25 pF Voltage Range 3.3 V is 3.3 V ±0.3 V Voltage Range 5.0 V is 5.0 V ±0.5 V * TIMING REQUIREMENTS (CL=50pF, Input tr=tf=3.0 ns) VCC* Guaranteed Limit Symbol Parameter V 25°C -40°C to 85°C Unit tSU Minimum Setup Time, Data to Clock (Figure 3) 3.3 5.0 2.5 1.5 3.0 2.0 ns th Minimum Hold Time, Clock to Data (Figure 3) 3.3 5.0 1.5 1.5 1.5 1.5 ns tw Minimum Pulse Width, Clcok (Figure 1) 3.3 5.0 6.0 4.0 7.0 5.0 ns Voltage Range 3.3 V is 3.3 V ±0.3 V Voltage Range 5.0 V is 5.0 V ±0.5 V * 469 IN74AC574 Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM 470