TECHNICAL DATA KK4051B Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS The KK4051B analog multiplexer/demultiplexer is digitally controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20V peak-to-peak can be achieved by digital signal amplitudes of 4.5 to 20V (if VCC - GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC-VEE level differences above 13V a VCC - GND of at least 4.5V is required). These multiplexer circuits dissipate extremely low quiescent power over the full VCC -GND and VCC - VEE supply-voltage ranges, independent of the logic state of the control signals. When a logic “1”is present at the ENABLE input terminal all channels are off. The KK4051B is a single 8-channel multiplexer having three binary control inputs, A, B and C, and an ENABLE input. The three binary signals select 1 of 8 channels to be turned on, and connect one of the 8 inputs to the output. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply N SUFFIX PLASTIC 16 1 D SUFFIX SOIC 16 1 ORDERING INFORMATION KK4051BN Plastic DIP KK4051BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM Single-Pole, 8-Position Plus Common Off FUNCTION TABLE X0 X1 X2 X3 ANALOG INPUTS/OUTPUTS X4 X5 13 14 Control Inputs 15 1 MULTIPLEXER/ DEMULTIPLEXER A CHANNEL-SELECT B INPUTS C ENABLE 3 X COMMON OUTPUT/INPUT Select Channels C B A L L L L X0 L L L H X1 L L H L X2 L L H H X3 L H L L X4 L H L H X5 PIN 16 =VCC L H H L X6 PIN 7 = VEE L H H H X7 H X H = high level L = low level X = don’t care X X None 5 X6 2 X7 Enable 12 ON 4 11 10 9 6 PIN 8 = GND 1 KK4051B MAXIMUM RATINGS* Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) IIN DC Input Current, per Pin PD Power Dissipation in Still Air Ptot Power Dissipation per Output Transistor Tstg Storage Temperature TL Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SO Package) Value Unit -0.5 to +20 V -0.5 to VCC +0.5 V ±10 mA 500*1 mW 100 mW -65 to +150 °C 260 °C *Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. *1 - for Plastic DIP from -55° to +100°C, for SO Package from -55° to +65°C. +Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C SO Package: - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) TA Operating Temperature, All Package Types Min Max Unit 3.0 18 V 0 VCC V -55 +125 °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused Analog I/O pins may be left open or terminated. 2 KK4051B DC ELECTRICAL CHARACTERISTICS Digital Section VCC Symbol Parameter Test Conditions Guaranteed Limit V ≥ -55 °C ≤ 25 °C ≤ 125 °C Unit VIH Minimum High-Level Input Voltage, Channel-Select or Enable Inputs VIS=VCC thru 1kΩ VEE=GND=0 IIS<2µA on all OFF Chanels RL=1kΩ to GND 5 10 15 3.5 7 11 3.5 7 11 3.5 7 11 V VIL Maximum Low -Level Input Voltage, Channel-Select or Enable Inputs VIS=VCC thru 1kΩ VEE=GND=0 IIS<2µA on all OFF Chanels RL=1kΩ to GND 5 10 15 1.5 3 4 1.5 3 4 1.5 3 4 V IIN Maximum Input Leakage Current, Channel-Select or Enable Inputs VIN=VCC or GND VEE=GND=0 18 ±0.1 ±0.1 ±1.0 µA ICC Maximum Quiescent Supply Current (per Package) Channel Select = VCC or GND VEE=GND=0 5 10 15 20 5 10 20 100 5 10 20 100 150 300 600 3000 µA DC ELECTRICAL CHARACTERISTICS Analog Section VCC Guaranteed Limit Test Conditions V ≥ -55 °C ≤ 25 °C ≤ 125 °C Unit Maximum “ON” Resistance VEE=GND=0 VIS = GND to VCC 5 10 15 800 310 200 1050 400 240 1150 550 320 Ω ∆RON Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package VEE=GND=0 5 10 15 - 10* 15* 5* - Ω IOFF Maximum Off- Channel Leakage Current, Any One Channel VEE=GND=0 18 ±100 ±100 ±1000 nA Maximum Off- Channel Leakage Current, Common Channel VEE=GND=0 18 ±100 ±100 ±1000 Symbol Parameter RON * - Typical Value 3 KK4051B AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=20.0 ns) VCC Guaranteed Limit Symbol Parameter V ≥ -55 °C ≤ 25 °C ≤ 125 °C Unit tPHL(tPLH) Maximum Propagation Delay , Analog Input to Analog Output (Figure 1) RL=200kΩ, VEE=GND=0 5 10 15 60 30 20 60 30 20 70 40 30 ns tPHL1(tPLH1) Maximum Propagation Delay , Channel-Select Input to Analog Output (Figure 1) RL=200 kΩ, VEE=GND=0 5 10 15 350 200 160 350 200 160 400 250 200 ns tPZL1(tPZH1) Maximum Propagation Delay , Channel-Select Input to Analog Output (Figure 2) RL=10 kΩ VEE=GND=0 5 10 15 720 320 240 720 320 240 720 320 240 ns VEE=-5В, GND=0 5 450 450 450 Maximum Propagation Delay , Enable to Analog Output (Figure 2) RL=10 kΩ VEE=GND=0 5 10 15 720 320 240 720 320 240 720 320 240 VEE=-10В, GND=0 5 400 400 400 Maximum Propagation Delay , Channel-Select Input to Analog Output (Figure 2) RL=10 kΩ VEE=GND=0 5 10 15 720 320 240 720 320 240 720 320 240 VEE=-5В, GND=0 5 450 450 450 Maximum Propagation Delay , Enable to Analog Output (Figure 2) RL=1,0 kΩ VEE=GND=0 5 10 15 450 210 160 450 210 160 450 210 160 VEE=-10В, GND=0 5 300 300 600 CIN Maximum Input Capacitance, Channel-Select or Enable Inputs - - 7.5 - pF CI/O Maximum Capacitance VEE=GND=-5V CIS 5 - 5* - pF COS 5 - 30* - Feedthrough CIOS 5 - 0.2* - tPZL2(tPZH2) tPLZ1(tPHZ1) tPLZ2(tPHZ2) ns ns ns 4 KK4051B ADDITIONAL APPLICATION CHARACTERISTICS VCC Symbol BW Parameter Maximum OnChannel Bandwidth or Minimum Frequency Response (-3db) Test Conditions VEE=GND=0 RL=1kΩ 20 log(VOS/VIS)=-3db VOS at Common OUT/IN VOS at Any Channel f1 (-40db) Feedthrough Frequency (All Channels OFF) VEE=GND=0 RL=1kΩ 20 log(VOS/VIS)=-40db VOS at Common OUT/IN VOS at Any Channel f2 (-40db) Signal Crosstalk Frequency VIS** VEE=GND=0 RL=1kΩ 20 log(VOS/VIS)=-40db Between Any 2 Channels Limits Typical Value Unit V V 25 °C 10 2,5 20 10 2,5 60 10 2,5 12 10 2,5 8 10 2,5 3 MHz MHz MHz THD Total Harmonic Distortion VEE=GND=0 fIS=1kHz sine wave 5 10 15 1 1,5 2,5 0.3 0.2 0.12 % VAO/I Address-or Enable to Signal Crosstalk VEE=GND=0, RL=10kΩ*** tr,tf=20ns Square Wave 10 - 65 mV (Peak) ** Peak-to-peak voltage symmetrical about (VCC-VEE)/2. *** Both ends of channel. 5 KK4051B VCC 50% INPUT GND t PLH t PHL 50% 10% ANALOG OUT VCC 90% GND tTLH t THL Figure 1. Switching Waveforms tf tr 10% 90% 50% VCC 50% GND t PLZ t PZL VCC 90% ANALOG OUT 10% VOL 90% VOH 10% t PHZ t PZH GND Figure 2. Switching Waveforms EXPANDED LOGIC DIAGRAM Channel IN/OUT Ucc 7 6 5 4 3 2 1 0 16 4 2 5 1 12 15 14 13 TG TG A 11 B 10 C 9 TG Binary to 1 of 8 Decoder with Enable Logic Level Conversion 6 TG COMMON OUT/IN 3 TG TG TG TG ENABLE 8 GND 7 VEE 6 KK4051B N SUFFIX PLASTIC (MS - 001BB) A 9 16 B 1 Dimensions, mm 8 F C -T- SEATING PLANE G M K D H MIN MAX A 18.67 19.69 B 6.10 7.11 C L N Symbol J 0.25 (0.010) M T NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 5.33 D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.20 0.36 N 0.38 D SUFFIX SOIC (MS - 012AC) A 16 Dimensions, mm 9 H B 1 G P 8 R x 45 C -TK D SEATING PLANE J F 0.25 (0.010) M T C M NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for B - 0.25 mm (0.010) per side. M Symbol. MIN MAX A 9.80 10.0 B 3.80 4.00 C 1.35 1.75 D 0.33 0.51 F 0.40 1.27 G 1.27 H 5.72 J 0° 8° K 0.10 0.25 M 0.19 0.25 P 5.80 6.20 R 0.25 0.50 7