TECHNICAL DATA KK74ACT132 Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High-Performance Silicon-Gate CMOS The KK74ACT132 is identical in pinout to the LS/ALS132, HC/HCT132. The KK74ACT132 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The KK74ACT132 can be used to enhance noise immunity or to square up slowly changing waveforms. • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µA; 0.1 µA @ 25°C • Outputs Source/Sink 24 mA ORDERING INFORMATION KK74ACT132N Plastic KK74ACT132D SOIC TA = -40° to 85° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs Output A B Y L L H L H H H L H H H L PIN 14 =VCC PIN 7 = GND 1 KK74ACT132 MAXIMUM RATINGS* Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin ±20 mA IOUT DC Output Sink/Source Current, per Pin ±50 mA ICC DC Supply Current, VCC and GND Pins ±50 mA PD Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ 750 500 mW -65 to +150 °C 260 °C VOUT IIN Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) TJ Junction Temperature (PDIP) TA Operating Temperature, All Package Types IOH Output Current - High IOL Output Current - Low tr, tf * Parameter Input Rise and Fall Time (except Schmitt Inputs) * Min Max Unit 4.5 5.5 V 0 VCC V 140 °C +85 °C -24 mA 24 mA 10 8.0 ns/V -40 VCC =4.5 V VCC =5.5 V 0 0 VIN from 0.8 V to 2.0 V This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK74ACT132 DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VOH V 25 °C -40°C to 85°C Unit 4.5 5.5 4.4 5.4 4.4 5.4 V 4.5 5.5 3.86 4.86 3.76 4.76 4.5 5.5 0.1 0.1 0.1 0.1 VIN ≥ VT +max IOL=12 mA IOL=24 mA IOL=24 mA 4.5 5.5 0.36 0.36 0.44 0.44 Parameter Minimum High-Level Output Voltage Guaranteed Limits Test Conditions IOUT ≤ -50 µA VIN ≤ VT - min or VT +max IOH=-12 mA IOH=-24 mA IOH=-24 mA * VOL Maximum Low-Level Output Voltage IOUT ≤ 50 µA V * VT +max Maximum PositiveGoing Input Threshold Voltage VOUT =0.1 V TA = Worst Case 4.5 5.5 2.0 2.0 V VT - min Minimum NegativeGoing Input Threshold Voltage VOUT = VCC - 0.1 V TA = Worst Case 4.5 5.5 0.8 0.8 V VH max Maximum Hysteresis Voltage VOUT =0.1 V or VCC - 0.1 V TA = Worst Case 4.5 5.5 1.2 1.2 V VH min Minimum Hysteresis Voltage VOUT =0.1 V or VCC - 0.1 V TA = Worst Case 4.5 5.5 0.4 0.4 V Maximum Input Leakage Current VIN=VCC or GND 5.5 ∆ICC Addition Quiescent Supply Current VIN=VCC -2.1 V IOLD +Minimum Dynamic Output Current IOHD ICC IIN ±0.1 ±1.0 µA 5.5 1.5 mA VOLD=1.65 V Max 5.5 75 mA +Minimum Dynamic Output Current VOHD=3.85 V Min 5.5 -75 mA Maximum Quiescent Supply Current (per Package) VIN=VCC or GND 5.5 40 µA 4.0 * All outputs loaded; thresholds on input associated with output under test. +Maximum test duration 2.0 ms, one output loaded at a time. Note: VH=(VT+)-(VT-) 3 KK74ACT132 AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns) Guaranteed Limits Symbol Parameter 25 °C -40°C to 85°C Min Max Min Max Unit tPLH Propagation Delay, Input A or B to Output Y (Figure 1) 3.0 11.5 2.5 13.0 ns tPHL Propagation Delay, Input A or B to Output Y (Figure 1) 3.0 11.0 2.5 12.5 ns CIN Maximum Input Capacitance 4.5 4.5 pF Typical @25°C,VCC=5.0 V CPD Power Dissipation Capacitance 30 pF Figure 1. Switching Waveforms 4 KK74ACT132 N SUFFIX PLASTIC DIP (MS - 001AA) A Dimension, mm 8 14 B 7 1 Symbol MIN MAX A 18.67 19.69 B 6.1 7.11 5.33 C F L C -T- SEATING PLANE N G M K J H D 0.25 (0.010) M T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 D SUFFIX SOIC (MS - 012AB) Dimension, mm A 14 8 H B 1 G P 7 R x 45 C -TK D SEATING PLANE J 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. F M Symbol MIN MAX A 8.55 8.75 B 3.8 4 C 1.35 1.75 D 0.33 0.51 F 0.4 1.27 G 1.27 H 5.27 J 0° 8° K 0.1 0.25 M 0.19 0.25 P 5.8 6.2 R 0.25 0.5 5