PRELIMINARY MX23L3216 32M-BIT MASK ROM FEATURES PIN DESCRIPTION • Bit organization - 4Mb x 8 (byte mode) - 2Mb x 16 (word mode) • Fast access time - Random access:80/25ns(max.) • Page Size - 8 words per page • Current - Operating:40mA - Standby:15uA(max.) • Supply voltage - VCC : 2.7 ~ 3.6V - VCCQ : 2.7 ~ 3.6V • Package - 64 ball mini BGA (10.0mm X 13.0mm, ball pitch 1.0mm) - 56 pin TSOP (14mm x 20mm) • Temperature - -25~85° C Symbol A0~A21 Pin Function Address Inputs, A0 not used in word mode D0~D15 Data Outputs CE0#, CE1# Chip Enable Input CE2# OE# Output Enable Input BYTE# Word/Byte mode Selection VCC Power Supply Pin VCCQ Output VCC Pin GND Ground Pin NC No Connection CHIP ENABLE TRUTH TABLE CE2# CE1# CE0# L L L L L H L H L L H H H L L H L H H H L H H H Note: for single-chip applications, CE2#, strapped to GND. Device Enabled Disabled Disabled Disabled Enabled Enabled Enabled Disabled CE1# can be PIN CONFIGURATION 56 TSOP (Normal Type) NC CE1# A21 A20 A19 A18 A17 A16 VCC A15 A14 A13 A12 CE0# NC NC A11 A10 A9 A8 GND A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 MX23L3216 P/N:PM0860 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 NC NC OE# NC D15 D7 D14 D6 GND D13 D5 D12 D4 VCCQ GND D11 D3 D10 D2 VCC D9 D1 D8 D0 A0 BYTE# NC CE2# REV. 1.0, OCT. 03, 2001 1 MX23L3216 64 Mini BGA (Top View, Balls Facing Down) A1 A2 A3 A4 A5 A6 A7 A8 A1 A6 A8 NC A13 VCC A18 NC B1 B2 B3 B4 B5 B6 B7 B8 A2 GND A9 CE0# A14 NC A19 CE1# C1 C2 C3 C4 C5 C6 C7 C8 A3 A7 A10 A12 A15 NC A20 A21 D1 D2 D3 D4 D5 D6 D7 D8 A4 A5 A11 NC NC NC A16 A17 E1 E2 E3 E4 E5 E6 E7 E8 D8 D1 D9 D3 D4 NC D15 NC F1 F2 F3 F4 F5 F6 F7 F8 BYTE# D0 D10 D11 D12 NC NC OE# G1 G2 G3 G4 G5 G6 G7 G8 NC A0 D2 VCCQ D5 D6 D14 NC H1 H2 H3 H4 H5 H6 H7 H8 CE2# NC VCC GND GND D7 NC D13 13.0 mm 10.0 mm MODE SELECTION CE# OE# Byte# D0~D7 D8~D15 Power Disabled X X High Z High Z Stand-by Enabled H X High Z High Z Active Enabled L L D0~D7 High Z Active Enabled L H D0~D7 D8~D15 Active ORDER INFORMATION Part No. MX23L3216TI-80 MX23L3216TI-10 MX23L3216TI-12 MX23L3216XI-80 MX23L3216XI-10 MX23L3216XI-12 Speed 80ns 100ns 120ns 80ns 100ns 120ns Package 56 pin TSOP 56 pin TSOP 56 pin TSOP 64 ball mini BGA 64 ball mini BGA 64 ball mini BGA Grade Industrial Industrial Industrial Industrial Industrial Industrial Note: Industrial grade temperature: -25 ~ 85° C Commercial grade temperature: 0 ~ 70° C P/N:PM0860 REV. 1.0, OCT. 03, 2001 2 MX23L3216 ABSOLUTE MAXIMUM RATINGS Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -0.3V to 3.9V -25° C to 85° C -65° C to 125° C DC CHARACTERISTICS (Ta = -25° C ~ 85° C, VCC = 2.7V~3.6V) Item Symbol MIN. MAX. Conditions Output High Voltage VOH 2.4V - IOH = -400uA Output Low Voltage VOL - 0.4V IOL = 1.6mA Input High Voltage VIH 2.2V VCCQ+0.5V Input Low Voltage VIL -0.5V 0.8V Input Leakage Current ILI - 10uA 0V, VCC Output Leakage Current ILO -10 10uA 0V, VCC Operating Current ICC - 40mA f=5MHz, CE#=VIL, OE#=VIH all output open Standby Current (CMOS) ISTB - 15uA CE#>VCC-0.2V Input Capacitance CIN - 10pF Ta = 25° C, f = 1MHZ COUT - 10pF Ta = 25° C, f = 1MHZ Output Capacitance AC CHARACTERISTICS (Ta = -25° C ~ 85° C, VCC = 2.7V~3.6V) Item Symbol 23L3216-80 23L3216-10 23L3216-12 MIN. MAX. MIN. MAX. MIN. MAX. Read Cycle Time tRC 80ns - 100ns - 120ns - Address Access Time tAA - 80ns - 100ns - 120ns Chip Enable Access Time tACE - 80ns - 100ns - 120ns Page Mode Access Time tPA - 25ns - 25ns - 25ns Output Enable Time tOE - 25ns - 25ns - 25ns Output Hold After Address tOH 0ns - 0ns - 0ns - Output High Z Delay tHZ - 20ns - 20ns - 20ns Note:Output high-impedance delay (tHZ) is measured from OE# or CE# going high, and this parameter guaranteed by design over the full voltage and temperature operating range - not tested. P/N:PM0860 REV. 1.0, OCT. 03, 2001 3 MX23L3216 AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~2.4V 5ns 1.5V 1.5V See Figure 100pF output load capacitance IOH (load)=-400uA DOUT IOL (load)=1.6mA C<100pF Note:No output loading is present in tester load board. Active loading is used and under software programming control. TIMING DIAGRAM Output loading capacitance includes load board's and all stray capacitance. RANDOM READ ADD ADD ADD ADD tRC tACE CE# tOE OE# tOH tAA VALID DATA VALID tHZ VALID PAGE READ VALID ADD A4-A21 A0,A1,A2,A3 2'nd ADD 1'st ADD tAA DATA 3'rd ADD tPA VALID VALID VALID Note: CE#, OE# are enable. Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode. P/N:PM0860 REV. 1.0, OCT. 03, 2001 4 MX23L3216 MACRONIX INTERNATIONAL CO., LTD. Headquarters: TEL:+886-3-578-6688 FAX:+886-3-563-2888 Europe Office : TEL:+32-2-456-8020 FAX:+32-2-456-8021 Hong Kong Office : TEL:+86-755-834-335-79 FAX:+86-755-834-380-78 Japan Office : Kawasaki Office : TEL:+81-44-246-9100 FAX:+81-44-246-9105 Osaka Office : TEL:+81-6-4807-5460 FAX:+81-6-4807-5461 Singapore Office : TEL:+65-6346-5505 FAX:+65-6348-8096 Taipei Office : TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 MACRONIX AMERICA, INC. TEL:+1-408-262-8887 FAX:+1-408-262-8810 http : //www.macronix.com MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.