NSC LP3988IMF-2.85

LP3988
Micropower, 150mA Ultra Low-Dropout CMOS Voltage
Regulator With Power Good
General Description
The LP3988 is a 150mA low dropout regulator designed
specially to meet requirements of Portable batteryapplications. The LP3988 is designed to work with a space
saving, small 1µF ceramic capacitor. The LP3988 features
an Error Flag output that indicates a faulty output condition.
The LP3988’s performance is optimized for battery powered
systems to deliver low noise, extremely low dropout voltage
and low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life.
Power supply rejection is better than 60 dB at low frequencies and starts to roll off at 10 kHz. High power supply
rejection is maintained down to lower input voltage levels
common to battery operated circuits.
The device is ideal for mobile phone and similar battery
powered wireless applications. It provides up to 150 mA,
from a 2.5V to 6V input, consuming less than 1 µA in disable
mode and has fast turn-on time less than 200µs.
The LP3988 is available 5 pin SOT-23 package and 5 bump
thin micro SMD package. Performance is specified for −40˚C
to +125˚C temperature range and is available in 1.85, 2.5,
2.6, 2.85, 3.0 and 3.3V output voltages.
n
n
n
n
n
n
40dB PSRR at 10kHz
≤1 µA quiescent current when shut down
Fast Turn-On time: 100 µs (typ.)
80 mV typ dropout with 150mA load
−40 to +125˚C junction temperature range for operation
1.85V, 2.5V, 2.6V, 2.85V, 3.0V, and 3.3V
Features
n
n
n
n
n
n
n
5 bump thin micro SMD package
SOT-23-5 package
Power-good flag output
Logic controlled enable
Stable with ceramic and high quality tantalum capacitors
Fast turn-on
Thermal shutdown and short-circuit current limit
Applications
n
n
n
n
n
CDMA cellular handsets
Wideband CDMA cellular handsets
GSM cellular handsets
Portable information appliances
Tiny 3.3V ± 5% to 2.85V, 150mA converter
Key Specifications
n 2.5 to 6.0V input range
n 150mA guaranteed output
Typical Application Circuit
20020502
© 2004 National Semiconductor Corporation
DS200205
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LP3988 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator With Power Good
August 2004
LP3988
Block Diagram
20020501
Pin Descriptions
Name
micro SMD
SOT
Function
VEN
A1
3
Enable Input Logic, Enable High
GND
B2
2
Common Ground
VOUT
C1
5
Output Voltage of the LDO
VIN
C3
1
Input Voltage of the LDO
Power Good
A3
4
Power Good Flag (output):
open-drain output, connected to
an external pull-up resistor.
Active low indicates an output
voltage out of tolerance
condition.
Connection Diagrams
SOT-23-5 Package (MF)
5 Bump micro SMD Package (TLA)
20020507
Top View
See NS Package Number MF05A
20020530
Top View
See NS Package Number TLA05
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LP3988
Ordering Information
SOT23-5 Package
Output
Voltage (V)
LP3988 Supplied as 1000
Units, Tape and Reel
Grade
LP3988 Supplied as 3000
Units, Tape and Reel
2.5
STD
LP3988IMF-2.5
LP3988IMFX-2.5
2.6
STD
LP3988IMF-2.6
LP3988IMFX-2.6
LDJB
2.85
STD
LP3988IMF-2.85
LP3988IMFX-2.85
LDLB
3.0
STD
LP3988IMF-3.0
LP3988IMFX-3.0
LFAB
3.3
STD
LP3988IMF-3.3
LP3988IMFX-3.3
LH5B
Package Marking
LFSB
5 Bump Thin Micro SMD Package
Output
Voltage (V)
Grade
LP3988 Supplied as 250
Units, Tape and Reel
LP3988 Supplied as 3000
Units, Tape and Reel
1.85
STD
LP3988ITL-1.85
LP3988ITLX-1.85
2.6
STD
LP3988ITL-2.6
LP3988ITLX-2.6
2.85
STD
LP3988ITL-2.85
LP3988ITLX-2.85
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LP3988
Absolute Maximum Ratings (Notes 1, 2)
ESD Rating (Note 4)
Human Body Model
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
−0.3 to 6.5V
VIN
VOUT, VEN, PowerGood(applies
only to micro SMD)
−0.3V to (VIN+0.3V),
with 6V max
Junction Temperature
150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temp, Pad Temp.
Power Dissipation (Note 3)
SOT23-5
micro SMD
2kV
Machine Model
SOT23-5 (Note 13)
150V
micro SMD
200V
Operating Ratings (Notes 1, 2)
VIN(Note 15)
2.5V to 6V
VOUT, VEN
235˚C
0 to VIN
Junction Temperature
−40˚C to +125˚C
Junction-to-Ambient Thermal
Resistance (θJA)
SOT23-5
micro SMD
364mW
355mW
220oC/W
255oC/W
Maximum Power Dissipation (Note 5)
SOT23-5
micro SMD
250mW
244mW
Electrical Characteristics
Unless otherwise specified: VEN = 1.8V, VIN = VOUT + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF. Typical values and limits
appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature
range for operation, −40˚C to +125˚C. (Note 6) (Note 7)
Symbol
Parameter
Output Voltage
Tolerance
∆VOUT
Conditions
Typ
−20˚C % TJ % 125˚C, SOT23-5
−40˚C % TJ % 125˚C, SOT23-5
−40˚C % TJ % 125˚C, micro SMD
Line Regulation Error
Load Regulation Error
(Note 8)
PSRR
Power Supply Rejection Ratio
IQ
Quiescent Current
Dropout Voltage (Note 9)
VIN = VOUT
(NOM)
+ 0.5V to 6.0V
Limit
Min
Max
−2
−3
−3.5
2
3
3.5
65
VIN = VOUT(nom) + 1V,
f = 10 kHz,
IOUT = 50 mA (Figure 3)
45
% of
VOUT(nom)
-3
3
−0.15
−0.2
0.15
0.2
%/V
0.005
0.007
%/mA
IOUT = 1 mA to 150 mA
VIN = VOUT(nom) + 1V,
f = 1 kHz,
IOUT = 50 mA (Figure 3)
Units
dB
VEN = 1.4V, IOUT = 0 mA
85
120
VEN = 1.4V, IOUT = 0 to 150 mA
140
200
1.0
VEN = 0.4V
0.003
IOUT = 1 mA
1
5
IOUT = 150 mA
80
115
150
µA
mV
ISC
Short Circuit Current Limit
(Note 10)
600
en
Output Noise Voltage
BW = 10 Hz to 100 kHz,
COUT = 1µF
220
Output Capacitor
Capacitance (Note 11)
1
20
µF
ESR (Note 11)
5
500
mΩ
COUT
TSD
mA
µVrms
Thermal Shutdown Temperature
160
˚C
Thermal Shutdown Hysteresis
20
˚C
Enable Control Characteristics (Note 12)
IEN
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Maximum Input Current at EN
VEN = 0 and VIN = 6.0V
4
0.1
µA
(Continued)
Unless otherwise specified: VEN = 1.8V, VIN = VOUT + 0.5V, CIN = 1 µF, IOUT = 1mA, COUT = 1 µF. Typical values and limits
appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire junction temperature
range for operation, −40˚C to +125˚C. (Note 6) (Note 7)
Symbol
Parameter
Conditions
Typ
Limit
Min
Units
Max
VIL
Logic Low Input threshold
VIN = 2.5V to 6.0V
VIH
Logic High Input threshold
VIN = 2.5V to 6.0V
VTHL
VTHH
Power Good
Low threshold
High Threshold
% of VOUT (PG ON) Figure 2
% of VOUT (PG OFF) Figure 2 (Note
14)
VOL
PG Output Logic Low Voltage
IPULL-UP = 100µA, fault condition
0.02
IPGL
PG Output Leakage Current
PG Off, VPG = 6V
0.02
µA
TON
Power Good Turn On time,
(Note 9)
VIN = 4.2V
10
µs
TOFF
Power Good Turn Off time,
(Note 9)
VIN = 4.2V
10
µs
0.5
V
1.2
V
Power Good
93
95
90
92
95
98
%
0.1
V
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical
Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula:
PD = (TJ - TA)/θJA
where TJ is the junction temperature, TA is the ambient temperature, and θ JA is the junction-to-ambient thermal resistance. The 364mW rating appearing under
Absolute Maximum Ratings for the SOT23-5 package results from substituting the Absolute Maximum junction temperature, 150˚C, for TJ, 70˚C for TA, and 220˚C/W
for θJA. More power can be dissipated safely at ambient temperatures below 70˚C . Less power can be dissipated safely at ambient temperatures above 70˚C. The
Absolute Maximum power dissipation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW for each degree above 70˚C. Same
principle applies to the micro SMD package.
Note 4: The human body model is 100pF discharged through 1.5kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each
pin.
Note 5: Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 250mW rating
appearing under Operating Ratings for the SOT23-5 package results from substituting the maximum junction temperature for operation, 125˚C, for TJ, 70˚C for TA,
and 220˚C/W for θJA into (Note 3) above. More power can be dissipated at ambient temperatures below 70˚C . Less power can be dissipated at ambient
temperatures above 70˚C. The maximum power dissipation for operation can be increased by 4.5mW for each degree below 70˚C, and it must be derated by 4.5mW
for each degree above 70˚C. Same principle applies to the micro SMD package.
Note 6: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with TJ = 25˚C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 7: The target output voltage, which is labeled VOUT(nom), is the desired voltage option.
Note 8: An increase in the load current results in a slight decrease in the output voltage and vice versa.
Note 9: Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value.
Note 10: Short circuit current is measured on input supply line after pulling down VOUT to 95% VOUT(nom).
Note 11: Guaranteed by design. The capacitor tolerance should be ± 30% or better over the full temperature range. The full range of operating conditions such as
temperature, DC bias and even capacitor case size for the capacitor in the application should be considered during device selection to ensure this minimum
capacitance specification is met. X7R capacitor types are recommended to meet the full device temperature range.
Note 12: Turn-on time is time measured between the enable input just exceeding VIH and the output voltage just reaching 95% of its nominal value.
Note 13: 100V machine model for Power-good flag, pin 4.
Note 14: The low and high thresholds are generated together. Typically a 2.6% difference is seen between these thresholds.
Note 15: The minimum VIN is dependant on the device output option.
For Vout(NOM) < 2.5V, VIN(MIN) will equal 2.5V. For Vout(NOM) > = 2.5V, VIN(MIN) will equal Vout(NOM) + 200mV.
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LP3988
Electrical Characteristics
LP3988
20020522
FIGURE 1. Power Good Flag Timing
20020508
FIGURE 2. Line Transient response Input Perturbation
20020509
FIGURE 3. PSRR Input Perturbation
Typical Performance Characteristics
Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN
= VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN.
Ripple Rejection Ratio (LP3988-2.6)
Ripple Rejection Ratio (LM3988-2.6)
20020510
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20020511
6
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VOUT through a 100KΩ resistor)
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VIN through a 100KΩ resistor)
20020512
20020513
Power-Good Response Time (LP3988-2.85)
(flag pin pulled to VOUT through a 100KΩ resistor)
Line Transient Response (LP3988-2.85)
20020514
20020515
Line Transient Response (LP3988-2.85)
Power-Up Response
20020516
20020517
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LP3988
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN =
VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
LP3988
Typical Performance Characteristics Unless otherwise specified, CIN = COUT = 1 µF Ceramic, VIN =
VOUT + 0.2V, TA = 25˚C, Enable pin is tied to VIN. (Continued)
Enable Response
Enable Response
20020518
20020519
Load Transient Response
Load Transient Response
20020520
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20020521
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The LP3988 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer: for
capacitance values in the range of 1µF to 4.7µF range,
ceramic capacitors are the smallest, least expensive and
have the lowest ESR values (which makes them best for
eliminating high frequency noise). The ESR of a typical 1µF
ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which
easily meets the ESR requirement for stability by the
LP3988.
The ceramic capacitor’s capacitance can vary with temperature. Most large value ceramic capacitors () 2.2µF) are
manufactured with Z5U or Y5V temperature characteristics,
which results in the capacitance dropping by more than 50%
as the temperature goes from 25˚C to 85˚C.
A better choice for temperature coefficient in a ceramic
capacitor is X7R, which holds the capacitance within ± 15%.
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP3988 requires external
capacitors for regulator stability. The LP3988 is specifically
designed for portable applications requiring minimum board
space and smallest components. These capacitors must be
correctly selected for good performance.
INPUT CAPACITOR
An input capacitance of ) 1µF is required between the
LP3988 input pin and ground (the amount of the capacitance
may be increased without limit).
This capacitor must be located a distance of not more than
1cm from the input pin and returned to a clean analog
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Tantalum capacitors are less desirable than ceramic for use
as output capacitors because they are more expensive when
comparing equivalent capacitance and voltage ratings in the
1µF to 4.7µF range.
Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly ) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
There are no requirements for the ESR on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will be ) 1µF over the entire operating temperature
range.
OUTPUT CAPACITOR
The LP3988 is designed specifically to work with very small
ceramic output capacitors. A ceramic capacitor (dielectric
types Z5U, Y5V or X7R) in 1 to 22 µF range with 5mΩ to
500mΩ ESR range is suitable in the LP3988 application
circuit.
It may also be possible to use tantalum or film capacitors at
the output, but these are not as attractive for reasons of size
and cost (see next section Capacitor Characteristics).
The output capacitor must meet the requirement for minimum amount of capacitance and also have an ESR (Equivalent Series Resistance) value which is within a stable range
(5 mΩ to 500 mΩ).
ON/OFF INPUT OPERATION
The LP3988 is turned off by pulling the VEN pin low, and
turned on by pulling it high. If this feature is not used, the VEN
pin should be tied to VIN to keep the regulator output on at all
time. To assure proper operation, the signal source used to
drive the VEN input must be able to swing above and below
the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH.
FAST ON-TIME
The LP3988 utilizes a speed up circuitry to ramp up the
internal VREF voltage to its final value to achieve a fast
output turn on time.
NO-LOAD STABILITY
The LP3988 will remain stable and in regulation with no
external load. This is specially important in CMOS RAM
keep-alive applications.
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LP3988
CAPACITOR CHARACTERISTICS
Application Hints
LP3988
Physical Dimensions
inches (millimeters)
unless otherwise noted
5-Lead Small Outline Package (MF)
NS Package Number MF05A
Thin micro SMD, 5 bump Package (TLA05)
NS Package Number TLA05AEA
The dimensions for X1, X2 and X3 are as given:
X1 = 1.006mm +/- 0.03mm
X2 = 1.463mm +/- 0.03mm
X3 = 0.6mm +/- 0.075mm
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labeling, can be reasonably expected to result in a
significant injury to the user.
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support device or system whose failure to perform
can be reasonably expected to cause the failure of
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LP3988 Micropower, 150mA Ultra Low-Dropout CMOS Voltage Regulator With Power Good
Notes