NSC LMC660EN

LMC660
CMOS Quad Operational Amplifier
General Description
The LMC660 CMOS Quad operational amplifier is ideal for
operation from a single supply. It operates from +5V to +15V
and features rail-to-rail output swing in addition to an input
common-mode range that includes ground. Performance
limitations that have plagued CMOS amplifiers in the past
are not a problem with this design. Input VOS, drift, and
broadband noise as well as voltage gain into realistic loads
(2 kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.
This chip is built with National’s advanced Double-Poly
Silicon-Gate CMOS process.
See the LMC662 datasheet for a dual CMOS operational
amplifier with these same features.
Features
n
n
n
n
n
Rail-to-rail output swing
Specified for 2 kΩ and 600Ω loads
High voltage gain: 126 dB
Low input offset voltage: 3 mV
Low offset voltage drift: 1.3 µV/˚C
Ultra low input bias current: 2 fA
Input common-mode range includes V−
Operating range from +5V to +15V supply
ISS = 375 µA/amplifier; independent of V+
Low distortion: 0.01% at 10 kHz
Slew rate: 1.1 V/µs
Available in extended temperature range (−40˚C to
+125˚C); ideal for automotive applications
n Available to Standard Military Drawing specification
n
n
n
n
n
n
n
Applications
n
n
n
n
n
n
n
n
High-impedance buffer or preamplifier
Precision current-to-voltage converter
Long-term integrator
Sample-and-Hold circuit
Peak detector
Medical instrumentation
Industrial controls
Automotive sensors
Connection Diagram
14-Pin DIP/SO
DS008767-1
© 1999 National Semiconductor Corporation
DS008767
www.national.com
LMC660 CMOS Quad Operational Amplifier
April 1998
Ordering Information
Package
14-Pin
Temperature Range
Military
Extended
Industrial
Commercial
−55˚C to +125˚C
−40˚C +125˚C
−40˚C to +85˚C
0˚C to +70˚C
LMC660AMJ/883
NSC
Drawing
Transport
Media
J14A
Rail
Ceramic DIP
14-Pin
LMC660EM
LMC660AIM
LMC660CM
M14A
Small Outline
Rail
Tape and Reel
14-Pin
LMC660EN
LMC660AIN
LMC660CN
N14A
Rail
D14E
Rail
Molded DIP
14-Pin
Side Brazed
LMC660AMD
Ceramic DIP
www.national.com
2
Absolute Maximum Ratings (Note 3)
Operating Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Temperature Range
LMC660AMJ/883,
LMC660AMD
LMC660AI
LMC660C
LMC660E
Supply Voltage Range
Power Dissipation
Thermal Resistance (θJA) (Note 11)
14-Pin Ceramic DIP
14-Pin Molded DIP
14-Pin SO
14-Pin Side Brazed
Ceramic DIP
± Supply Voltage
Differential Input Voltage
Supply Voltage
Output Short Circuit to V+
Output Short Circuit to V−
Lead Temperature
(Soldering, 10 sec.)
Storage Temp. Range
Voltage at Input/Output Pins
Current at Output Pin
Current at Input Pin
Current at Power Supply Pin
Power Dissipation
Junction Temperature
ESD tolerance (Note 8)
16V
(Note 12)
(Note 1)
260˚C
−65˚C to +150˚C
(V+) + 0.3V, (V−) − 0.3V
± 18 mA
± 5 mA
35 mA
(Note 2)
150˚C
1000V
−55˚C ≤ TJ ≤ +125˚C
−40˚C ≤ TJ ≤ +85˚C
0˚C ≤ TJ ≤ +70˚C
−40˚C ≤ TJ ≤ +125˚C
4.75V to 15.5V
(Note 10)
90˚C/W
85˚C/W
115˚C/W
90˚C/W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V−
= 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Parameter
Conditions
Input Offset Voltage
Typ
(Note 4)
LMC660AMD
1
Input Offset Voltage
LMC660AI LMC660C LMC660E
Units
LMC660AMJ/883
Limit
Limit
Limit
Limit
(Notes 4, 9)
(Note 4)
(Note 4)
(Note 4)
3
3
6
6
mV
3.5
3.3
6.3
6.5
max
1.3
µV/˚C
Average Drift
Input Bias Current
0.002
20
100
Input Offset Current
0.001
0V ≤ VCM ≤ 12.0V
V+ = 15V
83
83
Rejection Ratio
5V ≤ V+ ≤ 15V
VO = 2.5V
Negative Power Supply
0V ≤ V− ≤ −10V
94
Rejection Ratio
Positive Power Supply
2
60
max
100
2
1
60
max
70
70
63
63
dB
68
68
62
60
min
70
70
63
63
dB
68
68
62
60
min
20
pA
>1
Input Resistance
Common Mode
pA
4
TeraΩ
Rejection Ratio
Input Common-Mode
V+ = 5V & 15V
Voltage Range
For CMRR ≥ 50 dB
−0.4
V+ − 1.9
Large Signal
RL = 2 kΩ (Note 5)
Voltage Gain
Sourcing
2000
84
84
74
74
dB
82
83
73
70
min
−0.1
−0.1
−0.1
−0.1
V
0
0
0
0
max
V+ − 2.3
V+ − 2.3
V+ − 2.3
V+ − 2.3
V
V+ − 2.6
V+ − 2.5
V+ − 2.4
V+ − 2.6
min
400
440
300
200
V/mV
300
400
200
100
min
180
90
90
V/mV
Sinking
500
180
70
120
80
40
min
RL = 600Ω (Note 5)
1000
200
220
150
100
V/mV
150
200
100
75
min
100
100
50
50
V/mV
35
60
40
20
min
Sourcing
Sinking
250
3
www.national.com
DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V−
= 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Parameter
Output Swing
Conditions
Typ
(Note 4)
V+ = 5V
RL = 2 kΩ to V+/2
LMC660AMD
Limit
Limit
Limit
Limit
(Note 4)
(Note 4)
(Note 4)
4.82
4.82
4.78
4.78
V
4.77
4.79
4.76
4.70
min
0.15
0.15
0.19
0.19
V
0.19
0.17
0.21
0.25
max
0.10
4.61
0.30
V+ = 15V
RL = 2 kΩ to V+/2
14.63
0.26
V+ = 15V
RL = 600Ω to V+/2
13.90
0.79
Output Current
V+ = 5V
Sourcing, VO = 0V
Output Current
V+ = 15V
4.41
4.41
4.27
4.27
V
4.24
4.31
4.21
4.10
min
0.50
0.50
0.63
0.63
V
0.63
0.56
0.69
0.75
max
14.50
14.50
14.37
14.37
V
14.40
14.44
14.32
14.25
min
0.35
0.35
0.44
0.44
V
0.43
0.40
0.48
0.55
max
13.35
13.35
12.92
12.92
V
13.02
13.15
12.76
12.60
min
1.16
1.16
1.45
1.45
V
1.42
1.32
1.58
1.75
max
16
16
13
13
mA
12
14
11
9
min
16
16
13
13
mA
12
14
11
9
min
19
28
23
23
mA
19
25
21
15
min
19
28
23
23
mA
19
24
20
15
min
2.2
2.2
2.7
2.7
mA
2.9
2.6
2.9
3.0
max
22
Sinking, VO = 5V
21
Sourcing, VO = 0V
40
Sinking, VO = 13V
39
(Note 12)
Supply Current
All Four Amplifiers
VO = 1.5V
Units
(Notes 4, 9)
4.87
V+ = 5V
RL = 600Ω to V+/2
LMC660AI LMC660C LMC660E
LMC660AMJ/883
1.5
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V−
= 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Parameter
Slew Rate
Conditions
(Note 6)
Typ
(Note 4)
LMC660AMD
LMC660AI
LMC660C
LMC660E
Units
LMC660AMJ/883
Limit
Limit
Limit
Limit
(Notes 4, 9)
(Note 4)
(Note 4)
(Note 4)
0.8
0.8
0.8
0.8
0.5
0.6
0.7
0.4
1.1
min
Gain-Bandwidth Product
1.4
Phase Margin
50
Gain Margin
17
dB
130
dB
Input Referred Voltage Noise
(Note 7)
F = 1 kHz
Input Referred Current Noise
F = 1 kHz
0.0002
Amp-to-Amp Isolation
www.national.com
0.5
V/µs
MHz
Deg
22
4
AC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C. Boldface limits apply at the temperature extremes. V+ = 5V, V−
= 0V, VCM = 1.5V, VO = 2.5V and RL > 1M unless otherwise specified.
Parameter
Total Harmonic Distortion
Conditions
Typ
(Note 4)
F = 10 kHz,
AV = −10
RL = 2 kΩ,
VO = 8 VPP
V+ = 15V
LMC660AMD
LMC660AI
LMC660C
LMC660E
Units
LMC660AMJ/883
Limit
Limit
Limit
Limit
(Notes 4, 9)
(Note 4)
(Note 4)
(Note 4)
%
0.01
Note 1: Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature and/or multiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of ± 30 mA over long term may adversely affect reliability.
Note 2: The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
− TA)/θJA.
Note 3: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4: Typical values represent the most likely parametric norm. Limits are guaranteed by testing or correlation.
Note 5: V+ = 15V, VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 11.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V.
Note 6: V+ = 15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
Note 7: Input referred. V+ = 15V and RL = 10 kΩ connected to V+/2. Each amp excited in turn with 1 kHz to produce VO = 13 VPP.
Note 8: Human body model, 1.5 kΩ in series with 100 pF.
Note 9: A military RETS electrical test specification is available on request. At the time of printing, the LMC660AMJ/883 RETS spec complied fully with the boldface
limits in this column. The LMC660AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA.
Note 11: All numbers apply for packages soldered directly into a PC board.
Note 12: Do not connect output to V+ when V+ is greater than 13V or reliability may be adversely affected.
Typical Performance Characteristics
Supply Current
vs Supply Voltage
VS = ± 7.5V, TA = 25˚C unless otherwise specified
Input Bias Current
Offset Voltage
DS008767-26
DS008767-25
DS008767-24
Output Characteristics
Current Sinking
Output Characteristics
Current Sourcing
DS008767-27
Input Voltage Noise
vs Frequency
DS008767-28
5
DS008767-29
www.national.com
Typical Performance Characteristics
CMRR vs Frequency
VS = ± 7.5V, TA = 25˚C unless otherwise specified (Continued)
Open-Loop Frequency
Response
Frequency Response
vs Capacitive Load
DS008767-30
DS008767-31
Non-Inverting Large Signal
Pulse Response
Stability vs
Capacitive Load
DS008767-32
Stability vs
Capacitive Load
DS008767-33
DS008767-34
DS008767-35
Note: Avoid resistive loads of less than 500Ω, as they may cause instability.
Application Hints
Amplifier Topology
The topology chosen for the LMC660, shown in Figure 1, is
unconventional (compared to general-purpose op amps) in
that the traditional unity-gain buffer output stage is not used;
instead, the output is taken directly from the output of the integrator, to allow rail-to-rail output swing. Since the buffer
traditionally delivers the power to the load, while maintaining
high op amp gain and stability, and must withstand shorts to
either rail, these tasks now fall to the integrator.
As a result of these demands, the integrator is a compound
affair with an embedded gain stage that is doubly fed forward
(via Cf and Cff) by a dedicated unity-gain compensation
driver. In addition, the output portion of the integrator is a
push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
www.national.com
DS008767-4
FIGURE 1. LMC660 Circuit Topology (Each Amplifier)
The large signal voltage gain while sourcing is comparable
to traditional bipolar op amps, even with a 600Ω load. The
gain while sinking is higher than most CMOS op amps, due
to the additional gain stage; however, under heavy load
(600Ω) the gain will be reduced as indicated in the Electrical
Characteristics.
Compensating Input Capacitance
The high input resistance of the LMC660 op amps allows the
use of large feedback and source resistor values without losing gain accuracy due to loading. However, the circuit will be
especially sensitive to its layout when these large-value resistors are used.
6
Application Hints
(Continued)
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance between the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the
socket, etc.) and the feedback resistors create a pole in the
feedback path. In the following General Operational Amplifier
circuit, Figure 2 the frequency of this pole is
the feedback capacitor should be:
Note that these capacitor values are usually significant
smaller than those given by the older, more conservative formula:
where CS is the total capacitance at the inverting input, including amplifier input capcitance and any stray capacitance
from the IC socket (if one is used), circuit board traces, etc.,
and RP is the parallel combination of RF and RIN. This formula, as well as all formulae derived below, apply to inverting and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few kΩ, the
frequency of the feedback pole will be quite high, since CS is
generally less than 10 pF. If the frequency of the feedback
pole is much higher than the “ideal” closed-loop bandwidth
(the nominal closed-loop bandwidth in the absence of CS),
the pole will have a negligible effect on stability, as it will add
only a small amount of phase shift.
However, if the feedback pole is less than approximately 6 to
10 times the “ideal” −3 dB frequency, a feedback capacitor,
CF, should be connected between the output and the inverting input of the op amp. This condition can also be stated in
terms of the amplifier’s low-frequency noise gain: To maintain stability a feedback capacitor will probably be needed if
DS008767-6
CS consists of the amplifier’s input capacitance plus any stray capacitance
from the circuit board and socket. CF compensates for the pole caused by
CS and the feedback resistors.
FIGURE 2. General Operational Amplifier Circuit
Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray capacitance, or to tolerate additional phase shifts in the loop, or
excessive capacitive load, or to decrease the noise or bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capacitance may be larger or smaller than the breadboard’s, so the
actual optimum value for CF may be different from the one
estimated using the breadboard. In most cases, the values
of CF should be checked on the actual circuit, starting with
the computed value.
Capacitive Load Tolerance
Like many other op amps, the LMC660 may oscillate when
its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See
Typical Performance Characteristics.
The load capacitance interacts with the op amp’s output resistance to create an additional pole. If this pole frequency is
sufficiently low, it will degrade the op amp’s phase margin so
that the amplifier is no longer stable at low gains. As shown
in Figure 3, the addition of a small resistor (50Ω to 100Ω) in
series with the op amp’s output, and a capacitor (5 pF to
10 pF) from inverting input to output pins, returns the phase
margin to a safe value without interfering with lowerfrequency circuit operation. Thus larger values of capacitance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily when the load capacitance
is near the threshold for oscillation.
where
is the amplifier’s low-frequency noise gain and GBW is the
amplifier’s gain bandwidth product. An amplifier’s lowfrequency noise gain is represented by the formula
regardless of whether the amplifier is being used in inverting
or non-inverting mode. Note that a feedback capacitor is
more likely to be needed when the noise gain is low and/or
the feedback resistor is large.
If the above condition is met (indicating a feedback capacitor
will probably be needed), and the noise gain is large enough
that:
the following value of feedback capacitor is recommended:
If
7
www.national.com
Application Hints
rings for standard op-amp configurations. If both inputs are
active and at high impedance, the guard can be tied to
ground and still provide some protection; see Figure 6d.
(Continued)
DS008767-5
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
Capacitive load driving capability is enhanced by using a pull
up resistor to V+ (Figure 4). Typically a pull up resistor conducting 500 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
DS008767-16
FIGURE 5. Example, using the LMC660,
of Guard Ring in P.C. Board Layout
DS008767-23
FIGURE 4. Compensating for Large Capacitive Loads
with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC660’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
5. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LMC660’s actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 1011Ω would
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Figure
6a, Figure 6b, Figure 6c for typical connections of guard
www.national.com
8
Application Hints
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
7.
(Continued)
DS008767-17
DS008767-21
(a) Inverting Amplifier
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
FIGURE 7. Air Wiring
BIAS CURRENT TESTING
The test method of Figure 8 is appropriate for bench-testing
bias current with reasonable accuracy. To understand its operation, first close switch S2 momentarily. When S2 is
opened, then
DS008767-18
(b) Non-Inverting Amplifier
DS008767-19
(c) Follower
DS008767-22
FIGURE 8. Simple Input Bias Current Test Circuit
A suitable capacitor for C2 would be a 5 pF or 10 pF silver
mica, NPO ceramic, or air-dielectric. When determining the
magnitude of Ib−, the leakage of the capacitor and socket
must be taken into account. Switch S2 should be left shorted
most of the time, or else the dielectric absorption of the capacitor C2 could cause errors.
DS008767-20
(d) Howland Current Pump
FIGURE 6. Guard Ring Connections
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
Similarly, if S1 is shorted momentarily (while leaving S2
shorted)
where Cx is the stray capacitance at the + input.
9
www.national.com
Typical Single-Supply Applications
(V+ = 5.0 VDC)
Additional single-supply applications ideas can be found in
the LM324 datasheet. The LMC660 is pin-for-pin compatible
with the LM324 and offers greater bandwidth and input resistance over the LM324. These features will improve the performance of many existing single-supply applications. Note,
however, that the supply voltage range of the LMC660 is
smaller than that of the LM324.
Sine-Wave Oscillator
Low-Leakage Sample-and-Hold
DS008767-7
DS008767-9
Instrumentation Amplifier
Oscillator frequency is determined by R1, R2, C1, and C2:
fosc = 1/2πRC, where R = R1 = R2 and
C = C1 = C2.
This circuit, as shown, oscillates at 2.0 kHz with a peak-topeak output swing of 4.5V.
1 Hz Square-Wave Oscillator
DS008767-8
If R1 = R5, R3 = R6, and R4 = R7; then
DS008767-10
∴ AV ≈100 for circuit shown.
For good CMRR over temperature, low drift resistors should
be used. Matching of R3 to R6 and R4 to R7 affect CMRR.
Gain may be adjusted through R2. CMRR may be adjusted
through R7.
Power Amplifier
DS008767-11
www.national.com
10
Typical Single-Supply Applications
1 Hz Low-Pass Filter
(Maximally Flat, Dual Supply Only)
(V+ = 5.0 VDC) (Continued)
10 Hz Bandpass Filter
DS008767-14
fc = 1 Hz
d = 1.414
Gain = 1.57
DS008767-12
fO = 10 Hz
Q = 2.1
Gain = −8.8
High Gain Amplifier with Offset
Voltage Reduction
10 Hz High-Pass Filter
DS008767-13
fc = 10 Hz
d = 0.895
Gain = 1
2 dB passband ripple
DS008767-15
Gain = −46.8
Output offset voltage reduced to the level of the input offset voltage of the
bottom amplifier (typically 1 mV).
11
www.national.com
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Hermetic Dual-In-Line Package (D)
Order Number LMC660AMD
NS Package Number D14E
14-Lead Ceramic Dual-In-Line Pkg. (J)
Order Number LMC660AMJ/883
NS Package Number J14A
www.national.com
12
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
Small Outline Dual-In-Line Pkg. (M)
Order Number LMC660AIM, LMC660CM or LMC660EM
NS Package Number M14A
Molded Dual-In-Line Pkg. (N)
Order Number LMC660AIN, LMC660CN or LMC660EN
NS Package Number N14A
13
www.national.com
LMC660 CMOS Quad Operational Amplifier
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: [email protected]
www.national.com
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: [email protected]
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: [email protected]
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.