® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Description Initial Issue Add 25℃& 40℃ spec for ISB1 & IDR on page 4 & page 9 Delete LL grade for ordering information on page 11 Correct typo error on the column “UB#”, “LB#” of truth table for row “Byte Read” “Byte Write” and “Output Disable” at page 4: “X” revised to be “L” Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0 Issue Date Sep.06.2012 Nov.06.2012 July.08.2013 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION Fast access time : 55/70ns Low power consumption: Operating current : 45/30mA (TYP.) Standby current : 10μA (TYP.) SL-version Single 2.7V ~ 3.6V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data byte control : (i) BYTE# fixed to VCC LB# controlled DQ0 ~ DQ7 UB# controlled DQ8 ~ DQ15 (ii) BYTE# fixed to VSS DQ15 used as address pin, while DQ8~DQ14 pins not used Data retention voltage : 1.2V (MIN.) Green package available Package : 48-pin 12mm x 20mm TSOP-I The LY62L205016A is a 33,554,432-bit low power CMOS static random access memory organized as 2,097,152 words by 16 bits or 4,194,304 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY62L205016A is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The LY62L205016A operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Family LY62L205016A LY62L205016A(I) Operating Temperature 0 ~ 70℃ -40 ~ 85℃ Vcc Range Speed 2.7 ~ 3.6V 2.7 ~ 3.6V 55/70ns 55/70ns Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.) 10µA(SL) 45/30mA 10µA(SL) 45/30mA Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION Vcc Vss A0~A20 /A-1~A20 DQ0-DQ7 Lower Byte DQ8-DQ15 Upper Byte CE# CE2 WE# OE# LB# UB# BYTE# DECODER I/O DATA CIRCUIT 2048Kx16/4096Kx8 MEMORY ARRAY SYMBOL DESCRIPTION A0 – A20 Address Inputs(word mode) A-1 – A20 Address Inputs(byte mode) DQ0 – DQ15 Data Inputs/Outputs COLUMN I/O CE#, CE2 Chip Enable Input WE# Write Enable Input OE# Output Enable Input LB# Lower Byte Control UB# Upper Byte Control BYTE# Byte Enable VCC Power Supply VSS Ground CONTROL CIRCUIT Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 2 ® LY62L205016A 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM Rev. 1.2 PIN CONFIGURATION A15 A14 A13 A12 A11 A10 A9 A8 A19 A20 WE# CE2 NC UB# LB# A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 LY62L205016A XXXXX XXXXX 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE# Vss DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 Vcc DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE# Vss CE# A0 TSOP-I ABSOLUTE MAXIMUN RATINGS* PARAMETER Voltage on VCC relative to VSS Voltage on any other pin relative to VSS Operating Temperature Storage Temperature Power Dissipation DC Output Current SYMBOL VT1 VT2 TA TSTG PD IOUT RATING -0.5 to 4.6 -0.5 to VCC+0.5 0 to 70(C grade) -40 to 85(I grade) -65 to 150 1 50 UNIT V V ℃ ℃ W mA *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 3 ® LY62L205016A 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM Rev. 1.2 TRUTH TABLE MODE Standby Output Disable Read Write Byte# Read Byte # Write Note: CE# CE2 BYTE# OE# H X X L L L L L L L L L X L X H H H H H H H H H X X H H H L H H H H H H L H L H I/O OPERATION DQ0-DQ7 DQ8-DQ14 DQ15 High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z High – Z A-1 DOUT High – Z High – Z DOUT DOUT High – Z DOUT DOUT DOUT DIN High – Z High – Z DIN DIN High – Z DIN DIN DIN SUPPLY CURRENT WE# LB# UB# X X X H H H L L L X X X X X X H H H H H H L L L X X H L X L L H L L H L X X H X L L H L L H L L L L H L L Dout High – Z A-1 ICC,ICC1 L X L L L Din High – Z A-1 ICC,ICC1 ISB,ISB1 ICC,ICC1 ICC,ICC1 ICC,ICC1 H = VIH, L = VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS SYMBOL TEST CONDITION PARAMETER Supply Voltage VCC *1 Input High Voltage VIH *2 Input Low Voltage VIL Input Leakage Current ILI VCC ≧ VIN ≧ VSS Output Leakage VCC ≧ VOUT ≧ VSS ILO Current Output Disabled Output High Voltage VOH IOH = -1mA Output Low Voltage VOL IOL = 2mA Cycle time = Min. - 55 CE# = VIL and CE2 = VIH ICC II/O = 0mA - 70 Other pins at VIL or VIH Average Operating Power supply Current Cycle time = 1µs CE#≦0.2V and CE2≧VCC-0.2V ICC1 II/O = 0mA Other pins at 0.2V or VCC-0.2V CE# = VIH or CE2 = VIL ISB Other pins at VIL or VIH Standby Power Supply Current ISB1 TYP. 3.0 - *4 MAX. 3.6 VCC+0.3 0.6 1 UNIT V V V µA -1 - 1 µA 2.2 - 2.7 - 0.4 V V - 45 80 mA - 30 60 mA - 10 20 mA - 0.3 2 mA 25℃ - 10 18 µA 40℃ - 10 18 µA -SL - 10 80 µA -SLI - 10 120 µA - SL - SLI CE# ≧VCC-0.2V or CE2≦0.2V Other pins at 0.2V or VCC-0.2V MIN. 2.7 2.2 - 0.2 -1 Notes: 1. VIH(max) = VCC + 2.0V for pulse width less than 6ns. 2. VIL(min) = VSS - 2.0V for pulse width less than 6ns. 3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test. 4. Typical values are included for reference only and are not guaranteed or tested. Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃ Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 4 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM CAPACITANCE (TA = 25℃, f = 1.0MHz) PARAMETER Input Capacitance Input/Output Capacitance SYMBOL CIN CI/O MIN. MAX 6 8 - UNIT pF pF Note : These parameters are guaranteed by device characterization, but not production tested. AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Levels Output Load 0.2V to VCC - 0.2V 3ns 1.5V CL = 30pF + 1TTL, IOH/IOL = -1mA/2mA AC ELECTRICAL CHARACTERISTICS (1) READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low-Z Output Enable to Output in Low-Z Chip Disable to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change LB#, UB# Access Time LB#, UB# to High-Z Output LB#, UB# to Low-Z Output (2) WRITE CYCLE PARAMETER Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High-Z LB#, UB# Valid to End of Write SYM. tRC tAA tACE tOE tCLZ* tOLZ* tCHZ* tOHZ* tOH tBA tBHZ* tBLZ* SYM. tWC tAW tCW tAS tWP tWR tDW tDH tOW* tWHZ* tBW LY62L205016A-55 MIN. MAX. 55 55 55 30 10 5 20 20 10 55 25 10 - LY62L205016A-70 MIN. MAX. 70 70 70 35 10 5 25 25 10 70 30 10 - UNIT LY62L205016A-55 MIN. MAX. 55 50 50 0 45 0 25 0 5 20 45 - LY62L205016A-70 MIN. MAX. 70 60 60 0 55 0 30 0 5 25 60 - UNIT *These parameters are guaranteed by device characterization, but not production tested. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 5 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM TIMING WAVEFORMS READ CYCLE 1 (Address Controlled) (1,2) tRC Address tAA Dout tOH Previous Data Valid Data Valid READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5) tRC Address tAA CE# tACE CE2 LB#,UB# tBA OE# tOE tOH tOHZ tBHZ tCHZ tOLZ tBLZ tCLZ Dout High-Z Data Valid High-Z Notes : 1.WE#is high for read cycle. 2.Device is continuously selected OE# = low, CE# = low, CE2 = high, LB# or UB# = low. 3.Address must be valid prior to or coincident with CE# = low, CE2 = high, LB# or UB# = low transition; otherwise tAA is the limiting parameter. 4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. 5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 6 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6) tWC Address tAW CE# tCW CE2 tBW LB#,UB# tAS tWP tWR WE# tWHZ Dout TOW High-Z (4) tDW Din (4) tDH Data Valid WRITE CYCLE 2 (CE# and CE2 Controlled) (1,2,5,6) tWC Address tAW CE# tAS tWR tCW CE2 tBW LB#,UB# tWP WE# tWHZ Dout High-Z (4) tDW tDH Data Valid Din Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 7 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM WRITE CYCLE 3 (LB#,UB# Controlled) (1,2,5,6) tWC Address tAW tWR CE# tAS tCW CE2 tBW LB#,UB# tWP WE# tWHZ Dout High-Z (4) tDW Din tDH Data Valid Notes : 1.WE#,CE#, LB#, UB# must be high or CE2 must be low during all address transitions. 2.A write occurs during the overlap of a low CE#, high CE2, low WE#, LB# or UB# = low. 3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed on the bus. 4.During this period, I/O pins are in the output state, and input signals must not be applied. 5.If the CE#, LB#, UB# low transition and CE2 high transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state. 6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 8 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM DATA RETENTION CHARACTERISTICS PARAMETER SYMBOL TEST CONDITION VCC for Data Retention VDR CE#≧VCC - 0.2V or CE2≦0.2V Data Retention Current Chip Disable to Data Retention Time Recovery Time tRC* = Read Cycle Time IDR tCDR -SL 25℃ VCC = 1.2V -SLI 40℃ CE# ≧VCC-0.2V or CE2≦0.2V -SL other pins at 0.2V or VCC-0.2V -SLI See Data Retention Waveforms (below) tR DATA RETENTION WAVEFORM Low Vcc Data Retention Waveform (1) (CE# controlled) VDR ≧ 1.2V Vcc Vcc(min.) Vcc(min.) tCDR CE# VIH tR CE# ≧ Vcc-0.2V VIH Low Vcc Data Retention Waveform (2) (CE2 controlled) VDR ≧ 1.2V Vcc Vcc(min.) Vcc(min.) tCDR CE2 tR CE2 ≦ 0.2V VIL VIL Low Vcc Data Retention Waveform (3) (LB#, UB# controlled) VDR ≧ 1.2V Vcc Vcc(min.) Vcc(min.) tCDR LB#,UB# VIH tR LB#,UB# ≧ Vcc-0.2V VIH Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 9 MIN. 1.2 - TYP. 8 8 8 8 MAX. UNIT 3.6 V 16 µA 16 µA 80 µA 120 µA 0 - - ns tRC* - - ns ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM PACKAGE OUTLINE DIMENSION 48-pin 12mm x 20mm TSOP-I Package Outline Dimension Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 10 ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM ORDERING INFORMATION Package Type Access Time Power Type (Speed)(ns) 48-pin 12mm x 20mm TSOP-I 55 Special Ultra Low Power Temperature Range(℃) 0℃~70℃ -40℃~85℃ 70 Special Ultra Low Power 0℃~70℃ -40℃~85℃ Packing Type Tray LY62L205016ALL-55SL Tape Reel LY62L205016ALL-55SLT Tray LY62L205016ALL-55SLI Tape Reel LY62L205016ALL-55SLIT Tray LY62L205016ALL-70SL Tape Reel LY62L205016ALL-70SLT Tray LY62L205016ALL-70SLI Tape Reel LY62L205016ALL-70SLIT Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 11 Lyontek Item No. ® LY62L205016A Rev. 1.2 32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM THIS PAGE IS LEFT BLANK INTENTIONALLY. Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 12