PLETRONICS SM5544GCX

SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
• Pletronics’ SM55 Series is a quartz crystal
controlled precision square wave generator with a
CMOS output.
• The package is designed for high density surface
mount designs.
• This is a low cost mass produced oscillator.
• Tape and Reel or cut tape packaging is available.
•
•
•
•
0.8 to 165 MHz
3.2 x 5 mm LCC Ceramic Package
Enable/Disable Function
Disable function includes low standby power
mode
• Low Jitter
• Optimized for fastest Trise & Tfall
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.064 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
Unit
VCC Supply Voltage
-0.5V to +7.0V
Vi
Input Voltage
-0.5V to VCC + 0.5V
Vo
Output Voltage
-0.5V to VCC + 0.5V
Io
Output Current
+25 mA to -25 mA
Thermal Characteristics
The maximum die or junction temperature is 155oC
The thermal resistance junction to board is 30 to 50oC/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2010, Pletronics Inc.
SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Part Number:
SM55
45
G
E
X
- 75.0M
-XX
Packaging code or blank
T250 = 250 per Tape and Reel
T500 = 500 per Tape and Reel
T1K = 1000 per Tape and Reel
Frequency in MHz
Supply Voltage VCC
X = 1.8V _
+ 10%
Optional Enhanced OTR
Blank = Temp. range -10 to +70oC
C = Temp. range -20 to +70oC
E = Temp. range -40 to +85oC
Series Model
Frequency Stability
45 = +
_ 50 ppm
44 = +
_ 25 ppm
20 = +
_ 20 ppm
Series Model
Part Marking and Legend:
P ff.fff M
C YMDxx
P ff.fff M
C YYWWxx
PLE SM55
ff.fff M
C YMDxx
P5xYWWx
C ff.fff M
5xYWWxx
ff.fff M
C PLExx
PLE
= Pletronics
FF.FFF M
= Frequency in MHz
YYWW or YWW or YMD = Date of Manufacture (year and week, or year-month-day)
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are
not identified from the marking. External packaging labels and packing list will correctly identify the
ordered Pletronics part number.
Codes for Date Code YMD
Code 10
Code A
1
2
3
4
B
C
D
E
F
G
H
J
K
L
M
Year 2010 2011 2012 2013 2014 Month JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC
Code
Day
Code
Day
1
1
H
17
2
2
J
18
www.pletronics.com
3
3
K
19
4
4
L
20
5
5
M
21
6
6
N
22
425-776-1880
7
7
P
23
8
8
R
24
9
9
T
25
A
10
U
26
B
11
V
27
C
12
W
28
D
13
X
29
E
14
Y
30
F
15
Z
31
2
G
16
SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Electrical Specification for 1.80V _
+10% over the specified temperature range
Item
Min
Max
Unit
Frequency Range
0.8
165
MHz
Frequency Accuracy “45"
-50
+50
ppm
“44"
-25
+25
“20"
-20
+20
Output Waveform
Condition
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
CMOS
Output High Level
90
-
70
-
-
10
-
30
45
55
%
Output: 1 to 15 MHz
-
6.0
pS RMS
Output: 15 to 35 MHz
-
5.0
pS RMS
Output: 35 to 50 MHz
-
4.0
pS RMS
Output: 50 to 70 MHz
-
3.0
pS RMS
Output: > 70 MHz
-
2.5
PS RMS
Output: 25 to 70 MHz
-
0.7
pS RMS
Output: > 70 MHz
-
0.6
pS RMS
50
500
Kohm
V disable
-
30
%
V enable
70
-
%
-10
+10
uA
-10
+10
uA
-
4
uA
< 35 MHz
-
100
uA
> 35 MHz
Enable time
-
250
nS
Time for output to reach a logic state
Disable time
-
250
nS
Time for output to reach a high Z state
Start up time
-
10
mS
Time for output to reach specified frequency
Output Low Level
Output Symmetry
Jitter
E/D Internal Pull-up
Output leakage
VOUT = VCC
VOUT = 0V
Standby Current ICC
Operating Temperature Range
-10
-20
-40
Storage Temperature Range
www.pletronics.com
-55
%
of VCC for IOH= +2 mA <35 MHz
of VCC for IOH= +8 mA > 35 MHz
%
of VCC for IOL = -2 mA <35 MHz
of VCC for IOL = -8 mA >35 MHz
at 50% point of VCC (See load circuit)
10 Hz to 1 MHz from the output frequency
12 KHz to 20 MHz from the output frequency
to VCC
of VCC applied to pin 1
Pin 1 low, device disabled
+70
o
Standard Temperature Range
+70
o
Extended Temperature Range
“C” Option
+85
o
Extended Temperature Range
“E” Option
+125
o
425-776-1880
C
C
C
C
3
SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Electrical Specification for 1.80V _
+10% over the specified temperature range
Item
Typ
Max
Unit
Condition
Output TRISE and TFALL
1.5
3
nS
< 35 MHz
VCC Supply Current (ICC)
CLOAD = 15 pF
20% to 80% of VCC
See Load Circuit
1.7
3.5
nS
> 35 MHz and < 70 MHz
1.5
2.5
nS
> 70 MHz
4
7
nS
< 35 MHz
2
7
nS
> 35 MHz < 70 MHz
6
12
nS
< 35 MHz
6
11
nS
> 35 MHz and < 45 MHz
CLOAD = 50 pF
20% to 80% of VCC
See Load Circuit
2
4
mA
< 8 MHz
CLOAD = 15 pF
2.5
5
mA
> 8 MHz and < 16 MHz
5
8
mA
> 16 MHz and < 35 MHz
-
18
mA
> 35 MHz and < 70 MHz
17
27
mA
> 70 MHz and < 120 MHz
23
37
mA
> 120 MHz
2.5
4.5
mA
< 8 MHz
3
5
mA
> 8 MHz and < 16 MHz
4
8
mA
> 16 MHz and < 35 MHz
10
20
mA
> 35 MHz and < 70 MHz
2.5
4
mA
< 8 MHz
4
6
mA
> 8 MHz and < 16 MHz
5
9
mA
> 16 MHz and < 35 MHz
13
23
mA
> 35 MHz and < 45 MHz
CLOAD = 30 pF
20% to 80% of VCC
See Load Circuit
CLOAD = 30 pF
CLOAD = 50 pF
Specifications with Pad 1 E/D open circuit
NOTE: Not specified for 50 pF loads above 45 MHz, or 30 pF loads above 70 MHz
Typical phase noise plot for 5 oscillators at different output frequencies.
0
-20
-40
dBc/Hz
-60
19.4M
-80
25M
32M
-100
50M
66.7M
-120
-140
-160
-180
10
1,000
100,000
10,000,000
Frequency (Hz)
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SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Load Circuit and Test Waveform
Symmetry
Vhigh
90% * Vcc
50% * Vcc
10% * Vcc
Vlow
Ground
Trise
Tfall
Reliability: Environmental Compliance
Parameter
Condition
Mechanical Shock
MIL-STD-883 Method 2002, Condition B
Vibration
MIL-STD-883 Method 2007, Condition A
Solderability
MIL-STD-883 Method 2003
Thermal Shock
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Minimum Voltage
Conditions
Human Body Model
1500
MIL-STD-883 Method 3115
Charged Device Model
1000
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
www.pletronics.com
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
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SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Mechanical:
Inches
Not to Scale
1
Typical dimensions
mm
A
0.197 +
_0.006
5.00 +
_0.15
B
0.126 +
_0.006
3.20 +
_0.15
C
0.045 +
_0.004
1.15 +
_0.10
D1
0.048
1.23
E1
0.100
2.54
F1
0.004
0.10
G1
0.050
1.27
H1
0.055
1.40
I1
0.024
0.60
J1
0.004
0.10R
K1
0.008
0.020R
Contacts :
Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm)
Pad
Function
Note
1
Output
Enable/Disable
When this pad is not connected the oscillator shall operate.
When this pad is logic low the output will be inhibited (high impedance state.)
Recommend connecting this pad to VCC if the oscillator is to be always on.
2
Ground (GND)
3
Output
4
Supply Voltage
(VCC)
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
For Optimum Jitter Performance, Pletronics recommends:
•
a ground plane under the device
•
no large transient signals (both current and voltage) should be routed under the device
•
do not layout near a large magnetic field such as a high frequency switching power supply
•
do not place near piezoelectric buzzers or mechanical fans.
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SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
Temperature (°C)
Reflow Cycle (typical for lead free processing)
260°C Maximum
10 Seconds Maximum
250
215°C±10°C
200
175°C±10°C
150
100
Approximately 50 Seconds
120 to 160 Seconds
Allowed rate of temperature change
Maximum 4°C per second
The part may be reflowed 3 times without degradation.
Tape and Reel: available for quantities of 250 to 1000 per reel, cut tape for < 250
Constant Dimensions Table 1
Tape
Size
D0
8mm
D1
Min
E1
P0
1.0
S1
Min
T
Max
0.6
0.6
T1
Max
2.0
+0.05
_
12mm
1.5
1.5
1.75
4.0
16mm
+0.1
-0.0
1.5
_
+0.1
_0.1
+
24mm
P2
0.1
2.0
_
+0.1
1.5
Variable Dimensions Table 2
Tape
Size
B1
Max
E2 Min
F
P1
T2
Max
W
Max
Ao, Bo &
Ko
16 mm
12.1
14.25
7.5 _
+0.1
8.0 +
_0.1
8.0
16.3
Note 1
Note 1: Embossed cavity to conform to EIA-481-B
Dimensions in mm
Not to scale
REEL DIMENSIONS
A
B
inches
7.0
10.0
13.0
mm
177.8
254.0
330.2
inches
2.50
4.00
3.75
mm
63.5
101.6
95.3
Tape
Width
16.4
+2.0
-0.0
16.0
C
mm
D
mm
13.0 +0.5 / -0.2
16.4
+2.0
-0.0
16.4
+2.0
-0.0
Reel dimensions may vary from the above
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SM55G Series 1.8 V
CMOS Clock Oscillators
April 2010
IMPORTANT NOTICE
Pletronics Incorporated (PLE) reserves the right to make corrections, improvements, modifications and
other changes to this product at anytime. PLE reserves the right to discontinue any product or service
without notice. Customers are responsible for obtaining the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to
PLE’s terms and conditions of sale supplied at the time of order acknowledgment.
PLE warrants performance of this product to the specifications applicable at the time of sale in accordance
with PLE’s limited warranty. Testing and other quality control techniques are used to the extent PLE
deems necessary to support this warranty. Except where mandated by specific contractual documents,
testing of all parameters of each product is not necessarily performed.
PLE assumes no liability for application assistance or customer product design. Customers are
responsible for their products and applications using PLE components. To minimize the risks associated
with the customer products and applications, customers should provide adequate design and operating
safeguards.
PLE products are not designed, intended, authorized or warranted to be suitable for use in life support
applications, devices or systems or other critical applications that may involve potential risks of death,
personal injury or severe property or environmental damage. Inclusion of PLE products in such
applications is understood to be fully at the risk of the customer. Use of PLE products in such applications
requires the written approval of an appropriate PLE officer. Questions concerning potential risk
applications should be directed to PLE.
PLE does not warrant or represent that any license, either express or implied, is granted under any PLE
patent right, copyright, artwork or other intellectual property right relating to any combination, machine or
process which PLE product or services are used. Information published by PLE regarding third-party
products or services does not constitute a license from PLE to use such products or services or a warranty
or endorsement thereof. Use of such information may require a license from a third party under the
patents or other intellectual property of the third party, or a license from PLE under the patents or other
intellectual property of PLE.
Reproduction of information in PLE data sheets or web site is permissible only if the reproduction is
without alteration and is accompanied by associated warranties, conditions, limitations and notices.
Reproduction of this information with alteration is an unfair and deceptive business practice. PLE is not
responsible or liable for such altered documents.
Resale of PLE products or services with statements different from or beyond the parameters stated by
PLE for that product or service voids all express and implied warranties for the associated PLE product or
service and is an unfair or deceptive business practice. PLE is not responsible for any such statements.
Contacting Pletronics Inc.
Pletronics Inc.
19013 36th Avenue West
Lynnwood, WA 98036-5761 USA
Tel: 425-776-1880
Fax: 425-776-2760
E-mail: [email protected]
URL: www.pletronics.com
Copyright © 2007, 2010 Pletronics Inc.
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