TSM921-TSM924 Ultra-Low-Power, Single/Dual-Supply Comparators FEATURES DESCRIPTION ♦ Ultra-Low Quiescent Current Over Temperature TSM921/TSM922: 4μA (total) TSM923/TSM924: <2.5μA per comparator ♦ Single or Dual Power Supplies: Single: +2.5V to +11V Dual: ±1.25V to ±5.5V ♦ Input Voltage Range Includes Negative Supply ♦ 12μs Propagation Delay at 10mV Overdrive ♦ Push-pull TTL/CMOS-Compatible Outputs ♦ Crowbar-Current-Free Switching ♦ Continuous Source Current Capability: 40mA ♦ Internal 1.182V ±1% Reference: TSM921/TSM923/TSM924 ♦ Adjustable Hysteresis: TSM921/TSM923 The TSM921–TSM924 family of single/dual/quad, low-voltage, micropower analog comparators is electrically and form-factor identical to the MAX921MAX924 family of analog comparators. Ideal for 3V or 5V single-supply applications, the TSM921–TSM924 family can operate from single +2.5V to +11V supplies or from ±1.25V to ±5.5V dual supplies. The single TSM921 and the dual TSM922 draw less than 4μA (max) supply current over temperature. The dual TSM923 and the quad TSM924 draw less than 2.5μA per comparator over temperature. All comparators in this family exhibit an input voltage range from the negative supply rail to within 1.3V of the positive supply. In addition, the comparators’ push-pull output stages are TTL/CMOS compatible and capable of sinking and sourcing current. The TSM921/TSM923/TSM924 each incorporates an internal 1.182V ±1% voltage reference. Without complicated feedback configurations and only requiring two additional resistors, adding external hysteresis via a separate pin is available on the single TSM921 and the dual TSM923. APPLICATIONS Threshold Detectors Window Comparator Level Translators Oscillator Circuits Battery-Powered Systems TYPICAL APPLICATION CIRCUIT PART A 5V, Low-Parts-Count Window Detector TSM921 TSM922 TSM923 TSM924 INTERNAL COMPARATORS INTERNAL REFERENCE PER PACKAGE HYSTERESIS Yes 1 Yes No 2 No Yes 2 Yes Yes 4 No PART TSM921C TSM921E TSM922C TSM922E TSM923C TSM923E TSM924C TSM924E TEMPERATURE PACKAGE RANGE 0ºC to 70ºC 8-Pin MSOP/SOIC -40ºC to 85ºC 0ºC to 70ºC 8-Pin MSOP/SOIC -40ºC to 85ºC 0ºC to 70ºC 8-Pin MSOP/SOIC -40ºC to 85ºC 0ºC to 70ºC 16-Pin SOIC -40ºC to 85ºC The Touchstone Semiconductor logo is a registered trademark of Touchstone Semiconductor, Incorporated. Page 1 © 2012 Touchstone Semiconductor, Inc. All rights reserved. TSM921-TSM924 ABSOLUTE MAXIMUM RATINGS Supply Voltage (V+ to V-, V+ to GND, GND to V-)......-0.3V, +12V Voltage Inputs (IN+, IN-)..............................................(V+ + 0.3V) to (V- - 0.3V) HYST…………………………………….(REF + 5V) to (V- - 0.3V) Output Voltage REF..................................................... (V+ + 0.3V) to (V- - 0.3V) OUT (TSM921/24)...........................(V+ + 0.3V) to (GND - 0.3V) OUT (TSM922/23)...............................(V+ + 0.3V) to (V- - 0.3V) Input Current (IN+, IN-, HYST)..............................................20mA Output Current REF…………………………………………………………….20mA OUT………………………………………………………...….50mA Output Short-Circuit Duration (V+ ≤ 5.5V) ................Continuous Continuous Power Dissipation (TA = +70°C) 8-Pin MSOP (derate 4.1mW/°C above +70°C) .................330mW 8-Pin SOIC (derate 5.88mW/°C above +70°C)..................471mW 16-Pin SOIC (8.7mW/°C above +70°C) ............................696mW Operating Temperature Range TSM92xC..................................................................0°C to +70°C TSM92xE...............................................................-40°C to +85°C Storage Temperature Range .................................-65°C to +150°C Lead Temperature (soldering, 10s) ......................................+300°C Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART PART CARRIER QUANTITY ORDER NUMBER CARRIER QUANTITY MARKING MARKING TSM921CSA+ TSM921CUA+ Tube Tube 97 TSM921CSA+T Tape & Reel 2500 TSM921ESA+ Tube 97 Tape & Reel 2500 50 TS921 TADK TSM921CUA+T Page 2 Tape & Reel 2500 TS921E TSM921ESA+T TSM921_24DS r1p0 RTFDS TSM921-TSM924 PACKAGE/ORDERING INFORMATION ORDER NUMBER PART PART CARRIER QUANTITY ORDER NUMBER CARRIER QUANTITY MARKING MARKING TSM922CSA+ TSM922CUA+ Tube Tube 97 TSM922CSA+T Tape & Reel 2500 TSM922ESA+ Tube 97 Tape & Reel 2500 50 TS922 TABC Tape & Reel TSM922CUA+T ORDER NUMBER 2500 TS922E TSM922ESA+T PART PART CARRIER QUANTITY ORDER NUMBER CARRIER QUANTITY MARKING MARKING TSM923CSA+ TSM923CUA+ Tube 50 TS923 TSM923CSA+T TABA TSM923CUA+T TSM921_24DS r1p0 Tape & Reel TSM923ESA+ 2500 TS923E TSM923ESA+T Tube 97 Tape & Reel 2500 Tube 97 Tape & Reel 2500 Page 3 RTFDS TSM921-TSM924 PACKAGE/ORDERING INFORMATION ORDER NUMBER PART CARRIER QUANTITY MARKING ORDER NUMBER Tube TSM924ESE+ TSM924CSE+ TS924 TSM924CSE+T Tape & Reel 48 PART CARRIER QUANTITY MARKING TS924E 2500 TSM924ESE+T Tube 48 Tape & Reel 2500 Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging. Consult Touchstone Semiconductor for products specified with wider operating temperature ranges. Page 4 TSM921_24DS r1p0 RTFDS TSM921-TSM924 ELECTRICAL CHARACTERISTICS – 5V OPERATION V+ = 5V, V- = GND = 0V; TA = -40ºC to +85ºC, unless otherwise noted. Typical values are at TA = +25ºC. See Note 1. PARAMETER POWER REQUIREMENTS Supply Voltage Range CONDITIONS MIN See Note 2 2.5 TSM921; HYST = REF TSM922 Supply Current IN+ = IN- + 100mV TSM923 HYST = REF TSM924 COMPARATOR Input Offset Voltage Input Leakage Current (IN-, IN+) Input Leakage Current (HYST) Input Common-Mode Voltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Voltage Noise Hysteresis Input Voltage Range Response Time Output High Voltage Output Low Voltage TYP VCM = 2.5V IN+ = IN- = 2.5V TSM921, TSM923 TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C 2.5 2.5 3.1 5.5 TA = -40°C to +85°C ±0.01 ±0.02 V- V- to (V+ – 1.3V) V+ = 2.5V to 11V 100Hz to 100kHz TSM921, TSM923 0.1 0.1 20 REF- 0.05V Overdrive = 10 mV Overdrive = 100 mV TA = -40°C to +85°C: IOUT = 17mA TSM922, TSM923 TA = -40°C to +85°C: IOUT = 1.8mA TSM921, TSM924 TA = -40°C to +85°C: IOUT = 1.8mA MAX UNITS 11 3.2 4 3.2 4 4.5 6 6.5 8.5 V ±10 ±5 V+ – 1.3V 1 1 REF 12 4 TA = +25°C; 100pF load μA mV nA nA V mV/V mV/V μVRMS V μs V+ – 0.4 V- + 0.4 GND + 0.4 V V V 1.194 1.206 V V REFERENCE Reference Voltage TA = 0°C to +70°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C Source Current Sink Current Voltage Noise TSM921_24DS r1p0 100Hz to 100kHz 1.170 1.158 15 6 8 4 1.182 25 μA 15 μA 100 μVRMS Page 5 RTFDS TSM921-TSM924 ELECTRICAL CHARACTERISTICS – 3V OPERATION V+ = 3V, V- = GND = 0V; TA = -40ºC to +85ºC, unless otherwise noted. Typical values are at TA = +25ºC. See Note 1. PARAMETER POWER REQUIREMENTS CONDITIONS MIN TSM921; HYST = REF TSM922 Supply Current IN+ = IN- + 100mV TSM923 HYST = REF TSM924 COMPARATOR Input Offset Voltage Input Leakage Current (IN-, IN+) Input Leakage Current (HYST) Input Common-Mode Voltage Range Common-Mode Rejection Ratio Power-Supply Rejection Ratio Voltage Noise Hysteresis Input Voltage Range Response Time Output High Voltage Output Low Voltage VCM = 1.5V IN+ = IN- = 1.5V TSM921, TSM923 TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TYP MAX UNITS 2.4 3.0 3.8 3.0 3.8 4.3 6 6.2 8.0 μA 2.4 3.4 5.2 TA = -40°C to +85°C ±0.01 ±0.02 V- V- to (V+ – 1.3V) V+ = 2.5V to 11V 100Hz to 100kHz TSM921, TSM923 0.2 0.1 20 REF- 0.05V Overdrive = 10mV Overdrive = 100mV TA = -40°C to +85°C: IOUT = 10mA TSM922, TSM923 TA = -40°C to +85°C: IOUT = 0.8mA TSM921, TSM924 TA = -40°C to +85°C: IOUT = 0.8mA ±10 ±5 V+ – 1.3V 1 1 REF 14 5 TA = +25°C; 100pF load mV nA nA V mV/V mV/V μVRMS V μs V+ – 0.4 V- + 0.4 GND + 0.4 V V V 1.194 1.206 V V REFERENCE Reference Voltage Source Current Sink Current TA = 0°C to +70°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C 1.170 1.158 15 6 8 4 1.182 25 μA 15 μA Voltage Noise 100Hz to 100kHz 100 Note 1: All specifications are 100% tested at TA = +25°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by device characterization, not production tested. Note 2: The TSM924 comparator operates below 2.5V. Refer to the “Low-Voltage Operation: V+ = 1.5V (TSM924 Only)” section. Page 6 μVRMS TSM921_24DS r1p0 RTFDS TSM921-TSM924 TYPICAL PERFORMANCE CHARACTERISTICS V+ = 5V; V- = GND; TA = +25°C, unless otherwise noted. Output Voltage High vs Load Current Output Voltage Low vs Load Current 2.5 5 V+ = 5V V+ = 5V 4.5 2 4 V+ = 3V VOH - V VOL - V 1.5 1 3.5 3 2.5 V+ = 3V 0.5 2 0 1.5 0 4 8 12 16 20 24 0 28 10 LOAD CURRENT - mA 40 50 Reference Voltage vs Temperature 1.22 1.190 V+ = 3V or 5V SINK 1.21 REFERENCE VOLTAGE - V 1.185 REFERENCE VOLTAGE - V 30 LOAD CURRENT - mA Reference Output Voltage vs Output Load Current 1.180 1.175 1.170 SOURCE 1.165 1.160 1.155 1.20 1.19 1.18 1.17 1.16 1.15 1.14 0 5 10 15 20 25 30 -40 -15 10 35 60 LOAD CURRENT - µA TEMPERATURE - ºC TSM921 Supply Current vs Temperature TSM922 Supply Current vs Temperature 85 4.5 4.5 IN+ = IN- + 100mV IN+ = IN- + 100mV 4 SUPPLY CURRENT - µA 4 SUPPLY CURRENT - µA 20 V+ = 5V, V- = -5V 3.5 3 V+ = 3V, V- = 0V 2.5 2 V+ = 10V, V- = 0V 3.5 V+ = 5V, V- = 0V 3 2.5 2 V+ = 3V, V- = 0V V+ = 5V, V- = 0V 1.5 1.5 -40 -15 10 35 60 TEMPERATURE - ºC TSM921_24DS r1p0 85 -40 -15 10 35 60 85 TEMPERATURE - ºC Page 7 RTFDS TSM921-TSM924 TYPICAL PERFORMANCE CHARACTERISTICS V+ = 5V; V- = GND; TA = +25°C, unless otherwise noted. TSM923 Supply Current vs Temperature TSM924 Supply Current vs Temperature 5 10 4.5 9 SUPPLY CURRENT - µA SUPPLY CURRENT - µA IN+ = IN- + 100mV 4 V+ = 5V, V- = 0V 3.5 3 V+ = 3V, V- = 0V 2.5 V+ = 5V, V- = -5V 8 7 V+ = 5V, V- = 0V 6 5 V+ = 3V, V- = 0V 4 2 3 -40 -15 10 35 60 -40 85 -15 TEMPERATURE - ºC 35 60 85 TEMPERATURE - ºC TSM924 Supply Current vs Low Supply Voltages Hysteresis Control 80 10 60 OUTPUT HIGH 40 IN+ - IN- - mV SUPPLY CURRENT - µA 10 1 20 0 NO CHANGE -20 -40 OUTPUT LOW -60 -80 0.1 1.5 2 0 2.5 10 SINGLE-SUPPLY VOLTAGE - V 20 30 40 50 VREF - VHYST - mV Response Time vs Load Capacitance Transfer Function 18 5 V- = 0V 16 RESPONSE TIME - µs OUTPUT VOLTAGE - V 4 3 2 1 14 12 VOHL 10 8 VOLH 6 4 2 0 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 IN+ INPUT VOLTAGE - mV Page 8 0.4 0 20 40 60 80 100 LOAD CAPACITANCE - nF TSM921_24DS r1p0 RTFDS TSM921-TSM924 TYPICAL PERFORMANCE CHARACTERISTICS V+ = 5V; V- = GND; TA = +25°C, unless otherwise noted. 100mV OUTPUT VOLTAGE - V 5 20mV 4 3 2 1 50mV 10mV 0 100 0 0 -2 0 2 4 6 8 10 12 14 16 18 20 INPUT VOLTAGE - V INPUT VOLTAGE - V OUTPUT VOLTAGE - V Response Time For Various Input Overdrives (Low-to-High) Response Time For Various Input Overdrives (High-to-Low) 5 50mV 4 3 2 1 100 0 -2 0 2 4 6 8 10 12 14 16 18 RESPONSE TIME - µs TSM924 Source and Sink Current at Low Supply Voltages TSM924 Response Time at Low Supply Voltages (Low-to-High) 100 CURRENT - mA 100 RESPONSE TIME - µs 20mV 100mV 0 RESPONSE TIME - µs ±20mV OVERDRIVE 10 ±100mV OVERDRIVE 1 SOURCE CURRENT INTO 0.75V LOAD 10 SINK CURRENT AT VOUT = 0.4V 1 1.5 2 1.5 2.5 2.5 2 SINGLE-SUPPLY VOLTAGE - V SINGLE-SUPPLY VOLTAGE - V Short-Circuit Source Current vs Supply Voltage Short-Circuit Sink Current vs Supply Voltage 200 24 OUT CONNECTED TO V+ GND CONNECTED TO V- 160 120 OUT CONNECTED TO V80 40 0 SINK CURRENT - mA SOURCE CURRENT - mA 10mV 22 20 18 16 2 2.5 3 3.5 4 4.5 5 TOTAL SUPPLY VOLTAGE - V TSM921_24DS r1p0 5.5 2 4 6 8 10 TOTAL SUPPLY VOLTAGE - V Page 9 RTFDS TSM921-TSM924 PIN FUNCTIONS TSM921 PIN TSM922 TSM923 1 — — GND — 1 1 OUTA 2 2 2 V- 3 — 4 — — — 3 — 4 5 — 3 — — 4 IN+ INA+ ININAINB- 5 — 5 HYST 6 — 7 — 6 7 6 — 7 REF INB+ V+ 8 — — OUT 8 8 OUTB PIN TSM924 NAME 1 OUTB 2 OUTA 3 4 5 6 7 8 V+ INAINA+ INBINB+ REF 9 V- 10 11 12 13 14 INCINC+ INDIND+ GND 15 OUTD 16 OUTC Page 10 NAME FUNCTION Ground. Connect to V- for single-supply operation. Output swings from V+ to GND. Comparator A Output. Sinks and sources current. Swings from V+ to V-. Negative Supply Voltage. Connect to ground for single-supply operation. Comparator Noninverting Input Comparator A Noninverting Input Comparator Inverting Input Comparator A Inverting Input Comparator B Inverting Input Hysteresis Input. Connect to REF if not used. Input voltage range is from VREF to (VREF - 50mV). 1.182V Reference Output with respect to V-. Comparator B Noninverting Input Positive Supply Voltage Comparator Output. Sinks and sources current. Swings from V+ to GND. Comparator B Output. Sinks and sources current. Swings from V+ to V-. FUNCTION Comparator B Output. Sinks and sources current. Swings from V+ to GND. Comparator A Output. Sinks and sources current. Swings from V+ to GND. Positive Supply Voltage Comparator A Inverting Input Comparator A Noninverting Input Comparator B Inverting Input Comparator B Noninverting Input 1.182V Reference Output with respect to V-. Negative Supply Voltage. Connect to ground for singlesupply operation. Comparator C Inverting Input Comparator C Noninverting Input Comparator D Inverting Input Comparator D Noninverting Input Ground. Connect to V- for single-supply operation. Comparator D Output. Sinks and sources current. Swings from V+ to GND. Comparator C Output. Sinks and sources current. Swings from V+ to GND. TSM921_24DS r1p0 RTFDS TSM921-TSM924 BLOCK DIAGRAMS TSM921_24DS r1p0 Page 11 RTFDS TSM921-TSM924 THEORY OF OPERATION recommended to evaluate the circuit over the entire power supply range and temperature. The TSM921–TSM924 family of single/dual/quad, low-voltage, micropower analog comparators provide excellent flexibility and performance while sourcing continuously up to 40mA of current. The TSM921, TSM923, and the TSM924 provide an on-board 1.182V ±1% reference voltage. To minimize glitches that can occur with parasitic feedback or due to less than optimal board layout, the design of the TSM921-TSM924 output stage is optimized to eliminate crowbar glitches as the output switches. To minimize current consumption while providing flexibility, the TSM921 and the TSM923 have an on-board HYST pin in order to add additional hysteresis. Comparator Output Power-Supply and Input Signal Ranges The TSM921-TSM924 can operate from a single supply voltage range of +2.5V to +11V, provide a wide common mode input voltage range of V- to V+-1.3V, and accept input signals ranging from V- to V+ - 1V. The inputs can accept an input as much as 300mV above and below the power supply rails without damage to the part. While the TSM921 and the TSM924 are able to operate from a single supply voltage range, a GND pin is available that allows for a dual supply operation with a range of ±1.25V to ±5.5V. If a single supply operation is desired, the GND pin needs to be tied to V-. In a dual supply mode, the TSM921 and the TSM924 are TTL/CMOS compatible with a ±5V voltage and the TSM922 and the TSM923 are TTL compatible with a single +5V supply. The TSM921 and the TSM924 have a GND pin that allows the output to swing from V+ to GND while the V- pin can be set to a voltage below GND as long as the voltage difference between V+ and V- is within 11V. Having a different voltage on V- will not affect the output swing. For TTL applications, V+ can be set to +5V±10% and V- can be set anywhere between 0V and -5V±10%. On the other hand, the TSM922 and the TSM923 do not have a GND pin; hence, for TTL applications, V+ needs to be set to a +5V power supply and V- to 0V. Furthermore, the output design of the TSM921-TSM924 can source and sink more than 40mA and 5mA, respectively, while simultaneously maintaining a quiescent current in the microampere range. If the power dissipation of the package is maintained within the max limit, the output can source pulses of 100mA of current with V+ set to +5V. In an effort to minimize external component count needed to address power supply feedback, the TSM921-TSM924 output does not produce crowbar switching current as the output switches. With a 10mV input overdrive, the propagation delay of the TSM921-TSM924 is 12μs. Voltage Reference The TSM921, TSM923, and TSM924 have an onboard 1.182V reference voltage with an accuracy of ±1%. The REF pin is able to source and sink 15μA and 8μA of current, respectively. The REF pin is referenced to V- and it should not be bypassed. Low-Voltage Operation: V+ = 1.5V (TSM924 Only) Noise Considerations Due to a decrease in propagation delay and a reduction in output drive, the TSM921-TSM923 cannot be used with a supply voltage much lower than 2.5V. However, the TSM924 can operate down to a supply voltage of 2V; however, as the supply voltage reduces, the TSM924 supply current drops and the performance is degraded. When the supply voltage drops to 2.2V, the reference voltage will no longer function; however, the comparators will function down to a 1.5V supply voltage. Furthermore, the input voltage range is extended to just below 1.5V the positive supply rail. For applications with a sub-2.5V power supply, it is Noise can play a role in the overall performance of the TSM921-TSM924. Despite having a large gain, if the input voltage is near or equal to the input offset voltage, the output will randomly switch HIGH and LOW. As a result, the TSM921-TSM924 produces a peak-to-peak noise of approximately 0.3mVPP while the reference voltage produces a peak-to-peak noise of approximately 1mVPP. Furthermore, it is important to design a layout that minimizes capacitive coupling from a given output to the reference pin as crosstalk can add noise and, as a result, degrade performance. Page 12 TSM921_24DS r1p0 RTFDS TSM921-TSM924 APPLICATIONS INFORMATION Hysteresis As a result of circuit noise or unintended parasitic feedback, many analog comparators often break into oscillation within their linear region of operation especially when the applied differential input voltage approaches 0V (zero volt). Externally-introduced hysteresis is a well-established technique to stabilizing analog comparator behavior and requires external components. As shown in Figure 1, adding comparator hysteresis creates two trip points: VTHR (for the rising input voltage) and VTHF (for the falling input voltage). The hysteresis band (VHB) is defined as the voltage difference between the two trip points. When a comparator’s input voltages are equal, hysteresis effectively forces one comparator input to move quickly past the other input, moving the input out of the region where oscillation occurs. Figure 2 illustrates the case in which an IN- input is a fixed voltage and an IN+ is varied. If the input signals were reversed, the figure would be the same with an inverted output. Figure 2. Programming the HYST Pin and REF-50mV, where a voltage of REF-50mV generates the maximum voltage across R1 and thus, the maximum hysteresis and hysteresis band of 50mV and 100mV, respectively. To design the circuit for a desired hysteresis band, consider the equations below to acquire the values for resistors R1 and R2: R1 R2 Figure 1. Threshold Hysteresis Band VH 2 x IREF 1.182 VH 2 IREF where IREF is the primary source of current out of the reference pin and should be maintained within the maximum current the reference can source. This is typically in the range of 0.1μA and 4μA. It is also important to ensure that the current from reference is much larger than the HYST pin input current. Given R2 = 2.4MΩ, the current sourced by the reference is 0.5μA. This allows the hysteresis band and R1 to be approximated as follows: Hysteresis (TSM921 and TSM923) R1(kΩ) Hysteresis can be generated with two external resistors using positive feedback as shown in Figure 2. Resistor R1 is connected between REF and HYST and R2 is connected between HYST and V-. This will increase the trip point for the rising input voltage, VTHR, and decrease the trip point for the falling input voltage, VTHF, by the same amount. If no hysteresis is required, connect the HYST pin to the REF pin. The hysteresis band, VHB, is voltage across the REF and HYST pin multiplied by a factor of 2. The HYST pin can accept a voltage between REF For the TSM923, the hysteresis is the same for both comparators. TSM921_24DS r1p0 VHB(mv) Hysteresis (TSM922 and TSM924) Relative to adding hysteresis with the HYST pin as was done for the TSM921 and the TSM923, the circuit in Figure 3 uses positive feedback along with two external resistors to set the desired hysteresis for the TSM924. The circuit consumes more current and it slows down the hysteresis effect due to the Page 13 RTFDS TSM921-TSM924 1 R2 VTHR VREF x R1 1 1 R1 R3 1 3 1.182V x 100kΩ 1 1 100kΩ 10MΩ 5.44kΩ In this example, a 4.9kΩ, 1% standard value resistor is selected for R2. 6. The last step is to verify the trip voltages and hysteresis band using the standard resistance values: Figure 3. External Hysteresis high impedance on the feedback. The following procedure explains the steps to design the circuit for a desired hysteresis: 1. Choose R3. As the leakage current at the IN+ pin is less than 1nA, the current through R3 should be at least 100nA to minimize offset voltage errors caused by the input leakage current. For R3 11.8MΩ, the current through R3 is VREF/R3 at the trip point. In this case, a 10MΩ resistor is a good standard value for R3. 2. Next, the desired hysteresis band (VHB) is set. In this example, VHB is set to 50mV. 3. Calculate R1. R1 R3 x 10MΩ x VH V+ VTHF VTHR – 1 1 1 + + R1 R2 R3 R1 x V+ R3 Board Layout and Bypassing While power-supply bypass capacitors are not typically required, it is good engineering practice to use 0.1μF bypass capacitors close to the device’s power supply pins when the power supply impedance is high, the power supply leads are long, or there is excessive noise on the power supply traces. To reduce stray capacitance, it is also good engineering practice to make signal trace lengths as short as possible. Also recommended are a ground plane and surface mount resistors and capacitors. Auto-Off Power Source 100kΩ In this example, a 100kΩ, 1% standard value resistor is selected for R1. 4. Choose the trip point for VIN rising (VTHR), which is the threshold voltage at which the comparator switches its output from low to high as VIN rises above the trip point. In this example, choose VTHR = 3V. Page 14 VREF x R1 x TYPICAL APPLICATION CIRCUITS 50mV 5V 5. Calculate R2. VTHR A timed auto power-off circuit can be designed as shown in Figure 4 where the output of the TSM921 is the switched power-supply output. With an internal reference, hysteresis, high current output, and a 2.5 μA supply current, the TSM921 provides a wealth of features that make it perfect for this application. While consuming only 3.5μA of quiescent current with a 10mA load, the TSM921 is able to generate a voltage of VBATT – 0.12V. As shown in Figure 4, three resistors are used to generate a hysteresis band of 100mV and sets the IN+ trip point to 50mV when IN+ is going low. The maximum power-on period of the OUT pin before power-down occurs can be determined by the RC time constant as follows: TSM921_24DS r1p0 RTFDS TSM921-TSM924 the circuit, the following procedure needs to be followed: 1. As described in the section “Hysteresis (TSM921 and TSM923)”, determine the desired hysteresis and select resistors R4 and R5 accordingly. This circuit has ±5mV of hysteresis at the input where the input voltage VIN will appear larger due to the input resistor divider. Figure 4. Auto-Off Power Switch Operates on 2.5µA quiescent current. RxC 4. s The period value will change depending on the leakage current and the voltage applied to the circuit. For instance: 2MΩ x 10μF x 4. s = 92 s. 2. Selecting R1. As the leakage current at the INB- pin is less than 1nA, the current through R1 should be at least 100nA to minimize offset voltage errors caused by the input leakage current. Values within 100kΩ and 1MΩ are recommended. In this example, a 294kΩ, 1% standard value resistor is selected for R1. 3. Calculating R2 + R3. As the input voltage VIN rises, the overvoltage threshold should be 5.5V. Choose R2 + R3 as follows: Window Detector The schematic shown in Figure 5 is for a 4.5V undervoltage threshold detector and a 5.5V overvoltage threshold detector using the TSM923. Resistor components R1, R2, and R3 can be R2 + R3 R1 x 294kΩ x VOTH 1 VREF +VHYS 5.5V 1 1.182V +5mV 1.0 8MΩ 4. Calculating R2. As the input voltage VIN falls, the undervoltage threshold should be 4.5V. Choose R2 as follows: R2 (R1 + R2+ R3) x (294kΩ + 1.0 8MΩ) x TSM921_24DS r1p0 294k 1.182V 5mV 4.5 294k 2.2kΩ Figure 5. Window Detector selected based on the threshold voltage desired while resistors R4 and R5 can be selected based on the hysteresis desired. Adding hysteresis to the circuit will minimize chattering on the output when the input voltage is close to the trip point. OUTA and OUTB generate the active low undervoltage indication and active-low overvoltage indication, respectively. If both OUTA and OUTB signals are ANDed together, the resulting output of the AND gate is an active-high, power-good signal. To design VREF VHYS VUTH In this example, a 1.9kΩ, 1% standard value resistor is selected for R2. 5. Calculating R3. R3 (R2 + R3) R2 1.0 8MΩ – 1.9kΩ 1.00 MΩ Page 15 RTFDS TSM921-TSM924 In this example, a 1MΩ, 1% standard value resistor is selected for R3. 6. Using the equations below, verify all resistor values selected: VOTH (VREF + VHYS ) x R1 + R2 + R3 R1 = 5.474V VOTH (VREF VHYS ) x R1 + R2 + R3 (R1+R2) 4.484V Where the hysteresis voltage is given by: VHYS VREF x R5 R4 Figure 6. Bar-Graph Level Gauge Page 16 Bar-Graph Level Gauge A simple four-stage level detector is shown in Figure 6 using the TSM924. Due to its high output source capability, the TSM921 is perfect for driving LEDs. When all of the LEDs are on, the threshold voltage is set by resistors R1 and R2 where VIN =(R1 + R2)/R1 volts. All other threshold voltages are scaled down accordingly by ¾, ½, and ¼ the threshold voltage. The current through the LEDs is limited by the output resistors. Level Shifter Figure 7 provides a simple way to shift from bipolar ±5V inputs to TTL signals by using the TSM924. To protect the comparator inputs, 10kΩ resistors are placed in series and do not have an effect on the performance of the circuit. Figure 7. Level Shifter: ±5V Input into CMOS output TSM921_24DS r1p0 RTFDS TSM921-TSM924 PACKAGE OUTLINE DRAWING 8-Pin SOIC Package Outline Drawing (N.B., Drawings are not to scale) 0.546 REF 0.33 - 0.51 5.80 – 6.20 1.27 TYP 4.80 - 5.00 LEADFARME THICKNESS 0.19 – 0.25 1 1.32 – 1.52 7' REF ALL SIDE 3.73 - 3.89 7' REF ALL SIDE 2 0.48 Max 0.28 Min 45' Angle 0.76 Max 0.66 Min 1.75 Max GAUGE PLANE 3.81 – 3.99 0.25 0.10 – 0.25 2 0 - 8° 0.406 – 0.863 0.10 Max Notes: 1 Does not include mold flash, protrusions or gate burns. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per side. 2 Does not include inter-lead flash or protrusions. Inter-lead flash or protrusions shall not exceed 0.25 mm per side. 3. Lead span/stand off height/coplanarity are considered as special characteristic (s). 4. Controlling dimensions are in mm. 5. This part is compliant with JEDEC specification MS-012 6. Lead span/stand off height/coplanarity are considered as Special characteristic. TSM921_24DS r1p0 Page 17 RTFDS TSM921-TSM924 PACKAGE OUTLINE DRAWING 8-Pin MSOP Package Outline Drawing (N.B., Drawings are not to scale) 3.10 Max 2.90 Min 0.38 Max 0.28 Min 0.65 REF 8 0.23 Max 0.13 Min 0.127 0.27 REF 3.10 Max 2.90 Min 5.08 Max 4.67 Min GAUGE PLANE 0' -- 6' 1 2 0.70 Max 0.40 Min 0.25 0.38 Max 0.28 Min DETAIL “A” DETAIL ‘A’ 0.95 Max 0.75 Min 1.10 Max SEATING PLANE 0.10 Max 0.15 Max 0.05 Min 0.23 max 0.13 Min NOTE: 1. PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 2. PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTUSIONS. 3. CONTROLLING DIMENSION IN MILIMETERS. 4. THIS PART IS COMPLIANT WITH JEDEC MO-187 VARIATIONS AA 5. LEAD SPAN/STAND OFF HEIGHT/COPLANARITY ARE CONSIDERED AS SPECIAL CHARACTERISTIC. Page 18 TSM921_24DS r1p0 RTFDS TSM921-TSM924 PACKAGE OUTLINE DRAWING 16-Pin SOIC Package Outline Drawing (N.B., Drawings are not to scale) 10.01 Max 9.80 Min ( D) 0.79 Max 0.69 Min 1.27 TYP 0.508 REF 0.25 3.99 Max 3.81 Min (E) 6.20 Max 5.80Min GAUGE PLANE 7' TYP ALL SIDE 0' - 8' 0.863 Max 0.406 Min PIN 1 ID MARK 1.75 Max 0.51 Max 0.33 Min 3.89 Max 3.73 Min 0.48 Max 0.28 Min 45' Angle 3.99 Max 3.81 Min 0.25 Max O.10 Min 0.10 Max DETAIL ‘A’ 0.25 Max 0.19 Min DETAIL ‘A’ NOTE: 1. “D” DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 mm PER SIDE. 2. “E” DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.25 mm PER SIDE. 3. CONTROLLING DIMENSIONS IN MILIMETERS AND ANGLES IN DEGREES. 4. THIS PART IS COMPLIANT WITH JEDEC SPECIFICATION MS-012 AB 5. LEAD SPAN/STAND OFF HEIGHT/COPLANARITY ARE CONSIDERED AS SPECIAL CHARACTERISTIC. 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To minimize the risk associated with customer products and applications, customers should provide adequate design and operating safeguards. Trademarks and registered trademarks are the property of their respective owners. Touchstone Semiconductor, Inc. 630 Alder Drive, Milpitas, CA 95035 +1 (408) 215 - 1220 ▪ www.touchstonesemi.com Page19 TSM921_24DS r1p0 RTFDS