Analog Power AM4840N N-Channel 40-V (D-S) MOSFET These miniature surface mount MOSFETs utilize High Cell Density process. Low rDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. • • • • PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 22 @ VGS = 10V 40 27 @ VGS = 4.5V Low rDS(on) Provides Higher Efficiency and Extends Battery Life Miniature SO-8 Surface Mount Package Saves Board Space High power and current handling capability Low side high current DC-DC Converter applications ID (A) 9.7 8.8 1 8 2 7 3 6 4 5 ABSOLUTE MAXIMUM RATINGS (TA = 25 oC UNLESS OTHERWISE NOTED) Symbol Limit Parameter Drain-Source Voltage 40 VDS Gate-Source Voltage ±20 VGS TA=25oC Continuous Drain Currenta o TA=70 C Pulsed Drain Currentb a Continuous Source Current (Diode Conduction) TA=25 C o TA=70 C Operating Junction and Storage Temperature Range THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambient a ±50 IS 2.3 Steady State A 3.1 PD W 2.2 TJ, Tstg RθJA A ±7.2 IDM Symbol t <= 10 sec V ±9.7 ID o Power Dissipationa Units o C -55 to 150 Maximum 50 92 Units o C/W C/W o Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 January, 2006 - Rev. A PRELIMINARY Publication Order Number: DS-AM4840_A Analog Power AM4840N SPECIFICATIONS (T A = 25oC UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions VGS(th) IGSS VDS = VGS, ID = 250 uA Min Limits Unit Typ Max Static Gate-Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current A IDSS ID(on) A Drain-Source On-Resistance A Forward Tranconductance Diode Forward Voltage rDS(on) 1 VDS = 0 V, VGS = 20 V ±100 VDS = 24 V, VGS = 0 V 1 25 o VDS = 24 V, VGS = 0 V, TJ = 55 C VDS = 5 V, VGS = 10 V VGS = 10 V, ID = 9.7 A VGS = 4.5 V, ID = 8.8 A V nA uA 20 A 22 27 mΩ gfs VSD VDS = 15 V, ID = 9.7 A IS = 2.3 A, VGS = 0 V 40 0.7 S V Qg Qgs Qgd VDS = 15 V, VGS = 4.5 V, ID = 9.7 A 12.5 2.6 4.6 nC td(on) tr td(off) tf VDD = 25 V, RL = 25 Ω , ID = 1 A, VGEN = 10 V 20 9 70 20 nS Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Switching Turn-On Delay Time Rise Time Turn-Off Delay Time Fall-Time Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 January, 2006 - Rev. A PRELIMINARY Publication Order Number: DS-AM4840_A Analog Power AM4840N Package Information SO-8: 8LEAD H x 45° 3 January, 2006 - Rev. A PRELIMINARY Publication Order Number: DS-AM4840_A