ETC 20602

3.0 Volt-only
Flash Memory Technology
Technology Background
July 2003
The following document refers to Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that originally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this document as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal documentation improvements and are noted
in the document revision summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number 20602 Revision B
Amendment 0 Issue Date June 1, 1998
TECHNOLOGY BACKGROUND
3.0 Volt-only
Flash Memory Technology
2
3.0 Volt-only Technology Background
Introduction
AMD’s Am29LVxxx 3.0 volt-only Flash memory technology shares all the architectural
features of AMD’s industry-standard, 5.0 volt-only Am29Fxxx Flash memory technology.
The 5.0 volt-only family offers single power-supply operation, sector architecture, Embedded
Algorithms, and high performance. It has become the architecture of choice for system
designers using single-power-supply Flash memory. AMD’s Am29LVxxx 3.0 volt-only
family is destined to become the Flash architecture of choice for designers of battery-powered
applications, and offers the following:
❏
❏
❏
❏
❏
3.0 volt-only, single-power-supply operation
2.7 V to 3.6 V extended operating range
Low power consumption
High performance
Industry standard architecture
In addition, AMD’s 0.35 µm and new 0.32 µm process technologies offer a minimum
program/erase cycle endurance of one million cycles.
Single-Power-Supply Operation
The 3.0 volt-only design is based on the same process technology and many of the circuit
design techniques as AMD’s 5.0 volt-only Flash memory devices. The devices are fabricated
using double metal layers, dual-layer polysilicon, and a triple-well CMOS process. AMD’s
process provides low-power, high-performance CMOS devices using the established NOR
cell Flash architecture. AMD initially manufactured the 3.0 volt-only family on a 0.5 µm
process, but introduced its 16 Mbit devices on a 0.35 µm process. Many of the 3.0 volt-only
devices will migrate to a new 0.32 µm process technology by the end of 1998.
3.0 Volt-Only Design Techniques
AMD’s 3.0 volt-only devices achieve single-power-supply operation by using a memory array
constructed with core cells identical to those for AMD’s 5.0 volt-only devices. The difference
is that the 3.0 volt-only peripheral circuitry surrounding the memory core is specifically
designed to interface with 2.7–3.6 volt levels only. The Am29LVxxx family circuitry contains
charge pumps that enable a 2.7–3.6 volt external voltage to provide 5.0 volt-only performance
for read, program, and erase operations.
The charge pumps in the 3.0 volt-only design raise the external power supply voltage to levels
required for internal 5.0 volt operation. This approach is silicon efficient, as the 3.0 volt-only
3.0 Volt-only Technology Background
3
charge pump design results in a negligible die size increase over the corresponding density,
using the same design rules, in the 5.0 volt-only family.
The erase operation is accomplished through AMD’s patented Negative Gate Erase
technology (NGE), which incorporates Fowler-Nordheim tunneling (see Figure 1); the
programming operation is accomplished with hot electron injection techniques (see Figure 2).
word line
tri-state
D
-8.5 V
G
S
5.0 V
bit line
Figure 1. 3.0 Volt-only Negative Gate Erase Voltage Setup
Notes:
1.
2.
3.
Gate terminal is pumped to -8.5 volts at less than 10 µA current.
10 mA - 20 mA (peak) erase current is provided to the source terminal by the system’s VCC supply.
D = drain, G = Gate, S = Source
word line
5.5 V
D
8.0 V
G
S
0.0 V
bit line
Figure 2. 3.0 Volt-only Programming Voltage Setup
Notes:
1.
2.
3.
Gate terminal is pumped to 8.0 volts at less than 10 µA current.
Drain terminal is pumped to 5.5 volts from the 3.0 V supply at 0.5 mA.
D = drain, G = Gate, S = Source
4
3.0 Volt-only Technology Background
AMD’s 3.0 volt-only Flash devices read, program, and erase at a VCC as low as 2.7 volts,
using a single-power-supply pin, whereas so-called “3 volt” mixed-voltage, Flash devices read
at 3.0 volts, but require either 5.0 V or 12.0 V to program and erase. Generating an additional
voltage involves using another power supply or a DC/DC converter. With AMD’s singlepower-supply Flash devices, battery-powered applications require only a single power supply
to accomplish in-system reprogrammability. Eliminating the need for the additional power
supply or converter conserves power and provides system-level cost savings.
Optimized for Battery-Powered Applications
AMD’s 3.0 volt-only design is optimized for battery-powered systems. To provide
performance equivalent to 5.0 volt devices and lower power consumption, the 3.0 volt-only
devices are designed to interface with 2.7–3.6 volt levels only. Although some systems
designers may desire 3.0 volt-only devices that can interface with 5.0 volt levels, providing
this capability requires additional circuitry, which adds cost and extracts a performance
penalty.
Some systems have both 5.0 volt and 3.0 volt components that share the same data bus.
System designers can still use AMD’s 3.0 volt-only devices this type of design, but voltage
translators must be used to buffer the devices from electrical over-stresses associated with 3.0
volt devices sharing the same data bus with 5.0 volt devices.
2.7-3.6 Volt Extended Operating Range
The operating range normally associated with “3 volt” Flash devices is 3.3 + 0.3 V. AMD’s
3.0 volt-only family of Flash devices have an operating range of 2.7 V to 3.6 V, which is ideal
for battery-powered systems. This extended range allows portable systems to operate longer
between battery replacement or recharging cycles.
AMD’s devices also operate over an extended temperature range, which is important in many
battery-powered portable applications.
Low Power Consumption
AMD’s 3.0 volt-only devices operate with very low power consumption, while still providing
performance equal to AMD’s 5.0 volt-only Flash devices. AMD’s 3.0 volt-only devices
provide power savings in both the active as well as the inactive states.
In AMD’s 3.0 volt-only device active modes (read, program, and erase operations), the
reduction in power consumption versus a 5.0 volt device totals approximately 60 percent. The
3.0 Volt-only Technology Background
5
reduced VCC accounts for 40 percent, and design techniques that result in lower current
consumption provide the remaining 20 percent. In addition, AMD’s 3.0 volt-only family
provides two inactive modes—a standby mode, and a new Automatic Sleep Mode—that
provide further power savings. Table 1 lists the power consumption figures for these modes.
Table 1. 3.0 Volt-Only vs. 5.0 Volt-only Device Power Consumption
Mode
Typical Power
Consumption(1)
Maximum Power
Consumption(1)
3.0 Volt-only
Device
5.0 Volt-only
Device
3.0 Volt-only
Device
5.0 Volt-only
Device
Read
30 mW
100 mW
108/126 mW (2)
165/193 mW (2)
Program
60 mW
140 mW
126 mW
193 mW
Erase
60 mW
150 mW
126 mW
193 mW
Standby
3 µW
<15 mW
18 µW
28 µW
Automatic Sleep Mode
3 µW
n/a
18 µW
n/a
(1) Typical power values are the product of the typical current multiplied by 3.0 volts (for the 3.0 volt-only
device) or 5.0 volts (for the 5.0 volt-only device). Maximum power values are the product of the maximum
current multiplied by 3.6 volts (for the 3.0 volt-only device) or 5.5 volts (for the 5.0 volt-only device).
(2) Byte/Word Mode.
A design technique called Address Transition Detection (ATD), described under High
Performance, provides power savings during read operations. A proprietary, intelligent
programming algorithm provides power savings during program operations. This algorithm
analyzes the programming task and then provides the optimal programming pulse (and thus
the minimum power) required to complete the byte or word programming operation without
sacrificing programming performance.
The 3.0 volt-only family optimizes power savings in the inactive state through the standby and
Automatic Sleep Modes. The standby mode is user controlled (by holding the CE# pin high)
and typically consumes only 3 µW of power when the device is deselected. During the
Automatic Sleep Mode, the device typically consumes only 3 µW after the addresses have
been stable for a minimum of tACC +30 ns, regardless of the logical state of the CE#, OE# and
WE# pins. The device resumes active operation from either the standby or the Automatic
Sleep Modes using the standard AC timing for tACC. There is no latency penalty associated
with either the standby mode or the Automatic Sleep Mode; only the standard tACC or tOE
applies.
6
3.0 Volt-only Technology Background
High Performance
AMD’s 3.0 volt-only devices offer a choice of fast access times at an extended VCC voltage
range of 2.7 to 3.6 volts or faster access times at a regulated voltage range of 3.0 to 3.6 volts.
For example, AMD’s newly introduced Am29LV001B has a 45 ns speed option at the
regulated voltage range and a 55 ns speed option at the extended voltage range. The speed and
low voltage operation of the 3.0 volt-only family makes them ideal solutions for highperformance, battery-powered applications.
The following sequence of events within the device illustrates how AMD achieves high
performance during a read operation:
1. A voltage transition that appears on the address pins initiates Address Transition
Detection (ATD) circuitry to retrieve the next byte or word of data.
2. ATD initiates charge pump circuitry to boost the voltage on the word lines from 0.0 or
3.0 volts to 5.0 volts as the device decodes the address and loads the new data from the
array into the data latches.
3. The word lines remain boosted at 5.0 volts internally only until the requested data is
latched.
4. After the data is latched, ATD reduces the voltage on the word lines to 3.0 volts, and
the data remains available from the data latches until the next read request from a different address.
5. If the address lines remain stable for tACC + 30 ns, the device enters the Automatic
Sleep Mode, reducing the voltage on the word lines to 0.0 volts.
Boosting the word lines only as needed provides read access times equivalent to AMD’s 5.0
volt-only Flash memories of similar density and organization. The Automatic Sleep Mode
provides additional power savings without sacrificing performance.
In program and erase modes, the 3.0 volt-only design uses an efficient power supply charge
pump design, which pumps gate voltage with low current, to reduce program and erase times.
The 3.0 volt-only devices offer this performance without compromise at VCC voltage levels as
low as 2.7 volts.
3.0 Volt-only Technology Background
7
Industry Standard Architecture
AMD’s 3.0 volt-only family of products are based on the same process technology and
industry standard architecture as AMD’s 5.0 volt-only Flash devices. AMD’s process provides
low-power, high-performance CMOS devices using the NOR cell Flash architecture. The
Am29LVxxx family offers the following features:
❏ JEDEC single-power-supply standard for pinout and software commands.
❏ A memory array that is segmented into smaller sectors for erase operation. This
feature allows for modular code development, storage of boot code, parameters, and
main code in different sectors, and the ability to write protect any or all sectors of the
device.
❏ AMD’s Embedded Program and Embedded Erase algorithms that simplify Flash
operation by automating the programming and erase operations on the chip. This
eliminates the need for dedicated CPU control of the device, and thus improves
system-level performance. The embedded algorithms automatically detect and correct
overerase, and eliminate program/erase software implementation errors associated
with first-generation manual algorithm Flash devices.
❏ A guaranteed minimum endurance of 1 million program/erase cycles on the 0.35 µm
and new 0.32 µm process technologies. This equates to higher reliability in systems
that rewrite data even once to the Flash device.
Summary
AMD’s 3.0 volt-only design offers all the advantages and performance of its 5.0 volt-only,
industry standard architecture, while providing 3 volt operation optimized for battery-powered
applications. Features of the industry standard architecture include single-power-supply
operation, sector architecture, and Embedded Algorithms. In addition, AMD’s 3.0 volt-only,
Am29LVxxx family of Flash memories provides a 2.7 V to 3.6 V extended operating range
and low power consumption without sacrificing performance.
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20602B