AMD Flash Memory Quick Reference Guide February 2003 Edition -XO\ 7KHIROORZLQJGRFXPHQWUHIHUVWR6SDQVLRQPHPRU\SURGXFWVWKDWDUHQRZRIIHUHGE\ERWK$GYDQFHG 0LFUR'HYLFHVDQG)XMLWVX$OWKRXJKWKHGRFXPHQWLVPDUNHGZLWKWKHQDPHRIWKHFRPSDQ\WKDWRULJ LQDOO\ GHYHORSHG WKHVSHFLILFDWLRQ WKHVH SURGXFWV ZLOO EHRIIHUHG WR FXVWRPHUVRIERWK $0' DQG )XMLWVX Continuity of Specifications 7KHUHLVQRFKDQJHWRWKLVGRFXPHQWDVDUHVXOWRIRIIHULQJWKHGHYLFHDVD6SDQVLRQSURGXFW$Q\ FKDQJHVWKDWKDYHEHHQPDGHDUHWKHUHVXOWRIQRUPDOGRFXPHQWDWLRQLPSURYHPHQWVDQGDUHQRWHG LQWKHGRFXPHQWUHYLVLRQVXPPDU\ZKHUHVXSSRUWHG)XWXUHURXWLQHUHYLVLRQVZLOORFFXUZKHQDSSUR SULDWHDQGFKDQJHVZLOOEHQRWHGLQDUHYLVLRQVXPPDU\ Continuity of Ordering Part Numbers $0'DQG)XMLWVXFRQWLQXHWRVXSSRUWH[LVWLQJSDUWQXPEHUVEHJLQQLQJZLWK³$P´DQG³0%0´7RRUGHU WKHVHSURGXFWVSOHDVHXVHRQO\WKH2UGHULQJ3DUW1XPEHUVOLVWHGLQWKLVGRFXPHQW For More Information 3OHDVH FRQWDFW \RXU ORFDO $0' RU )XMLWVX VDOHV RIILFH IRU DGGLWLRQDO LQIRUPDWLRQ DERXW 6SDQVLRQ PHPRU\VROXWLRQV Publication Number 21531 Revision G Amendment 0 Issue Date February 2003 One AMD Place P.O. Box 3453 Sunnyvale California 94088-3453, USA Tel: 408-732-2400 800-538-8450 TWX: 910-339-9280 TELEX: 34-6306 TECHNICAL SUPPORT USA & CANADA: 800-222-9323 or 408-749-5703 USA & CANADA PC Microprocessor: 408-749-3060 USA & CANADA Email: [email protected] LATIN AMERICA Email: [email protected] ARGENTINA: 001-800-200-1111, after tone 800-859-4478 CHILE: 800-532-853 MEXICO: 95-800-222-9323 EUROPE & UK: +44-0-1276-803299 Fax: +44-0-1276-803298 FRANCE: 0800-908-621 GERMANY: 089-450-53199 ITALY: 800-877224 EUROPE Email: [email protected] FAR EAST Fax: 852-2956-3996 JAPAN Fax: 81-3-3346-7848 LITERATURE ORDERING USA & CANADA: 800-222-9323 LATIN AMERICA Email: [email protected] EUROPE Email: [email protected] FAR EAST Fax: 852-2956-0588 JAPAN Fax: 03-3346-9628 www.amd.com AMD, the AMD logo, MirrorBit, UltraNAND, VersatileIO, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. 2003 Advanced Micro Devices, Inc. AMD Flash Memory Quick Reference Guide Printed in USA AMZ-10M-02/03-0 21531G AMD Flash Memory Web Site Contents Chip Scale Packaging Options Go to http://www.amd.com/flash. Package The AMD web site contains a wealth of information relating to AMD Flash memory. The Flash memory portion of the site is divided into three subsections: Product Information, Flash Applications, and Technical Resources, and can be accessed from the tabs on the main horizontal menu. Each subsection has its own hub page and menu from which information is easily found. The Product Information section allows navigation to individual products by choosing an operating voltage, architecture, or density. The individual product pages have direct links to application notes, and software simulation models. The Flash Applications section leads to information on four market segments that have a significant number of Flash memory applications. A link to reference designs that feature AMD Flash is also provided. The Technical Resources section contains data sheets, application notes, white papers, Flash memory-specific software, and information on AMD programming services. Supporting documentation on packaging and Known Good Die (KGD) products are also available. Information on obsolete products such as EPROMs and 12 V Flash is archived within this section. The following table highlights some of the web site features that are currently available. Subject Description AMD Flash Memory Quick Reference Guide Go to http://www.amd.com/flash http://www.amd.com/flash/mirrorbit MirrorBit FusionFlash Catalog A collection of web pages describing companies that work with AMD to support AMD Flash memory products. Some areas of support include sockets, programming equipment, and software. Click on “Third Party Support.” Then click on the desired topic link. A list of online publications in PDF format that includes data sheets, application notes, technical backgrounds, and other general information pieces. Viewing and printing PDFs require Adobe Acrobat Reader. http://www.amd.com/flash/docs Technical Documentation Data Sheet Programmer Supplements Documents in PDF format that describe, for Flash devices that lack in-system sector protection and unprotection capability, the algorithms that must be performed using external programming equipment. Requires contacting AMD or an AMD representative for access. http://www.amd.com/flash/applications Applications-focused Web Pages Web pages designed to explain the features and benefits of AMD Flash memory that are ideal for a specific market segment. Examples of segments include portable, networking/telecommunications, and automotive applications. http://www.amd.com/flash/drivers Flash Memory Device Drivers Source code for integration into customer code that handles the operation of the Flash device. Two types of drivers are available: a basic version that controls the operation of the Flash—read, erase, program; the other version controls the Flash device and additionally queries CFI-capable (Common Flash Interface) Flash for device information Files that include parameters and specifications describing AMD Flash memory. Files are intended for use with circuit design simulation software. http://www.amd.com/flash/models CAD Models 2 Benefits Existing AMD Flash fully tested at temperature and speed. A small form factor ideal for use in multichip modules or hybrids. http://www.amd.com/ flash/kgd Same quality and reliability as packaged devices. Fits small form-factor applications. Both 5.0 Volt-only and 3.0 Volt-only products in x8 or x8/x16 configuration. Fine-Pitch Ball Grid Array Fortified Ball Grid Array http://www.amd.com/ flash/bga Link from Flash Memory Home Page An entire section devoted to MirrorBit products and technology: data sheets, white paper, multimedia demo, application notes, and software simulation models. Features KGD (Known Good Die) Chip-scale packages. Fine pitch BGA has 0.8 mm pitch; Fortified BGA has 1.0 mm pitch Same input/output ball footprint for a variety of densities, regardless of package size.* No manufacturing or handling equipment changes required if the die size is changed. FBGA chip-scale packaging requires only about 1/3 the board space of the TSOP package for densities up to 16 Mb. No board layout changes required to migrate to a higher or lower density memory.* Lowest cost chip-scale package. * Densities greater than 32 Mb may use additional balls for stability. Packaging Options PDIP SO TSOP PLCC KGD (16Mb) FBGA (16Mb) Socket Vendors For more information on sockets, contact the following vendors: Yamaichi Electronics 2235 Zanker Road San Jose, CA 95131 (408) 456-0797 Fax (408) 456-0799 Wells Electronics, Inc. 226 Airport Parkway, Suite 300 San Jose, CA 95110 (408) 452-4290 Fax (408) 452-4291 Loranger Intl. Corp. 3000 Scott Boulevard, Suite 201 San Clara, CA 95054 (408) 727-4234 Fax (408) 727-5842 email: [email protected] 17 3.0 Volt-only MirrorBitTM Flash Memory Ordering Part Number1 2 Density Device Number Sector 16 Mbit Am29LV017M Uniform 16 Mbit Am29LV116M T, B 16 Mbit Am29LV160M T, B 3 Access Times (ns) 70R, 90R, 120R 70, 90, 120 70R, 90R, 120R 70, 90, 120 70R, 90R, 120R 70, 90, 120 Voltage Range Package (Pin/Ball Count) 4 Temp. Range E (40), F (40), WC (48) C, I E (40), F (40) C, I E (48), F (48), WA (48), PC (64) C, I, E VCC 3.0–3.6 2.7–3.6 3.0–3.6 2.7–3.6 3.0–3.6 2.7–3.6 90R Am29LV033M U 112R, 120R 3.0–3.6 E (40), F (40), WC (48) I 2.7–3.6 112, 120 90R 32 Mbit E (56), F (56), PC (64) I 2.7–3.6 112, 120 T, B 90R, 100R, 110R, 120R 100, 110, 120 E (48), WC (48), PC (64) 3.0–3.6 I 90R6 Am29LV065M U 112R, 120R E (48), F (48), WH (63) I 2.7–3.6 90R6 WH (63), PC (64) I 2.7–3.6 112, 120 90R6 112R, 120R E (56), F (56), PC (64) I 101 90R 6, 100R, 110R, 120R 100, 110, 120 2.7–3.6 E (48), WH (63), PC (64) 3.0–3.6 I H, L 112R, 120R CFI. Sector sizes (KB): 16,(2)8,32,(15)64 Y 4Mx8 2.7–3.6 CFI. Sector size (KB): (64)64 2.7–3.6 1.65–3.6 2.7–3.6 SecSi Sector, WP#/ACC, CFI. Sector size (KB): (64)64 2.7–3.6 Y 1.65–3.6 2 M x 16, 4Mx8 SecSi Sector, WP#/ACC, CFI. Sector sizes (KB): (8)8,(63)64 NA 2.7–3.6 Y 8Mx8 SecSi sector, ACC, CFI. Sector size (KB): (128)64 Y 4 M x 16 SecSi sector, ACC, CFI. Sector size (Kw): (128)32 Y 4 M x 16, 8Mx8 SecSi sector, WP#/ACC, CFI. Sector size (KB): (128)64 Y 4 M x 16, 8Mx8 SecSi sector, WP#/ACC, CFI. Sector sizes (KB): (8)8,(127)64 Y 4 M x 16 SecSi sector, WP#, ACC, CFI. Sector size (Kw): (128)32 2.7–3.6 1.65–3.6 2.7–3.6 2.7–3.6 1.65–3.6 2.7–3.6 2.7–3.6 1.65–3.6 NA 3.0–3.6 101R Am29LV641M 1 M x 16, 2Mx8 2.7–3.6 90R6 64 Mbit N 1.65–3.6 112, 120 T, B NA 3.0–3.6 3.0–3.6 101R H, L CFI. Sector sizes (KB): 16,(2)8,32,(15)64 1.65–3.6 101 Am29LV640M 2Mx8 3.0–3.6 3.0–3.6 101R 64 Mbit N 1.65–3.6 101 112R, 120R NA 3.0–3.6 3.0–3.6 112, 120 U CFI. Sector size (KB): (32)64 2.7–3.6 101R 64 Mbit 2Mx8 1.65–3.6 101 Am29LV320M N Additional Features, Sector Size/Count 5 3.0–3.6 3.0–3.6 101R 112R, 120R NA 1.65–3.6 101 H, L Byte/Word Count x Bus Width 3.0–3.6 101R 32 Mbit VIO Page Mode 3.0–3.6 E (48), F (48) I 2.7–3.6 1.65–3.6 101 2.7–3.6 112, 120 2.7–3.6 1.65–3.6 Notes: 1. Contact an AMD representative for availability. See Ordering Part Number Designators table for additional package and product details. Some features on MirrorBit products may be pending, and specifications may be subject to change. 2. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot, H = WP# protects highest addressed sector, L = WP# protects lowest addressed sector. LV017M sector designator not included in part number. 3. Special access time designators are as follows: 90 = 90 ns; 101 = 100 ns; 112 = 110 ns; 120 = 120 ns. All other access times are as stated in part number. An “R” indicates regulated VCC voltage range. 4. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Sector Size/Count: Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes. 6. Volume production of this speed option may not be immediately available. Contact AMD for further information. 3 4 3.0 Volt-only MirrorBitTM Flash Memory (Continued) Ordering Part Number1 Density Device Number Sector 128 Mbit Am29LV6402M H, L 2 3 Access Times (ns) Voltage Range Package (Pin/Ball Count) 4 Temp. Range VCC PH (80) I 3.0–3.6 100R 110R 2.7–3.6 103R6 128 Mbit Am29LV128M H, L 113R, 123R 103 3.0–3.6 E (56), F (56), PC (64) I 2.7–3.6 113, 123 110R 256 Mbit Am29LV1282M H, L 120R 256 Mbit Am29LV256M H, L 1036 I Am29LV2562M H, L 512 Mbit Am29LV512N H, L 120R 80, 90 85, 95 3.0–3.6 3.0–3.6 E (56), F (56), PG (64) I 2.7–3.6 113, 123 512 Mbit 1.65–3.6 PI (80) I 2.7–3.6 E (56), F (56), PG (64) I 2.7–3.6 Byte/Word Count x Bus Width Additional Features, Sector Size/Count 5 Y 4 M x 32, 8 M x 16 Two Am29LV640M devices in a single package. SecSi Sector, ACC, CFI, VersatileIO. Sector size (Kw): (128)64 Y 8 M x 16, 16 M x 8 SecSi Sector, WP#/ACC, CFI. Sector size (Kw): (256)32 Y 8 M x 32, 16 M x 16 Two Am29LV128M devices in a single package. SecSi Sector, ACC, CFI, VersatileIO. Sector size (KB): (256)64 Y 16 M x 16, 32 M x 8 WP#/ACC, CFI. Sector size (Kw): (512)32 Y 16 M x 32, 32 M x 16 Two Am29LV256M devices in a single package. SecSi Sector, ACC, CFI, VersatileIO. Sector size (Kw): (512)64 Y 32 M x 16, 64 M x 8 2.7–3.6 1.65–3.6 2.7–3.6 1.65–3.6 2.7–3.6 PH (80) 103R6 113R, 123R VIO Page Mode 1.65–3.6 2.7–3.6 1.65–3.6 2.7–3.6 1.65–3.6 1.65–3.6 2.7–3.6 1.65–1.95 WP#/ACC, CFI. Sector size (Kw): (512)64 Notes: 1. Contact an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. Some features on MirrorBit products may be pending, and specifications may be subject to change. Products listed in italics have not yet been introduced. 2. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot, H = WP# protects highest addressed sector, L = WP# protects lowest addressed sector. 3. Special access time designators are as follows: 90, 93 = 90 ns; 101, 103 = 100 ns; 112, 113 = 110 ns; 120, 123 = 120 ns. All other access times are as stated in part number. An “R” indicates regulated VCC voltage range. Designators ending in “3” indicate 3 V VIO. Designators ending in “5” indicate 1.65–1.95 V VIO 4. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Sector Size/Count: Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes. 6. Volume production of this speed option may not be immediately available. Contact AMD for further information. MirrorBit Drop-in Compatibility Density MirrorBit Device TSOP BGA (Fine-pitch/Fortified) Conventional Flash Device E (48), F (48) WC (48) Am29LV160D, Am29DL16xD1 PC (64) Am29DL16xD1 WC (48) Am29LV017D WM (48) Am29LV320D, Am29DL32xD/G PC (64) Am29DL32xD/G PC (64) Am29DL323D/G1 Am29LV160M 16 Mbit Am29LV017M E (40), F (40) Am29LV116M E (40), F(40) Am29LV320MT/B 32 Mbit Am29LV320MH/L Am29LV033M E (48) 128 Mbit Am29LV320D1 E (56), F (56) E (40), F (40) Am29LV640MU 64 Mbit Am29LV116D WC (48) Am29LV033C WH (63), PC (64) Am29LV640DU Am29LV640MT/B E (48) WH (63), PC (64) Am29DL640D/G Am29LV640MH/L E (56), F (56) PC (64) Am29DL640G1,2,3, Am29LV640D/H/L Am29LV641MH/L E (48), F (48) Am29LV065MU E (48), F (48) Am29LV128M Am29LV641DH/L WH (63) Am29LV065D PC (64) Am29LV642D Notes: 1. Sector architecture differences. 2. 48-pin to 56-pin TSOP migration. 3. MirrorBit supports VIO; DL640 does not support VIO. MirrorBit Package Migration x8/x16, x16 only 16 Mb 48-pin TSOP Am29LV160MT/B 32 Mb 64 Mb 128 Mb 256 Mb 512 Mb Am29LV128MH/L Am29LV256MH/L Am29LV512NH/L Am29LV128MH/L Am29LV256MH/L Am29LV512NH/L 1 56-pin TSOP Am29LV320MT/B Am29LV640MT/B Am29LV320MH/L Am29LV640MH/L 2 3 48/63 ball Fine-pitch BGA Am29LV160MT/B Am29LV320MT/B 64-ball Fortified BGA Am29LV160MT/B Am29LV320MT/B Am29LV320MH/L 40/48-pin TSOP Am29LV017M Am29LV116M (4) Am29LV033MU 48/63-ball Fine-pitch BGA Am29LV017M Am29LV033MU x8 only Am29LV640MT/B Am29LV640MH/L Am29LV640MT/B 5 2 Am29LV065MU Am29LV065MU Notes: T/B = Top or bottom boot sector. H/L = Uniform sector with highest or lowest addressed sector WP# protection. U = Uniform sectors without WP# protection. (1) 48- to 56-pin migration. (2) MirrorBit products in these packages will include 1 Gbit devices. (3) 48- to 63-ball migration. (4) Am29LV116M has boot sectors; all other devices shown have uniform sectors. (5) 40- to 48-pin migration. Architecture2 1.8 Volt-only Flash Memory Ordering Part Number1 Density Sim. R/W + Burst Mode 32 Mbit Device Number Am29BDS320G Sector T, B 64 Mbit Am29BDS640G T, B 64 Mbit Am29BDS643G T 128 Mbit Am29BDS128H T, B 3 Access Times (ns) D3, D4, D8, D9 (13.5)7 C8, C9, C3, C4 (20)7 D3, D4, D8, D9 (13.5)7 C8, C9, C3, C4 (20)7 7G (20), 7M (13.5), 5K (11)8 D3, D4, D8, D9 (13.5)7 C8, C9, C3, C4 (20)7 Voltage Range Package (Pin/Ball Count)4 Temp. Range VM (64) I VCC 1.65– 1.95 WS (80) I 1.65– 1.95 VA (44) I 1.7– 1.9 I 1.65– 1.95 WS (80) VIO 1.65– 1.95 Byte/Word Count x Bus Width 4 M x 16 WP#, ACC, CFI. Separate address and data buses. Bank split 4 x 16Mb. Banks A–D (Kw): [(4)8,(15)32] [(16)32] [(16)32] [(15)32,(4)8] 4 M x 16 WP#, ACC, CFI. Separate address and data buses. Bank split 4 x 16Mb. Banks A–D (Kw): [(4)8,(31)32] [(32)32] [(32)32] [(4)8,(31)32] 4 M x 16 WP#. Multiplexed address/data bus. Bank split 4 x 16Mb. Banks A–D (Kw): [(8)4,(31)32] [(32)32] [(32)32] [(8)4,(31)32] 4 M x 16 WP#, ACC, CFI, Advanced Sector Protection. Separate address and data buses. Bank split 4 x 16Mb. Banks A–D (Kw): [(4)8,(31)32] [(32)32] [(32)32] [(4)8,(31)32] 2.7– 3.15 1.65– 1.95 2.7– 3.15 1.7– 1.9 1.65– 1.95 2.7– 3.15 Additional Features, Sector Size/Count5 Notes: 1. Contact AMD or an AMD representative for availability. See Ordering Part Number Designators table for additional package and product details. Products listed in italics are not yet introduced. 2. Sim R/W = Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot. 4. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits. 6. BDS323D asynchronous access time is given first (11A = 110 ns, 40 MHz clock speed), followed by the burst mode access time in parentheses. 7. BDS320G/640G/128H clock rate/asynchronous access: D = 54 MHz/70 ns, C = 40 MHz/90 ns. Voltage/handshaking type: 3 = 3 V VIO, reduced wait state handshaking; 4 = 3 V VIO, standard handshaking; 8 = 1.8 V VIO, reduced wait state handshaking; 9 = 1.8 V VIO, standard handshaking. 8. BDS643G clock rate/handshaking enabled: K = 66 MHz/yes; M = 54 MHz/yes; G = 40 MHz/yes. Asynchronous access: 7 = 70 ns; 5 = 55 ns. 5 6 Conventional Sim. R/W Sim. R/W + Architecture2 Page Mode 1.8 Volt-only Flash Memory (Continued) Ordering Part Number1 Voltage Range Access Times (ns) 3 Package (Pin/Ball Count)4 Temp. Range VCC VIO Byte/Word Count x Bus Width Additional Features, Sector Size/Count5 Density Device Number Sector 32 MBit Am29PDS322D T, B 10 (40), 12 (45)6 WM (48) I 1.8–2.2 NA 2 M x 16 SecSi Sector, WP#/ACC, CFI. Bank split 4/28Mb. Banks 1–2 (Kw): [(8)4,(7)32] [(56)32] 16 Mbit Am29DS163D T, B 100, 120 WA (48) I, E 1.8–2.2 NA 2 M x 8, 1 M x 16 SecSi Sector, WP#/ACC, CFI. Bank split 4/12 Mb. Banks 1–2 (KB): [(8)8,(7)64] [(24)64] 32 Mbit Am29DS323D T, B 110, 120 E (48), WM (48) I 1.8–2.2 NA 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. Bank split 8/24 Mb. Banks 1–2 (KB): [(8)8,(15)64] [(48)64] 32 Mbit Am29DS320G T, B 70, 90, 120 E (48), WM (48) I, E 1.8–2.2 NA 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 32 Mbit Am29DS322G, Am29DS323G, Am29DS324G T, B 70, 90, 120 E (48), WM (48) I 1.8–2.2 NA 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 8 Mbit Am29SL400C T, B E (48), WB (48) C, I NA 512 K x 8, 256 K x 16 Sector sizes (KB): 16,8,8,32,(7)64 8 Mbit Am29SL800D T, B 100, 120, 150 E (48), F (48), WC (48) C, I 1.65–2.2 NA 1 M x 8, 512 K x 16 Sector sizes (KB): 16,8,8,32,(15)64 16 Mbit Am29SL160C T, B 90, 100, 120, 150 E (48), WC (48) C, I, E 1.8–2.2 NA 2 M x 8, 1 M x 16 100R 110, 120, 150 1.75–2.2 1.65–2.2 WP#/ACC, CFI. Sector sizes (KB): (8)8,(31)64 2.5 Volt-only Flash Memory Ordering Part Number1 2 Architecture Density Device Number Sector Sim. R/W + Burst Mode 16 Mbit Am29BDD160G T, B7 3 Access Times (ns), (Clock Speed) Package (Pin/Ball Count)4 Temp. Range Voltage Supply 54D, 65D (66 MHz), 64C (56 MHz), 65A (40 MHz)8 K (80), PB (80) I, E 2.3–2.75 V Byte/Word Count x Bus Width Additional Features, Sector Size/Count 5 1 M x 16, 512 K x 32 SecSi Sector, VersatileIO, WP#, ACC, CFI, Advanced Sector Protection, Bank Split 4/12 Mb or 12/4 Mb.7 Architecture2 3.0 Volt-only Flash Memory Ordering Part Number1 Density Device Number Sector3 64 Mbit Am29PDL640G T, B9 Access Times (ns) Voltage Range Package (Pin/Ball Count)4 Temp. Range WH (63), WS (80) I VK (80), PC (64) I 73 (25), 83 (30)10 10 Sim. R/W + Page Mode 98 (30) 128 Mbit Am29PDL127H T, B9 53 (20), 63, 83 (30)10 68, 88 (30)10 70R (25)10 128 Mbit Am29PDL128G T, B9 128 Mbit Am29PDL129H T, B9 70 (25), 80 (30)10 53 (20), 63, 83 (30)10 68, 88 (30)10 PE (80) VK (80) VCC VIO 2.7–3.1 2.7–3.6 2.7–3.1 1.65–1.95 2.7–3.6 2.7–3.6 2.7–3.6 1.65–1.95 I 3.0–3.6 NA I, E 2.7–3.6 NA 2.7–3.6 2.7–3.6 I 2.7–3.6 1.65–1.95 Byte/Word Count x Bus Width Additional Features, Sector Size/Count 5 4 M x 16 Advanced Sector Protection, WP#/ACC, CFI, VersatileIO. Bank split 16/48/48/16Mb. Banks 1–4 (Kw): [(8)4,(15)32] [(48)32] [(48)32] [(15)32,(8)4] 8 M x 16 Two PDL640H devices in a single package with single CE# input. Advanced Sector Protection, WP#/ACC, CFI. Bank split 16/48/48/16Mb. Banks 1–4 (Kw): [(8)4,(31)32] [(96)32] [(96)32] [(31)32,(8)4] 8 M x 16, 4 M x 32 Advanced Sector Protection, WP#/ACC, CFI. Bank split 16/48/48/16Mb. Banks 1–4 (Kw): [(8)4,(31)32] [(96)32] [(96)32] [(31)32,(8)4] 8 M x 16 Two PDL640H devices in a single package with dual CE# inputs. Advanced Sector Protection, WP#/ACC, CFI. Bank split 16/48/48/16Mb. Banks 1–4 (Kw): [(8)4,(31)32] [(96)32] [(96)32] [(31)32,(8)4] Notes: 1. Contact AMD or an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. Products listed in italics are not yet introduced. 2. Sim R/W = Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot. 4. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits. 6. PDS322D asynchronous access time is given first (10 = 100 ns, 12 = 120 ns), followed by the page mode access time in parentheses. 7. BDD160G: T = 4/12 Mbit bank split, Banks 1/2 (Kw): [(8)4,(7)32] [(8)4,(23)32]; B = 12/4Mbit bank split, Banks 1/2 (Kw): [(8)4,(23)32] [(8)4,(7)32] 8. BDD160G access times are for maximum initial burst read or asynchronous read operations. 9. This product has the Flexible Bank feature, which allows the device to be configured as a top or bottom boot device. Sector designators (T, B) are thus not included in part number. 10. The asynchronous access time is given first, followed by the burst (or page) mode access time in parentheses. For PDL640G/127H/129H asynchronous access times: 53 = 55 ns; 63, 68 = 65 ns; 73 = 70 ns; 83, 88= 80 ns; 98 = 90 ns. speed designators ending in “3” indicate a 3 V (2.7–3.1 V) VIO range, while those ending in “8” indicate a 1.8 V (1.65–1.95 V) VIO range. Sim. R/W Architecture2 3.0 Volt-only Flash Memory (continued) Ordering Part Number1 Temp. Range E (48), F (48), S (44) C, I, E E (48), F (48), S (44), WB (48) C, I, E Device Number Sector 4 Mbit Am29DL400B T, B 8 Mbit Am29DL800B T, B 16 Mbit Am29DL161D/ 162D/163D/164D T, B 70, 90, 120 E (48), WC (48), PC (64) 32 Mbit Am29DL320G T, B6 70, 90, 120 32 Mbit Am29DL322G/ 323G/324G T, B 70, 90, 120 E (48), WD (63), WM (48) 64 Mbit Am29DL640G T, B6 70, 90 120 E (48), WH (63), PC (64) I, E 128 Mbit Am29DL642G T, B6 70, 90 MD (63) I B Burst Mode Am29BL802C 16 Mbit 16 Mbit Am29BL162C Am29PL160C B B Access Times (ns) Package (Pin/Ball Count)4 Density 8 Mbit Page Mode 3 70 80, 90, 120 70 90, 120 Am29PL320D T, B Split 1Mb/3Mb. Banks 1–2 (KB): [16,32,(4)8,32,16] [(6)64] 2.7–3.6 1 M x 8, 512 K x 16 Split 1Mb/7Mb. Bank 1–2 (KB): [16,32,(4)8,32,16] [(14)64] I 2.7–3.6 2 M x 8, 1 M x 16 SecSi Sector, WP#/ACC, CFI. 161 split 0.5/15.5Mb, 162 split 2/14Mb, 163 split 4/12Mb, 164 split 8/8Mb. Sector sizes (KB): (8)8,(31)64 E (48), WD (63), WM (48), PC (64) I, E 2.7–3.6 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] PC (64) I 2.7–3.6 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 2.7–3.6 8 M x 8, 4 M x 16 SecSi Sector, WP#/ACC, CFI. Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(8)8,(15)64]. 2.7–3.6 16 M x 8, 8 M x 16 Two Am29DL640G devices in a single package. 3.0–3.6 512 K x 16 5V tolerant I/O, 32 word sequential burst. Sector sizes (Kw): 8,4,4,48,(3)64,(2)128 Also available in KGD. 3.0–3.6 1 M x 16 5V tolerant I/O, 32 word sequential burst, CFI, also available in KGD. Sector sizes (Kw): 8,4,4,112,(7)128 I 3.0–3.6 2 M x 8, 1 M x 16 5V tolerant I/O, 16-byte page, CFI. Sector sizes (KB): 16,8,8,224,(7)256 I 2.7–3.6 2 M x 16, 1 M x 32 SecSi Sector, ACC, WP#, CFI, x32 bit data bus. Sector Sizes (Kw): 16,8,8,96,(15)128 C, I I, E I I E Z (56) I, E 65R (17)7 I 65R (18)7 E 70R (24), 90R (26), 120R (26)7 65R (25), 70R (25), 90R (30)7 60R (20), 70R (25)7 Additional Features, Sector Size/Count5 512 K x 8, 256 K x 16 65R (18)7 70R (24), 90R (26), 120R (26)7 Byte/Word Count x Bus Width 2.7–3.6 65R (17)7 90 (30), 120 (30)7 32 Mbit C, I VCC (V) Z (56) I, E E (48), S (44), SK (44) 3.0–3.6 WP (84) I 70 (25), 90 (35)7 2.7–3.6 Notes: 1. Contact AMD or an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. 2. Sim R/W = Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot. 4. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits. 6. This product has the Flexible Bank feature, which allows the device to be configured as a top or bottom boot device. Sector designators (T, B) are thus not included in part number. 7. The asynchronous access time is given first, followed by the burst (or page) mode access time in parentheses. 8. Part number designator not required for uniform sector. 7 8 Ultra Architecture NANDTM 3.0 Volt-only Flash Memory Ordering Part Number1 Density Device Number Sector2 Access Times (ns) 64 Mbit Am30LV0064D Uniform6 J407 1 Mbit Am29LV001B T, B 1 Mbit Am29LV010B Uniform6 2 Mbit Am29LV002B T, B 2 Mbit Am29LV200B T, B 45R 55, 70, 90 45R 55, 70, 90 55R 70, 90, 120 Package (Pin/Ball Count)3 Temp. Range VCC (V) Byte/Word Count x Bus Width E2 (40/44), F2 (40/44), WG (40) I 2.7–3.6 8Mx8 E (32), F (32), J (32) C 3.0–3.6 C, I, E 2.7–3.6 E (32), F (32), J (32) C 3.0–3.6 C, I, E 2.7–3.6 E (40), F (40) 55R 70 E (48), F (48), S (44) Conventional 90, 120 70 4 Mbit Am29LV004B T, B 4 Mbit Am29LV040B Uniform6 4 Mbit Am29LV400B T, B 8 Mbit Am29LV008B T, B 8 Mbit Am29LV081B Uniform6 90, 120 60R 70, 90, 120 55R 70, 90, 120 70R 90, 120 70 90, 120 70 8 Mbit Am29LV800B T, B 90, 120 16 Mbit Am29LV017D Uniform 16 Mbit Am29LV116D T, B 6 16 Mbit Am29LV160B T, B 16 Mbit Am29LV160D T, B 32 Mbit Am29LV033C Uniform6 32 Mbit Am29LV320D T, B E (40), F (40) E (32), F (32), J (32) E (48), F (48), S (44), WA (48) E (40), F (40) E (40), F (40) C, I 3.0–3.6 C, I, E 2.7–3.6 C, I 3.0–3.6 C, I 2.7–3.6 C, I, E 2.7–3.6 C, I C, I, E 2.7–3.6 C, I 3.0–3.6 C, I, E 2.7–3.6 C, I 3.0–3.6 C, I, E 2.7–3.6 C, I 3.0–3.6 C, I, E 2.7–3.6 C, I 3.0–3.6 C, I, E 2.7–3.6 E (48), F (48), S (44) C, I E (48), F (48), S (44) C, I, E Additional Features, Sector Size/Count5 5V tolerant I/O, 7 µs initial read, 50 ns sequential 1024 blocks, 1 block = 528 bytes x 16 pages 128 K x 8 Sector sizes (KB): 8,4,4,(7)16 128 K x 8 Sector size (KB): (8)16 256 K x 8 Sector sizes (KB): 16,8,8,32,(3)64 256 K x 8, 128 K x 16 Sector sizes (KB): 16,8,8,32,(3)64 512 K x 8 Sector sizes (KB): 16,8,8,32,(7)64 512 K x 8 Sector size (KB): (8)64 512 K x 8, 256 K x 16 Also available in KGD. Sector sizes (KB): 16,8,8,32,(7)64 1Mx8 Sector sizes (KB): 16,8,8,32,(15)64 1Mx8 Sector size (KB): (16)64 2.7–3.6 1 M x 8, 512 K x 16 Also available in KGD. Sector sizes (KB): 16,8,8,32,(15)64 2Mx8 Address don’t care, CFI. Sector size (KB):(32)64 WB (48) C, I E (40), F (40), WC (48) C, I 2.7–3.6 70, 90, 120 E (40), F (40) C, I 3.0–3.6 2Mx8 CFI. Sector sizes (KB): 16,8,8,32,(15)64 70R E (48), F (48), S (44), WC (48) C 3.0–3.6 C, I, E 2.7–3.6 2 M x 8, 1 M x 16 CFI. Sector sizes (KB): 16,8,8,32,(31)64, 0.32 µm process technology C, I, E 2.7–3.6 2 M x 8, 1 M x 16 CFI. Sector sizes (KB): 16,8,8,32,(31)64, 0.23 µm process technology 2.7–3.6 4Mx8 Address don’t care, ACC, CFI. Sector size (KB): (64)64 2.7–3.6 4 M x 8, 2 M x 16 SecSi Sector, WP#/ACC, CFI. Sector sizes (KB): (8)8, (63)64 70, 90, 120 80, 90, 120 70, 90, 120 70 E (48), F (48), S (44), WC (48) I 90, 120 E (40), F (40), WD (63) I, E 90, 120 E (48), WM (48) C, I Notes: 1. Contact AMD or an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. Products listed in italics are not yet introduced. 2. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot. 3. Pin/ball count provided in parenthesis is for information only, and is not included in the actual ordering part number. 4. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits. 5. This product has not yet been introduced; features may be pending, and specifications may be subject to change. Contact AMD or an AMD representative for more information. 6. Part number designator not required for uniform sector. 7. Am30LV family: In the part number, the designator indicates the percentage of good blocks instead of the access speed. Architecture 3.0 Volt-only Flash Memory (continued) Ordering Part Number1 Density Device Number Sector2 64 Mbit Am29LV065D U Access Times (ns) 90R, 101R 120R, 121R VCC Package (Pin/Ball Count)4 Temp. Range E (48), F (48), WH (63) I, E 90R5 H, L 64 Mbit 120R5 Conventional (continued) 90R U U 64 Mbit Am29LV641G H, L 101R (100 ns)5 5 53R (55 ns) 73 (70 ns)5 53R (55 ns) Am29LV641D H, L 73 (70 ns)5 101R (100 ns) 120R 128 Mbit Am29LV642D Am29LV652D U U 8Mx8 Address don’t care, SecSi Sector, ACC, CFI, VersatileIO. Sector size (KB): (128)64. 4 M x 16 SecSi Sector, WP#, ACC, CFI, VersatileIO. Sector size (Kw): (128)32. Package Z has WP#, no RY/BY#. Package WH & PC have RY/BY#, no WP#. 4 M x 16 SecSi Sector, WP#, ACC, CFI, VersatileIO. Sector size (Kw): (128)32. 4 M x 16 SecSi Sector, WP#, ACC, CFI, VersatileIO. Sector size (Kw): (128)32. 4 M x 16 SecSi Sector, WP#, ACC, CFI, VersatileIO. Sector size (Kw): (128)32. Device has WP#, but no RY/BY#. 1.8–2.9 3.0–3.6 I 3.0–5.0 1.8–2.9 WH (63), PC (64) 3.0–5.0 I, E WH (63), PC (64) I E (48), F (48) (WP#, no RY/BY#) I 1.8–2.9 3.0–3.6 3.0–3.6 2.7–3.6 2.7–3.6 3.0–3.6 3.0–3.6 2.7–3.6 2.7–3.6 3.0–5.0 I 5 5 90R (100 ns)5 12R (120 ns)5 90R (100 ns)5 12R (120 ns)5 1.8–2.9 E (48), F (48) 3.0–3.6 3.0–5.0 I, E 121R (120 ns)5 128 Mbit 1.8–2.9 Additional Features, Sector Size/Count 5 3.0–5.0 I, E 90R5 64 Mbit 3.0–5.0 Byte/Word Count x Bus Width 1.8–2.9 Z (56) 5 120R Am29LV640G 3.0–3.6 I 121R (120 ns)5 64 Mbit I VIO 3.0–5.0 101R (100 ns)5 121R (120 ns)5 Am29LV640D VCC 1.8–2.9 PA(64) I 3.0–3.6 3.0–5.0 8 M x 16 Two Am29LV640D devices in a single package. SecSi Sector, WP#, ACC, CFI, VersatileIO. 3.0–3.6 3.0–5.0 16 M x 8 Two Am29LV065D devices in a single package. Address don’t care, SecSi Sector, ACC, CFI, VersatileIO. I, E MA(63) I I, E Notes: 1. Contact an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. 2. Sector architecture: U = Uniform, T = Top boot, B = Bottom boot. 3. Pin count provided in parenthesis is for information only, and is not included in the actual ordering part number. 4. Features: WP# = Write protect input. CFI = Common Flash Interface. Address don’t care: Specific addresses during unlock cycles in command sequence are not required. Sector Size/Count: Sector counts are given in parentheses. KB = kilobytes. 5. Part numbers with 101R and 121R have VIO = 1.8–2.9 V. Part numbers with 90R and 120R have VIO = 3.0–5.0 V. 9 10 Low-Voltage Package Migration 1 Mb x8 2 Mb 4 Mb Am29LV010 Am29LV001 32 pin TSOP** 32 pin PLCC** 8 Mb 16 Mb 32 Mb 64 Mb 128 Mb Am29LV065 Am29LV652 Am29LV004 Am29LV040 2 40/48 pin TSOP 48/63 ball FBGA Am29LV004 Am29LV002 Am29LV004 1 Am29LV008/ Am29LV081 1 1 Am29DL800 Am29LV800 Am29SL800 1 Am29LV116/ Am29LV017 3 Am29LV033 1 Am29DS323 Am29DL32x Am29LV320 x8/x16 48 pin TSOP** Am29LV200 1 5 44 pin SO 56 pin SSOP Am29LV200 48/63 ball Fine-pitch BGA 64-ball Fortified BGA Am29DL400 Am29LV400 Am29DL400 Am29LV400 (6) Am29LV400 1 5 1 Am29DS163 Am29DL16x Am29LV160 Am29SL160 Am29DL800 Am29LV800 Am29LV160 Am29BL802 Am29BL162 Am29DL800 Am29LV800 Am29SL800 1 Am29DS163 Am29DL16x Am29LV160 Am29SL160 7 1,3 1,4 Am29DL640 Am29LV641 Am29LV640 Am29DS323 Am29DL32x Am29LV320 Am29DL640 Am29LV640 Am29BDS323 Am29BDS643 8 Am29LV642 **Compatible with 5-Volt Equivalents. (1) Migration may be to either/any indicated device (2) 40 to 48 pin migration (3) 48 to 63 ball migration (4) 3 pin change 5) 1 pin change 6) 1 pin change from LV400 to DL400 (7) 44 to 56 pin migration, 1 pin requires reroute to opposite side of package. (8) 63-ball Fine-pitch BGA to 64-ball Fortified BGA migration. See page 5 or publication number 26677 for MirrorBit drop-in compatibility. 5.0 Volt-only Flash Package Migration x8 32 pin TSOP 32 pin PLCC 32 pin PDIP 1 Mb Am29F010 2 Mb 4 Mb Am29F002(N)B Am29F004 Am29F040 Am29F200 Am29F400 40 pin TSOP 44 pin SO 8 Mb 16 Mb 32 Mb Am29F080 Am29F016 Am29F017 Am29F032 Am29F800 Am29F160 x8/x16 48 pin TSOP 44 pin PSOP 5 Volt-only Conventional Flash Memory Ordering Part Number1 Density Device Number Sector Access Times (ns) 45 1 Mbit Am29F010B Uniform4 55, 70 90, 120 2 Mbit Am29F002B, Am29F002NB T, B Package (Pin Count)3 Temp. Range P (32) C, I J (32), E (32), F (32) C, I, E P (32) C, I J (32), E (32), F (32) C, I, E P (32), J (32), E (32), F (32) C, I, E 55 P (32) C 55 J (32), E (32) C, I 70 P (32), J (32), E (32) C, I 90, 120 P (32), J (32), E (32) C, I, E E (48), F (48), S (44) C, I, E 45 2 Mbit 4 Mbit Am29F200B Am29F004B T, B T, B 50 C, I Am29F040B Uniform4 5 V±5% 55 J (32), E (32), F (32) C, I, E 70 J (32), E (32), F (32) C, I, E 90, 120, 150 P (32), J (32), E (32), F (32) C, I, E 45 4 Mbit Am29F400B T, B 5 V±5% 5 V±10% I, E 50, 55 55 C, I E (48), F (48), S (44) C, I, E C0, I0, E05 70, 90, 120, 150 C, I, E 55 8 Mbit Am29F080B Uniform4 70 8 Mbit Am29F800B T, B 55, 70, 90, 120, 150 16 Mbit Am29F016D Uniform4 16 Mbit Am29F017D Uniform4 16 Mbit Am29F160D T, B 32 Mbit Am29F032B Uniform4 C, I E (40), F (40), S (44) C, I E (48), F (48), S (44), WB (48) C, I, E 90, 120, 150 70 90, 120, 150 70 90, 120, 150 75 (70 ns) 90, 120 75 (70 ns) 90, 120, 150 C, I, E 256 K x 8 F002NB has no RESET# input. Sector sizes (KB): 16,8,8,32,(3)64 256 K x 8, 128 K x 16 Sector sizes (KB): 16,8,8,32,(3)64. Also available in KGD 512 K x 8 Sector sizes (KB): 16,8,8,32,(7)64 512 K x 8 Sector size (KB): (8)64 512 K x 8, 256 K x 16 Also available in KGD. Sector sizes (KB): 16,8,8,32,(7)64 5 V±10% I I Also available in KGD. Sector size (KB): (8)16 5 V±5% C, I, E J (32) 128 K x 8 5 V±10% 55 70 5 V±10% 5 V±5% 5 V±10% 5 V±5% 5 V±10% 5 V±5% 5 V±10% 1Mx8 1 M x 8, 512 K x 16 5 V±10% 2Mx8 Also available in KGD. Sector size (KB): (32)64 5 V±10% 2Mx8 Address don’t care. Sector size (KB): (32)64 C, I 5 V±5% C, I 5 V±10% 2 M x 8, 1 M x 16 WP#, CFI. Sector sizes (KB): 16,8,8,32,(31)64 4Mx8 Sector size (KB): (64)64 C, I, E E4 (40), F4 (40), E (48), F (48), C, I, E C, I C, I E (40), F (40), S (44) Address don’t care. Sector size (KB): (16)64 5 V±10% E4 (40), F4 (40), E (48), F (48), S (44) E (48), F (48) Additional Features, Sector Size/Count4 Organization 5 V±5% 55, 70, 90, 120 90, 120 4 Mbit Voltage Supply C, I 5 V±5% C, I, E 5 V±10% Also available in KGD. Sector sizes (KB): 16,8,8,32,(15)64 Notes: 1. Contact an AMD representative for availability. See Ordering Part Number Designators table and individual data sheets for details. 2. Pin count provided in parenthesis is for information only, and is not included in the actual ordering part number. 3. Features: WP# = Write protect input. CFI = Common Flash Interface. Address don’t care: Specific addresses during unlock cycles in command sequence are not required. Sector Size/Count: Sector counts are given in parentheses. KB = kilobytes. 4. Part number designator not required for uniform sector. 5. “0” after temperature range indicates VCC = 5.0 V ± 10%. 11 12 Ordering Part Number Designators Am29LV 640 D U 90R WH I OPTIONAL PROCESSING Blank = Standard Processing N = ESN devices E = Extended (–55°C to +125°C) TEMPERATURE RANGE C I = = Commercial (0°C to +70°C) Industrial (–40°C to +85°C) PACKAGE TYPE J = Rectangular Plastic Leaded Chip Carrier (PLCC) K = 80-pin Plastic Quad Flat Package (PQFP) (PQR080) P = Plastic Dual Inline Package (PDIP) S = 44-pin Small Outline (SO) Package (SO 044) SK = 44-pin Reverse Pinout Small Outline Package (SOR044) Z = 56-pin Shrink Small Outline Package (SSOP) (SSO056) Thin Small Outline Packages (TSOP): E = 32, 40, or 48-Pin Standard Pinout (TS 048) (for Am29F016/017 devices only, E = 48-pin, E4 = 40-pin) E2 = 40/44-pin Type-II Standard Pinout (TS 044) F = 32, 40, or 48-pin Reverse Pinout (TSR048) (for Am29F016/017 devices only, F = 48-pin, F4 = 40-pin) F2 = 40/44-pin Type-II Reverse Pinout (TSR044) Fine-Pitch Ball Grid Array Packages, 0.8 mm ball pitch (unless otherwise noted): MA = 63-ball, 11 x 12 mm body (FSA063) MD = 63-ball, 10.95 x 11.95 body (FSD063) VA = 44-ball, 9.2 x 8 mm body, 0.5 mm pitch (VDA044) VK = 80-ball, 11.5 x 9 mm body (VBB080) VM = 64-ball, 8 x 9 mm (VBD064) Fine-Pitch Ball Grid Array Packages (continued) WA = 48-Ball, 6 x 8 mm body (FBA048) WB = 48-Ball, 6 x 9 mm body (FBB048) WC = 48-Ball, 8 x 9 mm body (FBC048) WD = 63-Ball, 8 x 14 mm body (FBD063) WG = 40-Ball, 8 x 15 mm body (FBE040) WH = 63-Ball, 12 x 11 mm body (FBE063) WK = 47-Ball, 7 x 10 mm body, 0.5 mm ball pitch (FDD047) WL = 48-Ball, 11 x 10 mm body, 0.5 mm ball pitch (FDE048) WM = 48-Ball, 6 x 12 mm body (FBD048) WP = 84-Ball, 11 x 12 mm body (FBF084) WS = 80-Ball, 11 x 12 mm body (FBE080) Fortified Ball Grid Array Packages, 1.0 mm ball pitch (unless otherwise noted): PA = 64-Ball, 13 x 11 mm body (LSA064) PB = 80-Ball, 13 x 11 mm body (LAA080) PC = 64-Ball 13 x 11 mm body (LAA064) PE = 80-Ball, 10 x 15 mm body (LAB080) PG = 64-Ball, 18 x 12 mm body (LAC064) PH = 80-Ball, 13 x 11 mm body (LSB080) PI = 80-Ball, 11 x 12 mm body (LSC080) SPEED OPTION (tACC), VOLTAGE REGULATION 1.8 Volt Devices **(*) = 2 or 3 digits: (Am29SL, DS) Indicates speed in ns, VCC = 1.8–2.2 V **(*) = (Am29BDS) 2 or 3 characters indicate clock rate, asynchronous read access, handshaking type. See listing notes. 2.5 V Devices **(*) = (Am29BDD) 3 digits indicate initial burst or asynchronous read access 3 Volt MirrorBit Devices **(*)(R) = Two (or three) digits: 1 (or 2) represent speed in ns x 10. Last digit indicates VIO range. 0 = no VIO. 1: VIO = VCC. 3: VIO = 3 V. 5: VIO = 1.8 V. “R” indicates regulated voltage range 3 Volt non-MIrrorBit Devices **(*)R = 2 or 3 digits: Indicates speed in ns; device is full voltage range. “R” indicates regulated voltage range. *(*)1(R) = (Am29LV64xD/G) First two digits indicate speed in ns x 10. “1” indicates VIO < VCC; “R” indicates regulated voltage range ** = (Am29PDL) FIrst digit represents speed in ns x 10. Last digit indicates VIO range. 3: VIO = 3 V. 8: VIO = 1.8 V. 5 Volt Devices *(*)0 = Speed option ends in “0”: Indicates speed in ns. VCC = 5.0 V ±10% (4.5–-5.5 V) *5 = Speed option ends in “5”: Check table and/or data sheet for actual speed and voltage range. (Am29F400) If part number has a “0” after the temperature range, then VCC = 5.0 V ±10% (4.5–-5.5 V) SECTOR ARCHITECTURE AND SECTOR WRITE PROTECTION T B H = = = Top boot sector Bottom boot sector Uniform sector device, WP# protects highest addressed sector L = U/blank J40 = = Uniform sector device, WP# protects lowest addressed sector Uniform sector device (UltraNAND only) 100% usable blocks G M N = = = 0.17 µm thin-film technology 0.23 µm MirrorBit technology 0.13 µm MirrorBit technology PROCESS TECHNOLOGY B C D = = = 0.32 µm technology 0.32 µm thin-film technology 0.23 µm thin-film technology DENSITY, BUS WIDTH, AND SECTOR ORGANIZATION ***(*) = Density is as noted in table. Digits broadly give an indication of device density. Bus width and organization vary by family. FLASH MEMORY DEVICE FAMILY Am29BDS = Am29DS Am29PDS = = Am29SL Am29BDD = = Am29LV = 1.8 Volt-only, Simultaneous Read/Write, Burst Mode 1.8 Volt-only, Simultaneous Read/Write 1.8 Volt-only, Simultaneous Read/Write, Page Mode 1.8 Volt-only 2.5 Volt-only, Simultaneous Read/Write, Burst Mode 3 Volt-only (including MirrorBit) Am29DL Am29BL Am29PL Am29PDL = = = = Am30LV Am29F = = 3 Volt-only, Simultaneous Read/Write 3 Volt-only, Burst Mode 3 Volt-only, Page Mode 3 Volt-only, Simultaneous Read/Write, Page Mode 3 Volt-only, UltraNANDTM 5 Volt-only 1.8 Volt-only Flash Memory + SRAM in Multi-chip Packages (MCP) Ordering Part Number1 Architecture Simultaneous Read/Write, Burst Mode Flash + SRAM Simultaneous Read/Write, Page Mode Flash + SRAM Temp. Range FBGA Package Voltage Supply Bus Width (Flash, SRAM) D8, D9, C8, C93 I FLB093 1.65–1.95 V x16, x16 WP#, ACC. Separate address and data buses. Bank split 4 x 16Mb. Banks A–D (Kw): [(4)8,(31)32] [(32)32] [(32)32] [(4)8,(31)32] T, B D8, D9, C8, C93 I FSC093 1.65–1.95 V x16, x16 WP#, ACC. Separate address and data buses. Bank split 4 x 16Mb. Banks A–D (Kw): [(4)8,(31)32] [(32)32] [(32)32] [(4)8,(31)32] Am54BDS128AG T, B D8, D9, C8, C93 I FMA093 1.65–1.95 V x16, x16 WP#, ACC. Separate address and data buses. Each flash device has 4 banks of 16Mb. Banks A–D (Kw): [(4)8,(31)32] [(32)32] [(32)32] [(4)8,(31)32] 32 Mbit Flash + 4 Mbit SRAM Am41PDS3224D T, B 10,114 I FLB073 1.8–2.2 V x16, x8/x16 SecSi Sector, WP#/ACC, CFI. Bank split 4/28Mb. Banks 1–2 (Kw): [(8)4,(7)32] [(56)32] 32 Mbit Flash + 8 Mbit SRAM Am41PDS3228D T, B 10,114 I FLB073 1.8–2.2 V x16, x8/x16 SecSi Sector, WP#/ACC, CFI. Bank split 4/28Mb. Banks 1–2 (Kw): [(8)4,(7)32] [(56)32] Flash + SRAM Density Device Number Sector 64 Mbit Flash + 8 Mbit SRAM Am42BDS6408G T, B 64 Mbit Flash + 16 Mbit SRAM Am42BDS640AG 128 Mbit Flash + 16 Mbit SRAM Access Times (ns) Features & Sector/Bank Information (Flash devices only)5 Notes: 1. MCP physical packages are marked with an assigned number that does not reflect the part number that does not reflect the ordering part number. To identify the physical device, refer to the appropriate AMD data sheet. 2. Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Flash speed (clock/asynchronous/SRAM): D = 54 MHz/70 ns/70 ns; C = 40 MHz/85 ns/85 ns. 8 = 1.8 V VIO, reduced wait-state handshaking; 9 = 1.8 V VIO, standard handshaking. 4. Flash speed: 10 = 100 ns, 11 = 110 ns. SRAM speed: 10, 11 = 70 ns. 5. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits. Simultaneous Read/Write Flash (x8/x16) Architecture2 /Bus Width + SRAM (x8/x16) 3 Volt-only Flash Memory + SRAM in Multi-chip Packages (MCP) Ordering Part Number1 Flash/SRAM Density (Mbit) FBGA Package Voltage Supply I FLA069 2.7–3.3 V 161 split 0.5/15.5Mb, 162 split 2/14Mb, 163 split 4/12Mb, 164 split 8/8Mb. Sector sizes (KB): (8)8,(31)64 70, 85 I FLB073 2.7–3.3 V Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] T, B 70, 85 I FLB073 2.7–3.3 V 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 Am41DL3208G T, B4 70, 85 I FLB073 2.7–3.3 V Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 32/8 Am41DL3228G/ 3238G/3248G T, B 70, 85 I FLB073 2.7–3.3 V 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 64/8 Am41DL6408G T, B4 70, 716, 85 I FLB073 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. Device Number1 Sector Access Times (ns) Temp. Range 16/4 Am41DL1614D/ 1624D/1634D/1644D T, B 70, 85 32/4 Am41DL3204G T, B4 32/4 Am41DL3224G/ 3234G/3244G 32/8 Features & Sector/Bank Information (Flash devices only) Notes: 1. MCP physical packages are marked with an assigned number that does not reflect the part number that does not reflect the ordering part number. To identify the physical device, refer to the appropriate AMD data sheet. 2. Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits 4. This product has the Flexible Bank feature, which allows the device to be configured as a top or bottom boot device. Sector designator (T, B) is thus not included in part number. 5. Flash/SRAM speed: 71 = 70 ns/55 ns; 75 = 70 ns/55 ns. 13 14 Architecture2 /Bus Width Device Number1 Sector Access Times (ns) FBGA Package Temp. Range Voltage Supply 16/2 Am42DL1612D/ 1622D/1632D/1642D T, B 70, 85 FLA069 I 2.7–3.3 V 161 split 0.5/15.5Mb, 162 split 2/14Mb, 163 split 4/12Mb, 164 split 8/8Mb. Sector sizes (KB): (8)8,(31)64 16/4 Am42DL1614D/ 1624D/1634D/1644D T, B 70, 85 FLA069 I 2.7–3.3 V 161 split 0.5/15.5Mb, 162 split 2/14Mb, 163 split 4/12Mb, 164 split 8/8Mb. Sector sizes (KB): (8)8,(31)64 32/4 Am42DL3224G/ 3234G/3244G T, B 756, 70, 85 FLB073 I 2.7–3.3 V 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 64/2 Am42DL6402G T, B5 65, 70, 85, 90 FLB073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 64/4 Am42DL6404G T, B5 70, 85 FLB073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 64/16 Am42DL640AG T, B5 70, 716, 85 FSC073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 32/8 Am45DL3208G T, B5 70, 85 FLB073 I 2.7–3.3 V Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 32/8 Am45DL3228G/ 3238G/3248G T, B 70, 85 FLB073 I 2.7–3.3 V 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 64/8 Am45DL6408G T, B5 70, 85 FLB073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 32/32 Am49DL320BG T, B5 70, 85 FLB073 I 2.7–3.3 V Four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 32/32 Am49DL322BG/ 323BG/324BG T, B5 70, 85 FLB073 I 2.7–3.3 V 322 split 4/28Mb, 323 split 8/24Mb, 324 split 16/16Mb. Sector sizes (KB): (8)8,(63)64 64/16 Am49DL640AG T, B5 70, 85 FLJ073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 64/32 Am49DL640BG T, B5 70, 85 FLB073 I 2.7–3.3 V Four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 96/8 Am50DL9608G T, B5 70, 756 FTA073 I 2.7–3.3 V Combines 64 & 32 Mbit Flash. DL640G has four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. DL320G has four banks, split 4/12/12/4 Mb. Sector sizes (KB): [(8)8,(7)64] [(24)64] [(24)64] [(8)64] 128/32 Am50DL128BG T, B5 70, 85 FTA073 I 2.7–3.3 V Combines two 64 Mbit Flash. Each DL640G has four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 128/64 Am50DL128CG T, B5 70, 85 FTA088 I 2.7–3.3 V Combines two 64 Mbit Flash with a pSRAM. Each DL640G has four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 128/64 Am55DL128C8G T, B5 70, 85 FNA093 L 2.7–3.1 V Combines two 64 Mbit Flash, one FCRAM, and one pSRAM. Each DL640G has four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. 128/64 Am58DL128CDG T, B5 70, 85 FVC093 LI 2.7–3.3 V Combines two 64 Mbit Flash, one pSRAM, and one DiskOnChip device. Each DL640G has four banks, split 8/24/24/8Mb. Sector sizes (KB): [(8)8,(15)64] [(48)64] [(48)64] [(15)64,(8)8]. Sim R/W Flash + Sim R/W Flash + Pseudo SRAM + FastCycle RAM + DiskOnChip Pseudo SRAM (all x16) (all x16) Simultaneous Read/Write Flash (x8/x16) + Pseudo SRAM (x16) Simultaneous Read/Write Flash (x8/x16) + Pseudo SRAM (x8/x16) Flash/ SRAM Density (Mbit) Simultaneous Read/Write Flash (x8/x16) + SRAM (x16) 3 Volt-only Flash Memory + SRAM in Multi-chip Packages (MCP) (continued) Sector/Bank Information (Flash devices only)3 Notes: 1. MCP physical packages are marked with an assigned number that does not reflect the part number that does not reflect the ordering part number. To identify the physical device, refer to the appropriate AMD data sheet. 2. Sim R/W = Simultaneous Read/Write feature: Read from one bank while writing to any other bank. 3. Features: WP# = Write protect input. ACC = Programming acceleration input. SecSi Sector = Secured Silicon (unique/random ID). CFI = Common Flash Interface. Bank & Sector Size/Count: Bank contents are given in square brackets. Sector counts are given in parentheses. Kw = kilowords, KB = kilobytes, Mb = megabits 4. This product has not yet been introduced; features may be pending, and specifications may be subject to change. Contact AMD or an AMD representative for more information. 5. This product has the Flexible Bank feature, which allows the device to be configured as a top or bottom boot device. Sector designator (T, B) is thus not included in part number. 6. Flash/SRAM speed: 71 = 70 ns/55 ns; 75 = 70 ns/55 ns. Flash + SRAM MCP Ordering Part Number Designators Am 42 DL 640 A G T 85 I T PACKING METHOD T = 7” Tape and Reel S = 13” Tape and Reel L = Light Industrial (–30°C to +85°C) 85 = 85 ns Flash and SRAM TEMPERATURE RANGE I = Industrial (–40°C to +85°C) FLASH+SRAM SPEED OPTION (tACC) 70 71 = = 70 ns Flash and SRAM 70 ns Flash, 55 ns SRAM SECTOR ARCHITECTURE AND SECTOR WRITE PROTECTION T B = = Top boot sector Bottom boot sector Blank = Uniform sector Flexible Bank organization is configurable for top or bottom boot PROCESS TECHNOLOGY B C = = 0.32 µm technology 0.32 µm thin-film technology D G = = 0.23 µm thin-film technology 0.17 µm thin-film technology A B C C8 CD = = = = = 16 Mbit 32 Mbit 64 Mbit 64 Mbit SRAM and 8 Mbit pSRAM 64 Mbit SRAM and 128 Mbit DiskOnChip SRAM DENSITY 2 4 8 = = = 2 Mbit 4 Mbit 8 Mbit FLASH MEMORY DENSITY/BANK SPLIT RATIO 16x = 16 Mbit 32x = 32 Mbit x = 0 (4 banks, 1:4:4:1 ratio) x = 1 (2 banks, 1:31 ratio) x = 2 (2 banks, 1:7 ratio) x = 3 (2 banks, 1:3 ratio) x = 4 (2 banks, 1:1 ratio) 640 = 128 = AMD FLASH MEMORY ARCHITECTURE PACKAGE TYPE BDS = DL = PDS = Package designators are not included in MCP part numbers. See device listings in this publication for package types. Package type definitions for MCP are as follows: FLA069 = 69 balls, 8 x 11 mm body FLB073 = 73 balls, 8 x 11.6 mm body FLB093 = 93 balls, 8 x 11.6 mm body FLJ073 = 73 balls, 8 x 11.6 mm body FMA093 = 93 balls, 10 x 10 mm body FNA093 = 93 balls, 10 x 10 mm body FSC073 = 93 balls, 8 x 11.6 mm body FSC093 = 93 balls, 8 x 11.6 mm body FTA073 = 73 balls, 8 x 11.6 mm body FTA088 = 88 balls, 8 x 11.6 mm body FVC093 = 93 balls, 9 x 13 mm body 1.8 V Simultaneous Read/Write + Burst Mode 3 V Simultaneous Read/Write 1.8 V Simultaneous Read/Write + Page Mode FLASH +SRAM COMBINATIONS 41 42 45 49 50 55 58 = = = = = = = Flash (x8/x16) + SRAM (x8/x16) Flash (x8/x16) + SRAM (x16) Flash (x8/x16) + Pseudo SRAM (x8/x16) Flash (x8/x16) + Pseudo SRAM (x16) Stacked Flash (x8/x16) + Pseudo SRAM (x16) Flash + FastCycle RAM + SRAM (all x16) Stacked Flash + Pseudo SRAM + DiskOnChip AMD PRODUCTS 64 Mbit 128 Mbit All packages are Fine-pitch Ball Grid Arrays (BGAs), 0.8 mm ball pitch. Differences between package dimensions may also include body height and thickness, ball grid size, and ball height and diameter. Consult the physical dimensions section in the appropriate data sheet for more details. 15 16 Flash Memory in Known Good Die (KGD) form1,2 Waffle Pack Qty. (DP) Gel-Pak© Qty. (DG) Surftape™ Qty. (DT) Temp. Range Pad Count Voltage Supply (V) Die SIze (mm) Organization/ Additional Comments Density Part Number Sector Access Times (ns) 16 Mbit Am29BDD160G T, B 64C, 65A 140 66 1600 I, E, H 76 2.5–2.7 4.54 x 7.50 1 M x 16/512 K x 32. Simultaneous read/write and Burst mode. 8 Mbit Am29BL802C B 80R 125 336 1600 I, E, H 51 3.0–3.6 6.85 x 5.44 512 K x 16. Burst mode. 16 Mbit Am29BL162C B 80R 80 252 1600 I, E, H 52 3.0–3.6 6.85 x 7.72 1 M x 16. Burst mode. 3.55 x 3.51 256 K x 8, 128 K x 16. 4.70 x 3.56 512 K x 8, 256 K x 16. 2.5 V 2 Mbit Am29LV200B T, B 4 Mbit Am29LV400B T, B 60R 70, 90 120 3V 245 not avail. 2500 210 not avail. 2500 60R 43 2.7–3.6 C, I 70 80, 90, 120 5V C, I 3.0–3.6 3.0–3.6 C, I 43 2.7–3.6 C, I, E 8 Mbit Am29LV800B T, B 80, 90, 120 140 462 2500 C, I 44 2.7–3.6 3.56 x 7.09 1 M x 8, 512 K x 16. 1 Mbit Am29F010B Uniform3 90, 120 400 648 2500 C, I, E 30 4.5–5.5 2.28 x 4.04 128 K x 8. 2 Mbit Am29F200B T, B 245 486 2500 C, I, E 42 3.43 x 3.81 256 K x 8, 128 K x 16. 4 Mbit Am29F400B T, B 140 594 2500 C, I, E 43 3.42 x 5.02 512 K x 8, 256 K x 16. 75 (70 ns) 90, 120 75 (70 ns) 90, 120 4.75–5.25 4.5–5.5 4.75–5.25 4.5–5.5 8 Mbit Am29F800B T, B 90, 120 140 396 1600 C, I, E 44 4.5–5.5 3.43 x 7.42 1 M x 8, 512 K x 16. 16 Mbit Am29F016D Uniform3 120 100 294 1600 C, I 38 4.5–5.5 4.74 x 5.30 2 M x 8. Notes: 1. For additional product information, see the device listings in the tables for packaged devices. 2. Contact an AMD representative for minimum order quantity in Gel-Pak wafer tray packing (ordering designator is DW). 3. Part number designator not required for uniform sector. KGD Ordering Part Number Designators Am29LV 800 B T 90 DT C 1 DIE REVISION This number refers to the specific AMD manufacturing process and product technology. It is entered in the revision field of AMD standard product nomenclature. TEMPERATURE RANGE C = Commercial (0°C to +70°C) I = Industrial (–40°C to +85°C) PACKAGE TYPE DP = Waffle Pack (5-tray stack) DG = Gel-Pak Die Tray (6-tray stack) WJ = Wafer Jar (contact AMD for availability) E H = = DT = DW = Extended (–55°C to +125°C) Super Extended (–55°C to +145°C) Surftape (7” Tape and Reel) Gel-Pak Wafer Tray (contact AMD for minimum order quantity) SPEED OPTION (tACC), VOLTAGE REGULATION 2.5 Volt Devices *** = Digits indicate initial burst or asynchronous speed in ns; A = 40 MHz clock, C = 56 MHz clock. VCC = 2.5–2.7 V 3 Volt Devices **(*) = Digits indicate speed in ns; device is full voltage range, VCC = 2.7–3.6 V **(*)R = Digits indicate speed in ns, “R” indicates regulated voltage range VCC = 3.0–3.6 V 5 Volt Devices *(*)0 = Speed option ends in “0”: Indicates speed in ns. VCC = 5.0 V ±10% (4.5–-5.5 V) *5 = Speed option ends in “5”: Check table listing and/or data sheet for actual speed and voltage range. SECTOR ARCHITECTURE AND SECTOR WRITE PROTECTION T = Top boot sector B = Bottom boot sector PROCESS TECHNOLOGY B = 0.32 µm technology C = 0.32 µm thin-film technology = = 0.23 µm thin-film technology 0.17 µm thin-film technology D G DENSITY, BUS WIDTH, AND SECTOR ORGANIZATION ***(*) = Density is as noted in table. Digits broadly give an indication of device density. Bus width and organization vary by family. FLASH MEMORY DEVICE FAMILY Am29LV = 3 Volt-only Am29BL = 3 Volt-only, Burst Mode Am29F Am29BDD = = 5 Volt-only 2.5 Volt-only, Simultaneous Read/Write, Burst Mode