EM78612 Universal Serial Bus Microcontroller Series 1 General Description The EM78612 is a series of Universal Serial Bus 8-bit RISC Mask Rom microcontrollers. It is specifically designed for USB low speed device application and to support legacy device such as PS/2 mouse. The EM78612 also support one device address and two endpoints. With no firmware involved, these series of microcontrollers can automatically identify and decode Standard USB Command to EndPoint Zero. The EM78612 is implemented on a RISC architecture. It has five-level stack and eight interrupt sources. The amount of General Input/Output pins is up to 16. Each device has 112 bytes SRAM and is embedded with 4 bytes of E2PROM. The ROM size of the EM78612 is 12K. These series of chips have special features that accommodate your needs. These features are: Dual Clock mode which allows the device to run on very low power saving frequency Pattern Detecting Application function which is used in a serial transmission to count waveform width Width Modulation that can generate a duty-cycle-programmable signal AD converter with up to 10 bits resolution. 2 Features Low-cost solution for low-speed USB devices, such as mouse, joystick, and gamepad. USB Specification Compliance Universal Serial Bus Specification Version 1.1 USB Device Class Definition for Human Interface Device (HID), Firmware Specification Version 1.1 Support 1 device address and 1 endpoints USB Application USB protocol handling USB device state handling Identifies and decodes Standard USB commands to EndPoint Zero PS/2 Application Support Auto-detects PS/2 or USB port Built-in PS/2 port interface This specification may change without further notice. 1 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series Built-in 8-bit RISC MCU 5 level stacks for subroutine and interrupt 6 available interrupts 8-bit real time clock/counter (TCC) with overflow interrupt Built-in RC oscillator free running for WatchDog Timer and Dual clock mode Two independent programmable prescalers for WDT and TCC Two methods of power saving: 1. Power-down mode (SLEEP mode) 2. Low frequency mode. Two clocks per instruction cycle I/O Ports Up to 12 general purposes I/O pins grouped into two ports (Port 6 and 7). Up to 2 LED sink pins Each GPIO pin of Ports 6 & Port 7 has an internal programmable pull-high resistor (200K Ohms) Each GPIO pin wakes up the MCU from sleep mode by input state change Internal Memory Built-in 2048K*13 bits MASK ROM Built-in 80 bytes general purpose registers (SRAM) Built-in USB Application FIFOs. Operation Frequency Normal Mode: MCU runs on the external oscillator frequency Dual Clock Mode: MCU runs at the frequency of 256KHz (or 32KHz, 4KHz, 500Hz), emitted by the internal oscillator with the external ceramic resonator (or crystal) turned off to save power. Built-in 3.3V Voltage Regulator For MCU power supply Pull-up source for the external USB resistor on D-pin. Package Type 16 pin PDIP/SOP 18 pin PDIP/SOP 20 pin PDIP/SOP 20 pin SSOP This specification may change without further notice. 2 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 3 Applications This microcontroller is designed for USB low speed device application or non-USB embedded device. It is also suitable for PS/2 mouse application. 4 Pin Configuration EM78612C* EM78612A* P61 1● 16 P60/VPP P62 2 15 P64 P63 3 14 P65 P70 4 13 P71 P72 5 12 D+/P50 VSS 6 11 D-/P51 V3.3V 7 10 VDD OSCI 8 9 P60/VPP P61 P62 P63 P70 P72 N.A. VSS V3.3V OSCI OSCO 1● 20 P64 2 3 4 5 6 7 8 9 10 19 18 17 16 15 14 13 12 11 P65 P66 P67 P71 P73 D+/P50 D-/P51 VDD OSCO EM78612B* P60/VPP P61 P62 P63 P70 P72 VSS V3.3V OSCI 1● 18 P64 2 3 4 5 6 7 8 9 17 16 15 14 13 12 11 10 P65 P66 P67 P71 D+/P50 D-/P51 VDD OSCO This specification may change without further notice. 3 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 5 Pin Description Symbol I/O OSCI I OSCO I/O Function 6MHz / 12MHz ceramic resonator or crystal input. Return path for 6-MHz / 12MHz ceramic resonator or crystal. Used in programming the on-chip ROM. During normal operation, this pin is connected to Ground. VNN O 3.3V DC voltage output from internal regulator. This pin has to be tied to a 4.7μF capacitor. P60/VPP I P60 functins as an input pin only (no output) and can be used for AD function. For serial signal transmission application, the Pin P60 is used as a serial signal input pin. For detailed usage and function, refer to Section 8.8, Pattern Detecting Application of this Spec. P60 can be selected as pull high resistor or pull low resistor. P61 ~ P67 I/O 7 GIOP pins. The pull high resistors (200K Ohms) and pull low resistors (15K Ohm) are selected through pin programming. I/O Port7 offers up to 8 GIOP pins. The sink current of P70 & P71 are programmable for driving LED. Each pin has pull high resistors (200K Ohm) that can be selected through pin programming. I/O USB Plus data line interface or PS/2 line interface are user-defined through firmware setting. When this pin is used as a PS/2 line interface, it will generate an interrupt when its state changes. D- / P51 I/O USB Minus data line interface or PS/2 line interface are user-defined through firmware setting. This pin should be pulled-high with a 1.5K Ohm resistor to V3.3V pin for USB mode application. When this pin is used as a PS/2 line interface, it will generate an interrupt when its state changes. VDD - Connects to the USB power source or to a nominal 5V-power supply. Actual VDD range can vary between 4.4V and 5.2V. VSS - Connects to ground. V3.3V P70 ~ P73 D+ / P50 Table 7.1 Pin Descriptions This specification may change without further notice. 4 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 6 Function Block Diagram OSCI Built-in RC OSCO Reset & Sleep & Wake up Control WDT Timer V3.3 D+ 3.3V Regulator Oscillator Timing Control Prescaler WDT VDD Prescaler TCC R1 (TCC) D- R2 (PC) Transceiver ROM USB Device Controller Instruction register Stack1 Stack2 Stack3 Stack4 Stack5 R3 (Status) RAM ALU Interrupt Control Instruction Decoder R4 (RSR) ACC DATA & CONTROL BUS P50/D+/Clk P51/D-/Data I/O Port 5 I/O Port 6 P60 P61 P62 P63 P64 P65 P66 P67 I/O Port 7 P70 P71 P72 P73 Figure 7 EM78612 Series Function Block Diagram 7 Function Description The EM78612memory is organized into four spaces, namely; User Program Memory in 2048*13 bits MASK ROM space, Data Memory in 80 bytes SRAM space, and USB Application FIFOs (for EndPoint0 and EndPoint1). Furthermore, several registers are used for special purposes. 8.1 Program Memory The program space of the EM78612 is 2K bytes, and is divided into two pages. Each page is 1K bytes long. After Reset, the 12-bit Program Counter (PC) points to location zero of the program space. This specification may change without further notice. 5 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series It has two interrupt vectors, i.e., Interrupt Vectors at 0x0001 and USB Application Interrupt Vectors at 0x000A. The Interrupt Vector applies to TCC Interrupt, and Port 5 State Changed Interrupt. The USB Application Interrupt Vector is for USB EndPoint Zero Interrupt, USB Suspend Interrupt, USB Reset interrupt ,and USB Host Resume Interrupt. After an interrupt, the MCU will fetch the next instruction from the corresponding address as illustrated in the following diagram. After reset PC Address 0x0000 Reset Vector 0x0001 Interrupt Vector 0x000A USB Application Interrupt Vector Page 0 0x03FF 0x0400 Page 1 0x07FF 8.2 Data Memory The Data Memory has 80 bytes SRAM space. It is also equipped with USB Application FIFO space for USB Application. The Figure 8.1 (next page) shows the organization of the Data Memory Space. This specification may change without further notice. 6 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.2.1 Special Purpose Registers When the microcontroller executes instruction, specific registers are invoked for assistance, such as; Status Register which records the calculation status, Port I/O Control Registers which control the I/O pins’ direction, etc. The EM78612 series provides a lot more of other special purpose registers with different functions. There are 23 Special Operation Registers which are located from Address 0x00 to 0x0E in Bank0, and from Address 0x08 to 0x0F in Bank1. On other hand, 17 more Special Control Registers are available to control functions or I/O direction. These are arranged from Address 0x05 to 0x0F in Bank0, and from Address 0x08 to 0x0F in Bank1. Note that Special Control Registers can only be read or written by two instructions; IOR and IOW. To access registers from Bank1, the Special Purpose Registers Bank selector (R3[7]) should be set first. 00 01 02 03 04 R0 R1 R2 R3 R4 (Indirection Addressing Register) (Time Clock / Counter Register) (Program Counter) & Stack (Status Register) (RAM Select Register) 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 R5 (Data line I/O Register) R6 (Port 6 I/O Register) R7 (Port 7 I/O Register) R8 (Port6 wakeup pin selection Register) R9 (Port7 wakeup pin selection Register) RA (High Pattern Counter Register) RB (Low Pattern Counter Register) RC (USB Application Status Register) RD (USB Application FIFO address register) RE (USB Application FIFO data register) RF (Interrupt Status Register) IOC5 (Port 5 I/O Control Register) IOC6 (Port 6 I/O Control Register) IOC7 (Port 7 I/O Control Register) IOC8 (Sink Curent Control Register) IOC9 (PDA Control Register) IOCA (Operation mode Control Register) IOCB (Port 6 pull low Control Register) IOCC (Port 6 pull high Control Register) IOCD (Port 7 pull high Control Register) IOCE (Special Function Control Register) IOCF (Interrupt Mask Register) 00 01 10 11 General Purpose Register 1F EP0's FIFO EP1's FIFO Data Byte Pointer of EP0 Data Byte Pointer of EP1 20 General Purpose Registers (Bank0) Byte0 Byte1 Byte2 Byte3 Byte4 Byte5 Byte6 Byte7 General Purpose Registers (Bank1) 3F Fig 8.1 The Organization of EM78612 Data RAM This specification may change without further notice. 7 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.2.1.1 Operation Registers in Bank 0 The following introduces each of the Operation Registers under the Special Purpose Registers in Bank 0. These Operation Registers are arranged according to the order of registers’ address. Note that some registers are read only, while others are both readable and writable. R0 (Indirect Address Register) Default Value: (0B_0000_0000) R0 is not a physically implemented register. Its major function is to be an indirect address pointer. Any instruction using R0 as a pointer actually accesses the data pointed by the RAM Select Register (R4). R1 (Time / Clock Counter) Default Value: (0B_0000_0000) This register TCC, is an 8-bit timer or counter. It is readable and writable as any other register. After Power-on reset and WatchDog reset, the initial value of this register is 0x00. R2 (Program Counter & Stack) Default Value: (0B_0000_0000) The EM78612 Program Counter is an 11-bit long register that allows access to 2K bytes of Program Memory. The Program Counter is cleared after Power-on reset or WatchDog reset. The first instruction that is executed after a reset is located at Address 00h. CALL R3[5] R2[9] ~ R2[0] 0x0000 Reset Vector Stack 1 RET RETL RETI Stack 2 Stack 3 0x0001 Interrupt Vector Stack 4 0x000A USB Interrupt Vector Stack 5 Page 0 0x03FF 0x0400 Page 1 0x07FF This specification may change without further notice. 8 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series R3 (Status Register) Default Value:(0B_0001_1000) 7 6 5 4 3 2 1 0 - - PS0 T P Z DC C R3 [0] Carry flag. R3 [1] Auxiliary carry flag. R3 [2] Zero flag. It will be set to 1 when the result of an arithmetic or logic operation is zero. R3 [3] Power down flag. It will be set to 1 during Power-on phase or by “WDTC” command and cleared when the MCU enters into Power down mode. It remains in its previous state after WatchDog Reset. 1: Power-on. 0: Power down R3 [4] Time-out flag. It will be set to 1 during Power-on phase or by “WDTC” command. It is reset to 0 by WDT time-out. 1: WatchDog timer without overflow. 0: WatchDog timer with overflow. The various states of Power down flag and Time-out flag at different conditions are shown below: T P 1 1 0 1 1 1 1 *P 0 0 Condition Power-on reset WDTC instruction WDT time-out Power down mode Wakeup caused by port change during Power down mode *P: Previous status before WDT reset R3 [5] Page selection bit. This bit is used to select a page of program memory (refer to R2, Program Counter). PS0 Program Memory Page [Address] 0 Page 0 [0000-03FF] 1 Page 1 [0400-07FF] This specification may change without further notice. 9 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series R3 [6] General purpose registers. R4 (RAM Select Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 - BK0 Ad5 Ad4 Ad3 Ad2 Ad1 Ad0 R4 (RAM select register) contains the address of the registers. R4 [0~5] are used to select registers in 0x00h~0x3Fh. The address 0x00~0x1F is common space. After 0x1Fh, SRAM is grouped into four banks. R4 [6] are used to select register banks. To select a registers bank, refer to the following examples and the table below: R4=0111100 points to the register 0x3C in Bank 2. R4[6]Bk0 RAM Bank # 0 1 Bank 0 Bank 1 R5 (Data Line I/O Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 - - - - - - 1 0 D- or PS/2 D+ or PS/2 R5 [0] D+ line register or PS/2 clock interface register. R5 [1] D- line register or PS/2 data interface register. These two bits are BOTH writable and readable when the MCU is operating under PS/2 mode. But under USB Mode, these two bits cannot be accessed. R5 [2~7] General purpose registers. R6 (Port 6 I/O Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 P67 P66 P65 P64 P63 P62 P61 P60 R7 (Port 7 I/O Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 - - - - P73 P72 P71 P70 R8 (Port 6 Wake-up Pin Selection Register) Default Value: (0B_1111_1111) This specification may change without further notice. 10 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 7 6 5 4 3 2 1 0 /Wu87 /wu86 /Wu85 /Wu84 /Wu83 /Wu82 /Wu81 /Wu80 R8 [0 ~ 7] Select which of the Port 6 pins are to be defined to wake-up the MCU from sleep mode. When the state of the selected pins changes during sleep mode, the MCU will wake-up and execute the next instruction automatically. 1: Disable the wake-up function 0: Enable the wake-up function R9 (Port 7 Wake-up Pin Selection Register) Default Value: (0B_1111_1111) 7 6 5 4 3 2 1 0 - - - - /Wu73 /Wu72 Wu71 /Wu70 R9 [0,2,3] Select which of the Port 7 pins are to be defined to wake-up the MCU from sleep mode. When the state of the selected pins changes during sleep mode, the MCU will wake-up and execute the next instruction automatically. 1: Disable the wake-up function 0: Enable the wake-up function R9[1] Port 71 1: Enable the wake-up function 0: Disable the wake-up function RC (USB Application Status Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 EP0_W EP0_R EP1_R 0 Device_Resume Host_Suspend EP0_Busy Stall RC [0] Stall flag. When MCU receives an unsupported command or invalid parameters from host, this bit will be set to 1 by the firmware to notify the UDC to return a STALL handshake. When a successful SETUP transaction is received, this bit is cleared automatically. This bit is both readable and writable. RC [1] EP0 Busy flag. When this bit is equal to “1,” it indicates that the UDC is writing data into the EP0’FIFO or reading data from it. During this time, the firmware will avoid accessing the FIFO until UDC finishes writing or reading. This bit is only readable. RC [2] Host Suspend flag. If this bit is equal to 1, it indicates that USB bus has no traffic for the specified period of 3.0 ms. This bit will also be cleared automatically when a bus activity takes place. This bit is only readable. RC [3] Device Resume flag. This bit is set by firmware to general a signal to wake-up the USB host and is cleared as soon as the USB Suspend signal becomes low. This bit can only be set by firmware and cleared by the hardware. RC [4] Undefined Register. The default value is 0. This specification may change without further notice. 11 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series RC [5,6] EP0_R / EP1_R flag. These two bits inform the UDC to read the data written by firmware from the FIFO. Then the UDC sends the data to the host automatically. After UDC finishes reading the data from the FIFO, this bit is cleared automatically. Therefore, before writing data into the FIFO, the firmware will first check this bit to prevent overwriting the existing data. These two bits can only be set by the firmware and cleared by the hardware. RC [7] EP0_W flag. After the UDC completes writing data to the FIFO, this bit will be set automatically. The firmware will clear it as soon as it gets the data from EP0’s FIFO. Only when this bit is cleared that the UDC will be able to write a new data into the FIFO. Therefore, before the firmware can write a data into the FIFO, this bit must first be set by the firmware to prevent UDC from writing data at the same time. This bit is both readable and writable. This specification may change without further notice. 12 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series RD (USB Application FIFO Address Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 0 0 0 UAD4 UAD3 UAD2 UAD1 UAD0 RD [0~4] USB Application FIFO address registers. These five bits are the address pointer of USB Application FIFO. RD [5~7] Undefined registers. The default value is zero. RE (USB Application FIFO Data Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 UD7 UD6 UD5 UD4 UD3 UD2 UD1 UD0 RE (USB Application FIFO data register) contains the data in the register of which address is pointed by RD. RF (Interrupt Status Register ) Default Value: (0B_0000_0000) 7 - 6 - 5 4 Port 5 State USB Host Change_IF Resume_IF 3 USB Reset_IF 2 1 0 USB Suspend_IF EP0_IF TCC_IF RF [0] TCC Overflow interrupt flag. It will be set while TCC overflows, and is cleared by the firmware. RF [1] EndPoint Zero interrupt flag. It will be set when the EM78612 receives Vender /Customer Command to EndPoint Zero. This bit is cleared by the firmware. RF [2] USB Suspend interrupt flag. It will be set when the EM78612 finds the USB Suspend Signal on USB bus. This bit is cleared by the firmware. RF [3] USB Reset interrupt flag. It will be set when the host issues the USB Reset signal. RF [4] USB Host Resume interrupt flag. It is set only under Dual Clock mode when the USB suspend signal becomes low. RF [5] Port 5 State Change interrupt flag. It is set when the Port 5 state changes. 8.2.1.3 Control Registers in Bank 0 Special purpose registers for special control purposes are also available. Except for the Accumulator (A), these registers must be read and written by special instructions. One of these registers, CONT, can only be read by the instruction "CONTR" and written by "CONTW" instruction. The remaining special control registers can be read by the instruction "IOR" and written by the instruction "IOW." The following paragraphs only describe the general functions of the control registers. For more detailed description, refer to Sections 8.8 to 8.10 of this spec. This specification may change without further notice. 13 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series A (Accumulator Register) The accumulator is an 8-bit register that holds operands and results of arithmetic calculations. It is not addressable. CONT (Control Register) Default Value: (0B_0011_1111) 7 6 5 4 3 2 1 0 - /INT TSR2 TSR1 TSR0 PSR2 PSR1 PSR0 [NOTE] The CONT register can be read by the instruction "CONTR" and written by the instruction “CONTW." CONT [0~2] WatchDog Timer prescaler bits. These three bits are used as the prescaler of WatchDog Timer. CONT [3~5] TCC Timer prescaler bits. The relationship between the prescaler value and these bits are as shown below: PSR2/TSR2 PSR1/TSR1 PSR0/TSR0 0 0 0 1: 2 1: 1 0 0 1 1: 4 1: 2 0 1 0 1: 8 1: 4 0 1 1 1: 16 1: 8 1 0 0 1: 32 1: 16 1 0 1 1: 64 1: 32 1 1 0 1: 128 1: 64 1 1 1 1: 256 1: 128 This specification may change without further notice. 14 TCC Rate WDT Rate 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series CONT [6] Interrupt enable control bit. This bit toggles Interrupt function between enable and disable. It is set to 1 by the interrupt disable instruction "DISI" and reset by the interrupt enable instructions "ENI" or "RETI." 0: Enable the Interrupt function. 1: Disable the Interrupt function. CONT [7] Undefined register. The default value is one. IOC5 ~IOC7 (I/O Port [Port 5 ~ Port 7] Direction Control Registers Each bit controls the I/O direction of three I/O ports respectively. When these bits are set to 1, the relative I/O pins become input pins. Similarly, the I/O pins becomes outputs when the relative control bits are cleared. 1: Input direction. 0: Output direction. IOC5 (Data Line I/O Control Register) Default Value: (0B_0000_0011) 7 6 5 4 3 2 1 0 0 0 0 0 0 0 I/O I/O IOC5 [2~7] Undefined registers. The default value is 0. IOC6 (Port 6 I/O Control Register) Default Value: (0B_1111_1111) 7 6 5 4 3 2 1 0 P67 P66 P65 P64 P63 P62 P61 P60 IOC7 (Port 7 I/O Control Register) Default Value: (0B_1111_1111) 7 6 5 4 3 2 1 0 - - - - P73 P72 P71 P70 This specification may change without further notice. 15 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series IOC8 (Sink Current Control Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 0 0 Sink1.1 Sink1.0 0 0 Sink01 Sink0.0 IOC8 [0,1][4,5] are P70/P71 sink current control registers. Four levels are offered for selection: Sink0.1/1.1 Sink0.0/1.0 Sink Current 0 0 3mA±10% 0 1 6mA±10% 1 0 12mA±10% 1 1 30mA±10% The default current after Power-on reset is 3mA. IOCA (Operation Mode Control Register) Default Value: (0B_1100_0011) 7 6 5 4 3 2 1 0 Dual_Frq.1 Dual_Frq.0 0 0 0 0 PS/2 USB IOCA [0,1] These two bits are used to select the operation mode. EM78612 can auto-detect the type of port device being attached. After identifying the port, the firmware will set these two bits to enter into a proper operation mode. The definition of these two control registers is described in the table below. IOCA[1] IOCA[0] Operation Mode 0 0 Detect Mode 0 1 USB Mode 1 0 PS/2 Mode 1 1 USB Test Mode IOCA [2~5] Undefined registers. The default value is 0. IOCA [6,7] Select the operation frequency in Dual Clock mode. Four frequencies are available and can be chosen as Dual Clock mode for running the MCU program. This specification may change without further notice. Dual_Frq.1 Dual_Frq.0 Frequency 0 0 500Hz 0 1 4kHz 1 0 32kHz 1 1 256kHz 16 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series IOCB (Port 6 Pull-Low Control Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 PL67 PL66 PL65 PL64 PL63 PL62 PL61 PL60 IOCB [0~7] Select whether the 15K Ohm pull-low resistor of Port 6 individual pin is connected or not. 1: Enable the pull-low function. 0: Disable the pull-low function. IOCC (Port 6 Pull-High Control Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 PH67 PH66 PH65 PH64 PH63 PH62 PH61 PH60 IOCC [0~7] Select whether the 200K Ohm pull-high resistor of Port 6 individual pin is connected or not. 1: Enable the pull-high function. 0: Disable the pull-high function. IOCD (Port 7 Pull-High Control Register) Default Value: (0B_0000_0000) 7 6 5 4 3 2 1 0 - - - - PH73 PH72 PH71 PH70 IOCD [0~3] Select whether the 200K Ohm pull-high resistor of Port 7 individual pin is connected or not. 1: Enable the pull-high function. 0: Disable the pull-high function. IOCE (Special Function Control Register) Default Value: (0B_1111_0000) 7 6 5 4 3 2 1 0 /Dual clock /WUE WTE RUN 0 0 Op_Fre.1 Op_Fre.0 IOCE [0,1] Operation frequency control bit. The external crystal frequency (6MHz or 12MHz) can be divided by 1, 2, or 4, which can be programmed through these two bits for running the MCU program. F.1 F.0 Base Operation Freq. Divided by 0 0 1 0 1 2 1 0 3 1 1 4 This specification may change without further notice. 17 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series IOCE [2] Pattern Detecting Application Enable Bit. This bit enables the Pattern Detecting function which is used in the Serial Signal Transmission. When this feature is enabled, P60 becomes a serial input pin allowing one pattern detecting block, a counter, and two comparators to function. 1: enable 0: Disable IOCE [3] Undefined register. The default value is zero. IOCE [4] Run bit. This bit can be cleared by the firmware and set during power-on, or by the hardware at the falling edge of wake-up signal. When this bit is cleared, the clock system is disabled and the MCU enters into power down mode. At the transition of wake-up signal from high to low, this bit is set to enable the clock system. 1: Run mode. The EM78612 is working normally. 0: Sleep mode. The EM78612 is in power down mode. IOCE [5] WatchDog Timer enable bit. The bit disable/enables the WatchDog Timer. 1: Enable WDT. 0: Disable WDT. [NOTE] If the Code Option WTC bit is "0,” WDT is always disabled. IOCE [6] Enable the wake-up function as triggered by port-change. This bit is set by UDC. 1: Disable the wake-up function. 0: Enable the wake-up function. IOCE [7] Dual clock Control bit. This bit is used to select the frequency of system clock. When this bit is cleared, the MCU will run on very low frequency save power and the UDC will stop working. 1: Selects EM78612 to run on normal frequency. 0: Selects to run on slow frequency. This specification may change without further notice. 18 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series IOCF (Interrupt Mask Register) 7 6 - - Default Value: (0B_0000_0000) 5 4 Port 5 State USB Host Change_IE Resume_1E 3 2 1 0 USB Reset_IE USB Suspend_IE EP0_IE TCC_IE IOCF [0~5] TCC / EP0 / USB Suspend / USB Reset / USB Host Resume / Port 5 State Change enable bits. These eight bits respectively control the function of TCC interrupt, EP0 interrupt, USB Suspend interrupt, USB Reset interrupt, USB Host Resume interrupt, Port5 State Change interrupt, Individual interrupt is enabled by setting its associated control bit in the IOCF to "1". 1: Enable Interrupt. 0: Disable Interrupt. Only when the global interrupt is enabled by the ENI instruction that the individual interrupt will work. After DISI instruction, any interrupt will not work even if the respective control bits of IOCF are set to 1. The USB Host Resume Interrupt works only under Dual clock mode. This is because when the MCU is under sleep mode, it will be waked up by the UDC Resume signal automatically. 8.2.2 USB Application FIFOs For USB Application, EM78612 provides an 8-byte First-In-First-Out (FIFO) buffer for each endpoint. The buffer cannot be accessed directly. However, a corresponding Data Byte Pointer register for each endpoint is made available to address the individual byte of the FIFO buffer. The content of the individual byte will map to a special register. 8.3 I/O Ports The EM78612 has up to sixteen General Purposes I/O pins, which are classifies into two port groups; Port 6 and Port 7. Each pin has an internal resistor that can be individually selected by user. Notice that Port 6 is a input only port, that is, pins of Port6 can only be input direction. The following describes the important features of EM78612 I/O pins. 8.3.1 Programmable Large Current Port 7 has two pins; P70 and P71 that can drive large current of up to 30mA. The range of driving current is from 3mA to 30mA, which is programmable. Use IOC8 [0,1] and IOC8 [4,5] to control the sink current of P70/P71. The default current is 3mA. This specification may change without further notice. 19 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.3.2 Wakeup by Port Change Function Each of the GPIO pins in Port 6 and Port 7 can wakeup the MCU through signal change from input pin. This function is used to wake-up the MCU automatically from sleep mode. It also supports the remote wake-up function for USB application. Any of the Individual pins of Port 6 and Port 7 can be defined to wakeup the MCU by setting their respective bits, R8 and R9. This specification may change without further notice. 20 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.4 USB Application EM78612 is specially designed for USB device application and has many powerful functions that help the firmware to free itself from complex situation in various aspects of USB application. 8.4.1 Auto-Detect PS/2 or USB Mode When the EM78612 is connected to the bus, it will auto-detect and identify which type of bus (USB or PS/2) it is connected to. The conditions that influence auto-detect function are described below: 1. After a Power-on reset, the initial value of IOCA [0,1] is 0b00. Thus the operation mode is “Detect mode” and the D+ and D- I/O pins are internal pulled high by 200K Ohm to VDD. 2. The firmware checks the state of R5 [0,1]. If the state with which these two bits is 0x00, set the IOCA [0] to “1” to define the “USB mode.” Otherwise, set the IOCA [1] to “1,” to define “PS/2 mode.” 3. When the operation mode is defined as “USB mode,” the D- I/O pin is internal pulled high by a 1.5K Ohm resistor to 3.3V, which is output from a built-in regulator. 4. If the operation mode is in “PS/2 mode,” both of the PS/2 interface I/O pins are internal pulled high by a 4.7K Ohm resistor to VDD. {NOTE] If the auto-detect function is not used, the firmware should set the operation mode, either in USB mode or PS/2 mode, at the beginning of program. An additional mode, “USB Test Mode” is also available. This mode has no load on D+ and D- I/O pins, and can only be used in USB Application case. Therefore, an external 1.5K Ohm resistor is needed to pull up D- IO pin to 3.3V. Under “PS/2 mode,” both PS/2 pins are programmed to generate an interrupt. After setting the Port 5 State change to Interrupt Enable bit, the MCU will interrupt while the state of these two pins changes. 8.4.2 USB Device Controller The USB Device Controller (UDC) built-in in the EM78612 can interpret the USB Standard Command and response automatically without involving firmware. The embedded Series Interface Engine (SIE) handles the serialization and deserialization of actual USB transmission. Thus, a developer can concentrate his efforts more in perfecting the device actual functions and spend less energy in dealing with USB transaction. This specification may change without further notice. 21 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series The UDC handles and decodes most Standard USB commands defined in the USB Specification Rev1.1. If UDC receives an unsupported command, it will set a flag to notify MCU the receipt of such command. The Standard Commands that EM78612 supports includes; Clear Feature, Get Configuration, Get Interface, Get Status, Set Address, Set Configuration, Set Feature, and Set Interface. Each time UDC receives a USB command, it writes the command into EP0’s FIFO. Only when it receives unsupported command that the UDC will notify the MCU through interrupt. Therefore, EM78612 is very flexible under USB application because the developer can freely choose the method of decoding the USB command as dictated by different situation. 8.4.3 Device Address and Endpoints EM78612 supports one device address, three endpoints, EP0 for control endpoint, and EP1 & EP2 for interrupt endpoint. Sending data to USB host in EM78612 is very easy. Just write data into EP’s FIFO, then set flag, and the UDC will handle the rest. It will then confirm that the USB host has received the correct data from EM78612. 8.5 Reset The EM78612 provides three types of reset: (1) Power-on Reset, (2) WatchDog Reset, and (3) USB Reset. 8.5.1 Power-On Reset Power-on Reset occurs when the device is attached to power and a reset signal is initiated. The signal will last until the MCU becomes stable. After a Power-on Reset, the MCU enters into following predetermined states (see below), and then, it is ready to execute the program. a. The program counter is cleared. b. The TCC timer and WatchDog timer are cleared. c. Special registers and Special Control registers are all set to initial value. The MCU also has a low voltage detector that detects low output power condition. Whenever the output voltage of the 3.3V regulator decreases to below 2.2V, a reset signal is set off. 8.5.2 WatchDog Reset When the WatchDog timer overflows, it causes the WatchDog to reset. After it resets, the program is executed from the beginning and some registers will be reset. The UDC however, remains unaffected. 8.5.3 USB Reset When UDC detects a USB Reset signal on USB Bus, it interrupts the MCU, then proceed to perform the specified process that follows. This specification may change without further notice. 22 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.6 Power Saving Mode The EM78612 provides two options of power saving modes for energy conservation, i.e., Power Down mode, and Dual Clock mode. 8.6.1 Power Down Mode The EM78612 enters into Power Down mode by clearing the RUN register (IOCE[4]). During this mode, the oscillator is turned off and the MCU goes to sleep. It will wake up when signal from USB host is resumed, or when the WatchDog resets, or the input port state changes. If the MCU wakes up when I/O port status changes, I/O port direction should be set at input, then the port state is read. For example: : // Set the Port 6 to input port MOV A , 0XFF IOW PORT6 // Read the state of Port 6 MOV PORT6, PORT6 // Clear the RUN bit IOR 0XE AND A , 0B11101111 IOW 0XE : : If the MCU is awaken by a USB Resume signal, the next instruction will be executed, and one flag, RC[3] will be set to 1. 8.6.2 Dual Clock Mode The EM78612 has one internal oscillator for power saving application. Clearing the Bit IOCE [7] will enable the low frequency oscillator. At the same time, the external oscillator will be turned off. Then the MCU will run under very low frequency to conserve power. Four types of frequency are available for selection in setting Bits IOCA [6, 7]. The USB Host Resume Interrupt can only be used in this mode. If this interrupt is enabled, the MCU will be interrupted when the USB Suspend signal is detected on USB Bus. This specification may change without further notice. 23 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 8.7 Interrupt The EM78612 has two interrupt vectors, one is in 0x0001, and the other is in 0x000A. When an interrupt occurs while the MCU is running, it will jump to the interrupt vector (0x0001 or 0x000A) and execute the instructions sequentially from interrupt vector. RF is the interrupt status register that records the interrupt status in the relative flags/bits. The interrupt condition could be one of the following: 1. TCC Overflow When the Timer Clock / Counter Register (R1) overflows, the status flag RF[0] will be set to 1. Its interrupt vector is 0X0001. 2. EP0 Interrupt When the UDC successfully received a setup transaction from host to EndPoint0, the status flag RF[1] will be set to 1. Its interrupt vector is 0X000A. 3. USB Suspend When UDC detects a USB Suspend signal on USB bus, the status flag RF[2] will be set to 1. Its interrupt vector is 0X000A. 4. USB Reset When the UDC detects a USB Reset signal on USB bus, the status flag R[3] will be set to 1. Its interrupt vector is 0X000A. 5. USB Host Resume When UDC detects that the USB bus has left the Suspend condition, the status flag R[4] will be set to 1. Its interrupt vector is 0X000A. 6. Port 5 State Change When the input signals in Port 5 changes, the status flag RF[4] will be set to 1. Its interrupt vector is 0X0001. IOCF is an interrupt mask register which can be set individually bit by bit. While their respective bit is written to 0, the hardware interrupt will inhibit, that is, the EM78612 will not jump to the interrupt vector to execute instructions. But the interrupt status flags still records the conditions no matter whether the interrupt is masked or not. The interrupt status flags must be cleared by firmware before leaving the interrupt service routine and enabling interrupt. The global interrupt is enabled by the ENI (RETI) instruction and is disabled by the DISI instruction. 8 Absolute Maximum Ratings Symbol Temperature under bias Storage temperature Input voltage Output voltage This specification may change without further notice. 24 Min Max Unit 0 -65 -0.5 -0.5 70 150 6.0 6.0 ºC ºC V V 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series This specification may change without further notice. 25 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series 9 DC Electrical Characteristic (T = 25º, VDD=4.4~5.2V, VSS=0V) Symble Parameter Condition Min Type Max Unit 3.3V Regulator VRag Output voltage of 3.3v Regulator VResetL Low Power Reset detecting low Voltage VDD = 4.2V ~ 5.2V 3.0 3.3 - 3.6 V V VResetH Low Power Reset detecting high Voltage - V MCU Operation ±1 μA - - V - 1.0 V - - 10 mA - - 20 mA - - 50 μA 200 μA Input Leakage Current for input pins VIN= VDD,VSS VIHX Clock Input High Voltage VILX Clock Input Low Voltage ICC1 VDD operating supply current – Normal frequency operation mode ICC2 VDD operating supply current – Normal frequency operation mode ISB1 Operating supply current 1 – Power down mode ISB2 Operating supply current 2 – Low frequency mode VIH Input High Voltage VIL Input Low Voltage Port 5 1.4 V VIH Input High Voltage Port 6 & 7 1.4 V VIL Input Low Voltage Port 6 & 7 1.4 V VOH Output High Voltage (Port5) IDrive = 5.0mA 2.4 - - V VOL Output Low Voltage (Port5) ISink = 5.0mA - - 0.4 V VOH Output High Voltage (Port5 & Port 6 & P72~P77), OSCO) IDrive = 10.0mA 2.4 - - V VOL Output Low Voltage (Port5 & Port 6 & P72~P77, OSCO) ISink = 10.0mA - - 0.4 V IPH Input current with pull-high resister The input pin with internal pull-high resistor of Port6 or Port7 is connected to VSS. - 25 - μA IPL Input current with pull-low resister The input pin with internal pull-low resistor of Port6 is connected to VDD. - 330 - μA IIL - - OSCI 2.5 OSCI - Crystal type Freq. = 6MHz Output pins floating Crystal type Freq. = 12MHz Output pins floating All input and I/O pins at VDD Output pins floating WDT disabled RC oscillation type Freq. = 20kHz~50kHz Output pins floating - - GPIO Pins Port 5 1.4 - V USB Interface VOH Static Output High This specification may change without further notice. USB operation Mode 26 2.8 - 3.6 3/5/2003 (V1.0) V EM78612 Universal Serial Bus Microcontroller Series VOL Static Output Low - - 0.3 V VDI Differential Input Sensitivity 0.2 - - V VCM Differential Input Command Mode Range 0.8 - 2.5 V VSE Single Ended Receiver Threshold CIN Transceiver Capacitance VRG Output Voltage of Internal Regulator IPH Input current with pull-high resister (D-) USB operation Mode 0.8 - 2.0 V - - 20 pF 3.0 - 3.6 V mA Programmable Large Current ISink1 P70, P71 Output Sink Current ISink2 P70, P71 Output Sink Current ISink3 P70, P71 Output Sink Current ISink4 P70, P71 Output Sink Current This specification may change without further notice. VOUT = 0.4V, IOC8[0,1] or IOC8[4,5] = 00 VOUT = 0.4V, IOC8[0,1] or IOC8[4,5] = 01 VOUT = 0.4V, IOC8[0,1] or IOC8[4,5] = 10 VOUT = 0.4V, IOC8[0,1] or IOC8[4,5] = 11 27 -10% 3 +10% mA -10% 6 +10% mA -10% 12 +10% mA -10% 30 +10% mA 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series This specification may change without further notice. 28 3/5/2003 (V1.0) EM78612 Universal Serial Bus Microcontroller Series © 2002 ELAN Microelectronics Corporation All Rights Reserved Printed in Taiwan, ROC, 05/2002 The contents of this specification are subject to change without notice. ELAN Microelectronics assumes no responsibility for errors that may appear in this specification. ELAN Microelectronics makes no commitment to update, or to keep current, the information contained in this specification. The products described herein are not intended for use in life support appliances, devices, or systems. Use of ELAN Microelectronics products in such applications are not supported and is prohibited. NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BY ANY MEANS WITHOUT THE EXPRESS WRITTEN PERMISSION OF ELAN MICROELECTRONICS. ELAN MICROELECTRONICS CORPORATION Headquarters: Hong Kong Office: No. 12, Innovation Road 1, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: +886 3 5639977 Fax: +886 3 5639966 http://www.emc.com.tw Rm. 1005B, 10/F Empire Centre 68 Mody Road, Tsimshatsui Kowloon , HONG KONG Tel: +852 2838-8715 Fax: +852 2838-0497 This specification may change without further notice. 29 3/5/2003 (V1.0)