MM54HC365/MM74HC365 Hex TRI-STATEÉ Buffer MM54HC366/MM74HC366 Inverting Hex TRI-STATE Buffer MM54HC367/MM74HC367 Hex TRI-STATE Buffer MM54HC368/MM74HC368 Inverting Hex TRI-STATE Buffer General Description These TRI-STATE buffers are general purpose high speed inverting and non-inverting buffers that utilize advanced silicon-gate CMOS technology. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. All 4 circuits are capable of driving up to 15 low power Schottky inputs. The MM54/74HC366 and the MM54/74HC368 are inverting buffers, where as the MM54/74HC365 and the MM54/ 74HC367 are non-inverting buffers. The MM54/74HC365 and the MM54/74HC366 have two TRI-STATE control inputs (G1 and G2) which are NORed together to control all Connection Diagrams six gates. The MM54/74HC367 and the MM54/74HC368 also have two output enables, but one enable (G1) controls 4 gates and the other (G2) controls the remaining 2 gates. All inputs are protected from damage due to static discharge by diodes to VCC and ground. Features Y Y Y Y Y Typical propagation delay: 15 ns Wide operating voltage range: 2V – 6V Low input current: 1 mA maximum Low quiescent current: 80 mA maximum (74 Series) Output drive capability: 15 LS-TTL loads Dual-In-Line Packages/Top Views TL/F/5209 – 1 Order Number MM54HC365 or MM74HC365 TL/F/5209 – 3 Order Number MM54HC367 or MM74HC367 TL/F/5209 – 2 Order Number MM54HC366 or MM74HC366 TL/F/5209 – 4 Order Number MM54HC368 or MM74HC368 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5209 RRD-B30M105/Printed in U. S. A. MM54HC365/MM54HC366/MM54HC367/MM54HC368/ MM74HC365/MM74HC366/MM74HC367/MM74HC368 January 1988 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) DC Input or Output Voltage (VIN, VOUT) b 0.5 to a 7.0V Supply Voltage (VCC) b 1.5 to VCC a 1.5V DC Input Voltage (VIN) b 0.5 to VCC a 0.5V DC Output Voltage (VOUT) g 20 mA Clamp Diode Current (IIK, IOK) g 35 mA DC Output Current, per pin (IOUT) g 70 mA DC VCC or GND Current, per pin (ICC) b 65§ C to a 150§ C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temp. (TL) (Soldering 10 seconds) 260§ C Operating Temp. Range (TA) MM74HC MM54HC Min 2 Max 6 0 VCC Units V V b 40 b 55 a 85 a 125 §C §C 1000 500 400 ns ns ns Input Rise or Fall Times VCC e 2.0V (tr, tf) VCC e 4.5V VCC e 6.0V DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA e 25§ C Typ 74HC 54HC TA eb40 to 85§ C TA eb55 to 125§ C Units Guaranteed Limits VIH Minimum High Level Input Voltage 2.0V 4.5V 6.0V 1.5 3.15 4.2 1.5 3.15 4.2 1.5 3.15 4.2 V V V VIL Maximum Low Level Input Voltage** 2.0V 4.5V 6.0V 0.5 1.35 1.8 0.5 1.35 1.8 0.5 1.35 1.8 V V V VOH Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA 2.0V 4.5V 6.0V 2.0 4.5 6.0 1.9 4.4 5.9 1.9 4.4 5.9 1.9 4.4 5.9 V V V 4.5V 6.0V 4.2 5.7 3.98 5.48 3.84 5.34 3.7 5.2 V V 2.0V 4.5V 6.0V 0 0 0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V V V VIN e VIH or VIL lIOUTl s6.0 mA lIOUTl s7.8 mA 4.5V 6.0V 0.2 0.2 0.26 0.26 0.33 0.33 0.4 0.4 V V VIN e VCC or GND VIN e VIH or VIL lIOUTl s6.0 mA lIOUTl s7.8 mA VOL Maximum Low Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA IIN Maximum Input Current 6.0V g 0.1 g 1.0 g 1.0 mA IOZ Maximum TRI-STATE Output VOUT e VCC or GND 6.0V Leakage Current G e VIH g 0.5 g 5.0 g 10 mA ICC Maximum Quiescent Supply Current 8.0 80 160 mA VIN e VCC or GND IOUT e 0 mA 6.0V Note 1: Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C. Note 4: For a power supply of 5V g 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC e 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. **VIL limits are currently tested at 20% of VCC. The above VIL specification (30% of VCC) will be implemented no later than Q1, CY’89. 2 AC Electrical Characteristics MM54HC365/MM74HC365 VCC e 5V, TA e 25§ C, tr e tf e 6 ns Symbol Parameter Conditions Typ Guaranteed Limit Units 15 22 ns tPHL, tPLH Maximum Propagation Delay CL e 45 pF tPZH, tPZL Maximum Output Enable Time RL e 1 kX CL e 45 pF 29 40 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 5 pF 25 36 ns AC Electrical Characteristics MM54HC365/MM74HC365 VCC e 2.0–6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions 74HC TA eb40 to 85§ C TA e 25§ C VCC Typ 54HC TA eb55 to 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 35 45 14 17 11 15 105 135 24 29 19 24 130 168 30 36 24 30 150 205 36 45 28 36 ns ns ns ns ns ns tPZH, tPZL Maximum Output Enable Time RL e 1 kX CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 90 98 31 38 25 29 230 245 44 53 35 41 287 306 55 66 43 51 345 367 66 80 52 62 ns ns ns ns ns ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 2.0V 4.5V 6.0V 58 26 22 175 44 37 218 55 46 260 66 55 ns ns ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 2.0V 4.5V 6.0V 25 7 6 60 12 10 75 15 13 90 18 15 ns ns ns CPD Power Dissipation Capacitance (Note 5) Any Enabled A Input Any Disabled A Input 45 pF 8 pF CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 10 20 20 20 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Truth Table ’HC365 Inputs Output G1 G2 A Y H X L L X H L L X X H L Z Z H L 3 AC Electrical Characteristics (Continued) MM54HC366/MM74HC366 VCC e 5V, TA e 25§ C, tr e tf e 6 ns Symbol Parameter Conditions Typ Guaranteed Limit Units 12 18 ns tPHL, tPLH Maximum Propagation Delay CL e 45 pF tPZL, tPZH Maximum Output Enable Time RL e 1 kX CL e 45 pF 29 40 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 5 pF 25 36 ns AC Electrical Characteristics MM54HC366/MM74HC366 VCC e 2.0 – 6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions 74HC TA eb40 to 85§ C TA e 25§ C VCC Typ 54HC TA eb55 to 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 33 43 12 16 10 14 82 107 19 26 16 22 102 134 24 32 20 27 125 160 30 39 24 33 ns ns ns ns ns ns tPZH, tPZL Maximum Output Enable Time RL e 1 kX CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 90 98 31 38 25 29 230 245 44 53 35 41 287 306 55 66 43 51 345 367 66 80 52 62 ns ns ns ns ns ns ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 2.0V 4.5V 6.0V 58 26 22 175 44 37 218 55 46 260 66 55 ns ns ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 2.0V 4.5V 6.0V 25 7 6 60 12 10 75 15 13 90 18 15 ns ns ns CPD Power Dissipation Capacitance (Note 5) Any Enabled A Input Any Disabled A Input 45 pF 6 pF CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 10 20 20 20 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Truth Table ’HC366 Inputs Output G1 G2 A Y H X L L X H L L X X H L Z Z L H 4 AC Electrical Characteristics (Continued) MM54HC367/MM74HC367 VCC e 5V, TA e 25§ C, tr e tf e 6 ns Symbol Parameter Conditions Typ Guaranteed Limit Units 13 22 ns tPHL, tPLH Maximum Propagation Delay CL e 45 pF tPZL, tPZH Maximum Output Enable Time RL e 1 kX CL e 45 pF 23 37 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 5 pF 25 33 ns AC Electrical Characteristics MM54HC367/MM74HC367 VCC e 2.0–6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions TA e 25§ C VCC Typ 74HC TA eb40 to 85§ C 54HC TA eb55 to 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 35 45 14 17 11 15 105 135 24 29 19 24 130 168 30 36 24 30 150 205 36 45 28 36 ns ns ns ns ns ns tPZH, tPZL Maximum Output Enable Time RL e 1 kX CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 69 75 24 29 22 26 172 187 38 46 35 42 216 233 47 57 43 52 250 280 57 69 52 63 ns ns ns ns ns ns ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 2.0V 4.5V 6.0V 47 22 19 117 35 31 146 44 39 220 52 46 ns ns ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 2.0V 4.5V 6.0V 25 7 6 60 12 10 75 15 13 90 18 15 ns ns ns CPD Power Dissipation Capacitance (Note 5) Any Enabled A Input Any Disabled A Input 45 pF 8 pF CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 10 20 20 20 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Truth Table ’HC367 Inputs Output G A Y H L L X H L Z H L 5 AC Electrical Characteristics (Continued) MM54HC368/MM74HC368 VCC e 5V, TA e 25§ C, tr e tf e 6 ns Symbol Parameter Conditions Typ Guaranteed Limit Units 11 18 ns tPHL, tPLH Maximum Propagation Delay CL e 45 pF tPZL, tPZH Maximum Output Enable Time RL e 1 kX CL e 45 pF 23 37 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 5 pF 19 33 ns AC Electrical Characteristics MM54HC368/MM74HC368 VCC e 2.0 – 6.0V, CL e 50 pF, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter Conditions TA e 25§ C VCC Typ 74HC TA eb40 to 85§ C 54HC TA eb55 to 125§ C Units Guaranteed Limits tPHL, tPLH Maximum Propagation Delay CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 33 43 12 16 10 14 82 107 19 26 16 22 102 134 24 32 20 27 125 160 30 39 24 33 ns ns ns ns ns ns tPZH, tPZL Maximum Output Enable Time RL e 1 kX CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2.0V 2.0V 4.5V 4.5V 6.0V 6.0V 69 75 24 29 22 26 172 187 38 46 35 42 216 233 47 57 43 52 250 280 57 69 52 63 ns ns ns ns ns ns ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 2.0V 4.5V 6.0V 47 22 19 117 35 31 146 44 39 220 52 46 ns ns ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 2.0V 4.5V 6.0V 25 7 6 60 12 10 75 15 13 90 18 15 ns ns ns CPD Power Dissipation Capacitance (Note 5) Any Enabled A Input Any Disabled A Input 45 pF 6 pF CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Input Capacitance 10 20 20 20 pF Note 5: CPD determines the no load dynamic power consumption, PD e CPD VCC2 f a ICC VCC, and the no load dynamic current consumption, IS e CPD VCC f a ICC. Truth Table ’HC368 Inputs Output G A Y H L L X H L Z L H 6 Logic Diagrams MM54HC365/MM74HC365 MM54HC366/MM74HC366 TL/F/5209 – 5 TL/F/5209 – 6 MM54HC367/MM74HC367 MM54HC368/MM74HC368 TL/F/5209 – 7 TL/F/5209 – 8 7 MM54HC365/MM54HC366/MM54HC367/MM54HC368/ MM74HC365/MM74HC366/MM74HC367/MM74HC368 Physical Dimensions inches (millimeters) Order Number MM54HC365J, MM54HC366J, MM54HC367J, MM54HC368J, MM74HC365J, MM74HC366J, MM74HC367J, or MM74HC368J, NS Package J16A Order Number MM74HC365N, MM74HC366N, MM74HC367N, or MM74HC368N NS Package N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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