Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Features
• Package: 16-pin SOIC
• 2M~10MHz crystal oscillator
General Description
• ASK Modulation & Demodulation Capability
The PT8A300, PT8A301, PT8A303 and PT8A304
• One On-Chip D/A Converter (4 Bits) (PT8A300)
interface circuits for gas water heater employ ASK
• Two On-Chip D/A Converters (4 Bits) (PT8A301,
(Amplitude Shift Keying) Modulation technology.
PT8A303 and PT8A304)
They are strong in interference resistance and of low
• +5V Single Power Supply
noise. The device functions are shown in Table 1.
• 1 On-Chip Analog Switch (PT8A300) or 2 OnChip Analog Switches (PT8A301/PT8A303/304)
Table 1
F u n ct ion
Sin e Wave O u t p u t
Det ect Wave
Out
F r eq u en cy
Device
SO UT
SO UT
F O UT
√
fOSC or fOSC/2*
√
fOSC
√
P T 8A300
P T 8A301
√
√
P T 8A303
√
√
P T 8A304
fOSC/16 or fOSC/32**
* Under control of FCONT. See Table 4.
O n -C h ip C on t r ol Swit ch
ASK C a r r ier
F r iq u en cy
Nu mb er
of
Swit ch
fOSC/32
1
fOSC/16
2
fOSC/16
2
fOSC/16 or fOSC/32**
2
DO UT DO UT SC T L SC T L E xt er n a l
√
√
√
√
√
√
√
** Under control of FSEL. See Table 3 for pin description of FSEL.
Block Diagram
Figure 1. Block Diagram of PT8A300
OSCI
Oscillator
OSCO
VCC
1/2 Divider
GND
FCONT
FOUT
Output Buffer
SCTL
Input Modulation
Signal
16 Frequency
Divider
Sine Wave Data
Generator
D/A Converter
(4 Bits)
SOUT
SW_In
RESET
OFFSET
+
Amplifier
AMP_In
-
DOUT
PT0063(12/01)
SW_Out
SWCONT
Reset Input
Zero Crossing
Detect
Frequency Range
Detect Window
Waveform Rectify
Sig Width Range
Detect Window
Output Buffer
1
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Figure 2. Block Diagram of PT8A301, PT8A303 and PT8A304
FSEL (PT8A304)
OSCI
1/2 Divider
(PT8A304)
Oscillator
OSCO
16 Frequency
Divider
VCC
GND
FOUT
(PT8A301)
Output Buffer
Input Modulation
Signal
SCTL
(PT8A301/304)
SCTL
(PT8A303)
RESET
Sine Wave Data
Generator
D/A Converter
(4 Bits)
SOUT
D/A Converter
(4 Bits)
SOUT
SW1_In
SW1_Out
Reset Input
OFFSET
+
Amplifier
AMP_In
-
SW2_In
SW2_Out
Zero Crossing
Detect
Frequency Range
Detect Window
Waveform Rectify
DOUT
Output Buffer
DOUT
(PT8A303)
Output Buffer
Sig Width Range
Detect Window
Package and Pin Assignment
PT8A300W
16-Pin SOIC
OSCI
OSCO
FOUT
FCONT
NC
OFFSET
AMP_In
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PT8A301W
16-Pin SOIC
OSCI
OSCO
FOUT
SCTL
RESET
OFFSET
AMP_In
GND
VCC
SW_Out
SW_In
SOUT
SWCONT
RESET
SCTL
DOUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
VCC
SW1_Out
SW1_In
SOUT
SOUT
SW2_In
SW2_Out
DOUT
PT8A304W
16-Pin SOIC
PT8A303W
16-Pin SOIC
OSCI
OSCO
DOUT
DOUT
RESET
OFFSET
AMP_In
GND
1
2
3
4
5
6
7
8
OSCI
OSCO
FSEL
SCTL
RESET
OFFSET
AMP_In
GND
VCC
SW1_Out
SW1_In
SOUT
SOUT
SW2_In
SW2_Out
SCTL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VCC
SW1_Out
SW1_In
SOUT
SOUT
SW2_In
SW2_Out
DOUT
Top View
PT0063(12/01)
2
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Pin Description
Table 2. Pin Description
P in No
P in Na me
Typ e
1
OSCI
I
2
OSCO
O
FOUT
O
Cycle frequency output (under control of Pin 4 for PT8A300W, see
Table 4)
FSEL
I
Select ASK carrier frequency and SOUT frequency. See Table 3 for
details.
4
FCONT
I
Controls output frequency on pin 3 of PT8A300W, see description
of FOUT pin.
5
NC
300
301
303
304
1
1
1
2
2
2
3
3
3
Descr ip t ion
Connects to oscillation component. When use external clock, leave
OSCO unconnected.
No connection
6
6
6
6
OFFSET
O
Offset pin
7
7
7
7
AMP_In
I
Amplifier input
8
8
8
8
GND
3
9
9
4
DOUT
O
Demodulation signal Output ("H" active, "L" inactive)
DOUT
O
Inverse demodulation signal output ("L" active, "H" inactive)
SCTL
I
Analog sine wave output enable ("H" enable, "L" disable)
4
SCTL
I
Analog sine wave output enable ("L" enable, "H" disable)
5
RESET
I
Reset
SWCONT
I
Controls analog switch, a LOW will close the analog switch.
9
9
10
4
11
5
5
12
13
Ground Ground of the device
13
13
13
SOUT
O
Sine wave output
12
12
12
SOUT
O
Inverse sine wave output (Under control of pin 3 for PT8A304W,
see Table 3).
14
SW_In
I
15
SW_Out
O
Analog switch input and output
14
14
14
SW1_In
I
15
15
15
SW1_Out
O
11
11
11
SW2_In
I
10
10
10
SW2_Out
O
16
16
16
VCC
Power
Analog switch 1 input and output
Analog switch 2 input and output
16
PT0063(12/01)
Power supply
3
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Also, there is a delay Td(off) between SCTL(or SCTL) getting
inactive and the turning off of sine wave. Refer to Figure 4.
Td (Off) ≤ 2 Cycles of Master Clock
Functional Description
Modulation
A built-in analog switch(es) is(are) employed to control the
external sine wave output buffer.
Sine wave from the SOUT pin is fOSC/32 (PT8A300) or fOSC/16
(PT8A301 and PT8A303) in frequency. For PT8A304, the
SOUT/SOUT frequency is fOSC/16 or fOSC/32, depending on
FSEL pin. See Table 3.
Demodulation
The frequency of input signal will be detected to judge if it is
within the Frequency Range Detection Window, i.e., 1/14 fOSC
~ 1/18 fOSC for PT8A301, 303 and 304 (FSEL = 0), 1/28 fOSC ~ 1/
36 fOSC for PT8A300 and 304 (FSEL = 1). If the signal is within
the window, the signal will be judged by Signal Width Detection Window to see if the frequency-valid signal follows the
criterion, i.e., the number of continuous cycles more than 9 (in
fOSC/32 for PT8A300 and 304 when FSEL = 1, in fOSC/16 for
PT8A301, 303 and 304 when FSEL = 0). If the effective cycle
number reaches or exceeds 9, the DOUT will be low. If not, the
output of DOUT will be high.
Table 3
F SE L
ASK C a r r ier F r eq .
SO UT /SO UT
L
fOSC/16
fOSC/16
H
fOSC/32
fOSC/32
Output of SOUT/SOUT is controlled by SCTL for PT8A303
and SCTL for PT8A300/301/304.
There is a delay Td (on) between the SCTL (or SCTL) getting
active and the valid output of sine wave:
Td (On) ≤ 2 Cycles of Master Clock,
where the Master Clock is in fOSC for the PT8A301 and 303, in
fOSC/2 for the PT8A300, and in fOSC (FSEL = 0) or fOSC/2 (FSEL=1)
for PT8A304.
In this way fluctuation during the detection cycles can be
filtered as long as the fluctuation signal is ether out of the
Signal Width Detecting or out of the Frequency Range Detection Window. See Figure 5.
Figure 4. Modulation Timing
V IH
SCTL
(PT8A300/301/304)
V IL
V IH
SCTL
(PT8A303)
V IL
SOUT
(PT8A301/303/304)
SOUT
(PT8A300/301/
303/304)
Td (Off)
Td (On)
Figure 5: Detection Flow Chart
Frequency Range
Detection
Window
PT0063(12/01)
Signal Width
Detection
Window
4
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Output Frequency FOUT
The FOUT frequency of PT8A301 is fOSC. No FOUT pin for
PT8A303 and 304.
FOUT of PT8A300 is controlled by the FCONT input (see
Table 4).
Reset Status
Table 4. FOUT of PT8A300
F C O NT
F O UT
SO UT
H
fOSC/2
fOSC/32
L
fOSC
fOSC/32
After reset, DOUT = 1, DOUT = 0, the SOUT and SOUT are
fixed in middle potential (about ½ VCC). For effective reset, the
reset pulse should hold for over 3 clock cycles of fOSC. See Fig
6. The SOUT, SOUT and FOUT are in high impedance during
reset.
Figure 6. Reset Timing Diagram
RESET
> 3 Cycles of f O S C
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Storage Temperature ...................................................... -55oC to +125oC Stresses greater than those listed under MAXIMUM
Ambient Temperature with Power Applied ...................... -20oC to +85oC RATINGS may cause permanent damage to the
Supply Voltage to Ground Potential (Inputs & VCC Only) ...... -0.3 to +7V device. This is a stress rating only and functional
Supply Voltage to Ground Potential (Outputs & D/O Only) .. -0.3 to +7V operation of the device at these or any other condiDC Input Voltage ....................................................... -0.3 to +VCC+0.3V tions above those indicated in the operational secDC Output Current ........................................................................ 20mA tions of this specification is not implied. Exposure
Power Dissipation ....................................................................... 280mW to absolute maximum rating conditions for extended
periods may affect reliability.
Recommended Operation Conditions
Table 4. Recommended Operation Conditions
Sym
Descr ip t ion
Min
Typ
Ma x
Un it s
VCC
Supply Voltage
4.5
5
5.5
V
VIH
Input HIGH Voltage
0.7VCC
VCC
V
VIL
Input LOW Voltage
0
0.3VCC
V
VSI
Amplifier Input Voltage
0.05
VCC
V
VISW
Input Voltage of Analog Switch
0
VCC
V
VOSW
Output Voltage of Analog Switch
0
VCC
V
fOSC
Oscillator Frequency
2
10
MHz
TA
Operation Temperature
-20
80
PT0063(12/01)
5
O
C
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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DC Electrical Characteristics
Sym
Descr ip t ion
VOL
Output High Voltage - All pins except
SOUT, OSCO and SW_Out pins
Output Low Voltage - All pins except
SOUT, OSCO and SW_Out pins
IIH
IIL
VOH
IOH = -2.0mA
0.9VCC
uA
VIN = VCC
10
uA
Input Low Current
VIN = 0V
-10
uA
Voffset
Maximum Output Voltage - SOUT and
SOUT Pins
Output Impedance - SOUT and SOUT
Pins
DC Offset Output of Sine Wave - SOUT
and SOUT Pins
ICC
Supply Current
CIN
Amplifier Input Capacitance - AMP_In
and OFFSET Pins
VIH (SWCONT) ≥ 0.7VCC for
PT8A300,
VIH (SCTL) ≥ 0.7VCC for
PT8A301,
VIL (SCTL) ≤ 0.3VCC for
PT8A303
VIL (SWCONT) ≤ 0.3VCC for
PT8A300,
VIL (SCTL) ≤ 0.3VCC for
PT8A301,
VIH (SCTL) ≥ 0.7VCC for
PT8A303
No load
Upper Trigger Voltage Limit - FCONT,
SCTL, RESET and SWCONT pins for
PT8A300,
SCTL and RESET pins for PT8A301,
SCTL and RESET pins for PT8A303,
FSEL for PT8A304
Lower Trigger Voltage Limit - FCONT,
SCTL, RESET and SWCONT pins for
PT8A300,
SCTL and RESET pins for PT8A301,
SCTL and RESET pins for PT8A303,
FSEL for PT8A304
2
MΩ
70
Ω
0.85VCC
VCC
VP-P
2.0
3.0
kΩ
2.4
2.6
V
10
mA
30
No load, VCC = 5.5V
5
8
Amplifier Input Sensitivity
VT+ - VT-
Un it s
Input High Current
DC On Resistance
VT-
Ma x
mA
RON
VT+
Typ
0.1VCC
DC Cut-off Resistance
ZSIN
Min
IOL = 2.0mA
ROFF
VSIN
Test C on d it ion s
pF
50
mVp-p
VCC = 5V, TA = 25oC
2.55
2.95
3.35
V
VCC = 5V, TA = 25oC
1.75
2.05
2.45
V
0.45
0.90
1.60
V
Hysteresis Voltage
Note: VCC = 4.5V to 5.5V, TA = -20 ~ 80ºC, fOSC = 8MHz, unless otherwise specified.
PT0063(12/01)
6
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Application Instructions
OSC Port Circuit
Output of Sine Wave Generator
Figure 7. OSC Port Circuit
Figure 8
Typical Application Circuits
Figure 9. Application Circuit of PT8A300
OSCI
OSCO
SW_Out
FOUT
SW_In
FCONT
SOUT
NC
SWCONT
OFFSET
RESET
AMP_In
SCTL
GND
PT0063(12/01)
V CC
DOUT
7
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Figure 10. Application Circuit of PT8A301
OSCI
V CC
OSCO
SW1_Out
FOUT
SW1_In
SCTL
SOUT
RESET
SOUT
OFFSET
SW2_In
AMP_In
SW2_Out
GND
DOUT
OSCI
V CC
Figure 11. Application Circuit of PT8A303
OSCO
SW1_Out
DOUT
SW1_In
DOUT
SOUT
RESET
SOUT
OFFSET
SW2_In
AMP_In
SW2_Out
GND
SCTL
Notes:
1. The Transistor used in above test circuits may be CS9014B or 8050.
2. R* is for amplifier gain adjustment.
PT0063(12/01)
8
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Figure 12. Application Circuit of PT8A304
OSCI
V CC
OSCO
SW1_Out
FSEL
SW1_In
SCTL
SOUT
RESET
SOUT
OFFSET
SW2_In
AMP_In
SW2_Out
GND
PT0063(12/01)
DOUT
9
Ver:1
Data Sheet
PT8A300/301/303/304
Q-10 Hot Water Controller
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Notes
Pericom Technology Inc.
Email: [email protected]
Web Site: www.pti.com.cn, www.pti-ic.com
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576
Fax: (86)-21-6485 2181
Asia Pacific:
Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660
Fax: (852)- 2243 3667
U.S.A.:
2380 Bering Drive, San Jose, California 95131, USA
Tel: (1)-408-435 0800
Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve
design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described
other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free from
patent infringement or other rights, of Pericom Technology Incorporation.
PT0063(12/01)
10
Ver:1