ETC 74ALVCH245MTCX

Revised September 2001
74ALVCH245
Low Voltage Bidirectional Transceiver with Bushold
General Description
Features
The ALVCH245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B Ports
by placing them in a high impedance state. The ALVCH245
data inputs include active bushold circuitry, eliminating the
need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.
■ 1.65V-3.6V VCC supply operation
The 74ALVCH245 is designed for low voltage (1.65V to
3.6V) VCC applications.
The 74ALVCH245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while maintaining low CMOS power dissipation.
■ Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
■ tPD
3.6 ns max for 3.0V to 3.6V VCC
4.2 ns max for 2.3V to 2.7V VCC
6 ns max for 1.65V to 1.95V VCC
■ Uses patented Quiet Series noise/EMI reduction
circuitry
■ Latchup conforms to JEDEC JED78
■ ESD performance:
Human body model > 2000V
Machine model > 200V
Ordering Code:
Order Number
Package Number
74ALVCH245WM
M20B
74ALVCH245MTC
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
Output Enable Input (Active LOW)
T/R
Transmit/Receive Input
A0–A7
Side A Bushold Inputs or 3-STATE Outputs
B0–B7
Side B Bushold Inputs or 3-STATE Outputs
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
DS500648
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74ALVCH245 Low Voltage Bidirectional Transceiver with Bushold
September 2001
74ALVCH245
Connection Diagram
Truth Table
Inputs
OE
Outputs
T/R
L
L
Bus B0–B7 Data to Bus A0–A7
L
H
Bus A0–A7 Data to Bus B0–B7
H
X
HIGH Z State on A0–A7, B0–B7
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagram
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2
Recommended Operating
Conditions (Note 3)
−0.5V to +4.6V
Supply Voltage (VCC)
−0.5V to 4.6V
DC Input Voltage (VI)
Output Voltage (VO) (Note 2)
Power Supply
−0.5V to VCC +0.5V
Operating
DC Input Diode Current (IIK)
VI < 0V
−50 mA
0V to VCC
Output Voltage (VO)
DC Output Diode Current (IOK)
0V to VCC
Free Air Operating Temperature (TA)
VO < 0V
−50 mA
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
VIN = 0.8V to 2.0V, VCC = 3.0V
DC Output Source/Sink Current
±50 mA
(IOH/IOL)
±100 mA
Supply Pin (ICC or GND)
10 ns/V
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
DC VCC or GND Current per
Storage Temperature Range (TSTG)
1.65V to 3.6V
Input Voltage (VI)
−65°C to +150°C
Note 2: IO Absolute Maximum Rating must be observed, limited to 4.6V.
Note 3: Floating or unused control inputs must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
IOH = −100 µA
IOL
(V)
Min
1.65 - 1.95
0.65 x VCC
2.3 - 2.7
1.7
2.7 - 3.6
2.0
0.35 x VCC
0.7
2.7 - 3.6
0.8
1.2
IOH = −6 mA
2.3
2.0
IOH = −12 mA
2.3
1.7
2.7
2.2
V
3.0
2.4
IOH = −24 mA
3.0
2
IOL = 100 µA
1.65 - 3.6
0.2
1.65
0.45
IOL = 6 mA
2.3
0.4
IOL = 12 mA
2.3
0.7
2.7
0.4
IOL = 24 mA
3.0
1.65
−4
2.3
−12
2.7
−12
3.0
−24
1.65
4
2.3
12
2.7
12
3
24
II
Input Leakage Current
0 ≤ VI ≤ 3.6V
3.6
II(HOLD)
Bushold Input Minimum
VIN = 0.58V
1.65
25
±5.0
−25
VIN = 1.07V
1.65
VIN = 0.7V
2.3
45
VIN = 1.7V
2.3
−45
VIN = 0.8V
3.0
75
VIN = 2.0V
3.0
−75
0 < VO ≤ 3.6V
3.6
3
V
VCC - 0.2
1.65
LOW Level Output Current
Units
V
2.3 - 2.7
1.65 - 3.6
High Level Output Current
Drive Hold Current
Max
1.65 - 1.95
IOH = −4 mA
IOL = 4 mA
IOH
VCC
V
mA
mA
µA
µA
±500
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74ALVCH245
Absolute Maximum Ratings(Note 1)
74ALVCH245
DC Electrical Characteristics
Symbol
(Continued)
Parameter
VCC
Conditions
Min
Max
Units
(V)
IOZ
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
3.6
±10
µA
ICC
Quiescent Supply Current
VI = VCC or GND, IO = 0
3.6
10
µA
∆ICC
Increase in ICC per Input
VIH = VCC − 0.6V
3 - 3.6
750
µA
AC Electrical Characteristics
TA = −40°C to +85°C, RL = 500Ω
Symbol
CL = 50 pF
Parameter
VCC = 3.3V ± 0.3V
CL = 30 pF
VCC = 2.7V
Min
VCC = 2.5V ± 0.2V
VCC = 1.8V ± 0.15V
Units
Min
Max
Max
Min
Max
Min
Max
tPHL, tPLH
Propagation Delay
1.3
3.6
4.2
1.0
3.7
1.5
6.0
tPZL, tPZH
Output Enable Time
1.6
5.5
6.3
2.0
6.0
2.9
8.6
ns
tPLZ, tPHZ
Output Disable Time
1.7
5.5
5.3
0.8
4.8
1.5
8.0
ns
ns
Capacitance
Symbol
Parameter
Conditions
TA = +25°C
Units
VCC
Typical
CIN
Input Capacitance
Control
VI = 0V or VCC
3.3
4.5
pF
CI/O
Input/Output Capacitance
A or B Ports
VI = 0V or VCC
3.3
12
pF
CPD
Power Dissipation Capacitance
Outputs Enabled f = 10 MHz, CL = 0 pF
3.3
31
2.5
28
1.8
25
3.3
0
2.5
0
1.8
0
Outputs Disabled f = 10 MHz, CL = 50 pF
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4
pF
74ALVCH245
AC Loading and Waveforms
FIGURE 1. AC Test Circuit
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V;
VCC x 2 at VCC = 2.5V ± 0.2V; 1.8V ± 0.15V
tPZH, tPHZ
GND
FIGURE 2. Waveform for Inverting and Non-inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
Symbol
VCC
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
Vx
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
Vy
VOH − 0.3V
VOH − 0.15V
VOH − 0.15V
5
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74ALVCH245
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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74ALVCH245 Low Voltage Bidirectional Transceiver with Bushold
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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