EVB7120 300 to 930MHz Transceiver Evaluation Board Description Features ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! Single chip solution with only a few external components Stand-alone fixed-frequency transceiver operation modes Programmable multi-channel transceiver operation modes Low current consumption in active mode and very low standby current PLL-stabilized RF VCO (LO) with internal varactor diode Lock detection in programmable channel applications 3wire bus serial control interface FSK/ASK modulation selection FSK for digital data and FM for analog signal reception RSSI allows signal strength indication and ASK detection Switchable LNA gain for improved dynamic range Automatic PA turn-on after PLL lock FM possible with external varactor ASK modulation achieved by on/off keying AFC option for extended input frequency acceptance range Ordering Information Part No. EVB7120-433-FSK EVB7120-433-ASK N I IM EVB7120-868-FSK EVB7120-868-ASK L E R EVB7120-315-FSK (on request) EVB7120-315-ASK (on request) Y R A EVB7120-915-FSK (on request) EVB7120-915-FSK (on request) Application Examples ! ! ! ! ! ! P General bi-directional half duplex digital data transmission or analog signal transmission Low-power telemetry Alarm and security systems Keyless car and central locking Home automation Model control Technical Data Overview ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! Frequency range: 300 MHz to 930 MHz for programmable channel applications 315 MHz, 433 MHz, 868 MHz or 915 MHz fixed-frequency single-channel variants Power supply range: 2.2 V to 5.5 V Temperature range: -40 °C to +85 °C Standby current: 50 nA Operating current: 7.5 mA in receive mode at low gain Operating current 12 mA in transmit mode at -2 dBm output power Adjustable output power range from –15 dBm to +6 dBm Sensitivity: -103 dBm at FSK with 150 kHz IF filter BW Sensitivity: -105 dBm at ASK with 150 kHz IF filter BW Maximum data rate for FSK and ASK: 40 kbit/s NRZ Maximum input level: –10 dBm at FSK and -20 dBm at ASK Input frequency acceptance: ± 50 kHz (with AFC option) Frequency deviation range: ±2.5 kHz to ±80 kHz Maximum analog modulation frequency: 10 kHz 3 MHz to 12 MHz crystal reference 390120712002 Rev. 009 Page 1 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description General Description The TH7120 is a single chip FSK/FM/ASK transceiver IC. It is designed to operate in low-power multi-channel programmable or single-channel stand-alone, half-duplex data transmission systems. It can be used for ISM, SRD or similar applications operating in the frequency ranging of 300 MHz to 930 MHz. The TH7120 transceiver IC consists of the following building blocks: " " " " " " " " " " " " " " Low-noise amplifier (LNA) for high-sensitivity RF signal reception with switchable gain Mixer (MIX) for RF-to-IF down-conversion IF amplifier (IFA) to amplify and limit the IF signal and for RSSI generation Phase-coincidence demodulator with external ceramic discriminator (FSK Demodulator) Operational amplifier, connected to demodulator output (OA1) Operational amplifier, integrator circuit at FSK-AFC mode (OA2) Control logic with 3wire bus serial control interface (SCI) Reference oscillator (RO) with external crystal Reference divider (R counter) Programmable divider (N/A counter) Phase-frequency detector (PFD) Charge pump (CP) Voltage control oscillator (VCO) with internal varactor Power amplifier (PA) with adjustable output power L E R N I IM Y R A The transceiver can be used either as a 3wire-bus-controlled programmable or as a stand-alone fixedfrequency device. After power up, the transceiver is set to fixed-frequency mode. In this mode, pins FS0/SDEN and FS1/LD must be connected to VEE or VCC in order to set the desired frequency of operation. The logic levels at pins FS0/SDEN and FS1/LD must not be changed after power up in order to remain in fixed-frequency mode. After the first logic level change at pin FS0/SDEN, the transceiver enters into programmable mode while pin FS1/LD is now a PLL lock detector output. In this mode, the user can set any PLL frequency or mode of operation by the SCI. P For more detailed information, please refer to the latest TH7120 data sheet revision. 390120712002 Rev. 009 Page 2 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description 8 14 SDTA VEE_DIG SDEN 18 OA1 SCI 5 OUT_DTA 4 INT1 VCC_DIG SCLK bias 17 Control Logic 200k FS0/SDEN 16 TE/SDTA 15 RE/SCLK 13 ASK/FSK IN_DTA 12 FSK Demodulator VEE_RO 9 FSK 19 FS1/LD FSK_SW 11 3 IN_DEM 6 OUT_DEM OA2 INT2 Block Diagram 22 VEE_PLL 10 RO 21 LF 2 RO IFA L E R VCC_IF R counter 7 RSSI 1.5pF RO N I IM 23 TNK_LO 20 VCC_PLL LO VCO IF MIX N counter 31 VEE_IF 32 P 1 IN_IFA OUT_MIX1 Y R A 30 IN_MIX Figure 1: 390120712002 Rev. 009 24 PS_PA PA 25 OUT_PA LNA 26 27 VEE_LNA IN_LNA 29 GAIN_LNA ASK 28 OUT_LNA TH7120 block diagram Page 3 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Stand-Alone Fixed-Frequency Operation After power up the transceiver is set to fixed-frequency mode. In this mode, pins FS0/SDEN and FS1/LD must be connected to VEE or VCC to set the desired frequency of operation. The logic levels at pins FS0/SDEN and FS1/LD must not be changed after power up in order to remain in fixed-frequency mode. The default settings of the control word bits in stand-alone mode are described in the frequency selection table. Frequency Selection Channel frequency 433.92 MHz 868.3 MHz 315 MHz 915 MHz FS0/SDEN 1 0 1 0 FS1/LD 0 0 1 1 Reference oscillator frequency Y R A 7.1505 MHz R counter ratio in RX mode 16 16 PFD frequency in RX mode 446.91 kHz 18 30 446.91 kHz 397.25 kHz 238.35 kHz 947 1919 766 3794 VCO frequency in RX mode 423.22 MHz 857.60 MHz 304.30 MHz 904.30 MHz RX frequency 433.92 MHz 868.30 MHz 315.00 MHz 915.00 MHz 16 16 18 30 N/A counter ratio in RX mode R counter ratio in TX mode L E R PFD frequency in TX mode N I IM 446.91 kHz 446.91 kHz 397.25 kHz 238.35 kHz 971 1943 793 3839 VCO frequency in TX mode 433.92 MHz 868.30 MHz 315.00 MHz 915.00 MHz TX frequency 433.92 MHz 868.30 MHz 315.00 MHz 915.00 MHz 10.7 MHz 10.7 MHz 10.7 MHz 10.7 MHz N/A counter ratio in TX mode P IF frequency in RX mode In the fixed-frequency mode, the user can set the transceiver to Standby, Receive, Transmit or Idle (only PLL synthesizer active) mode via control pins RE/SCLK and TE/SDTA. Operation mode Standby Receive Transmit Idle RE/SCLK 0 1 0 1 TE/SDTA 0 0 1 1 In this mode, the modulation type selection can be done via pin ASK/FSK Modulation type ASK FSK ASK / FSK 0 1 390120712002 Rev. 009 Page 4 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Default Register Settings After Power-up Bits A-word symbols 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 not used DI_MODE MODUL HighCur LOCK_MODE PA_AUTO Pow1 Pow0 MIXG LNAG TE RE RR9 RR8 RR7 RR6 RR5 RR4 RR3 RR2 RR1 RR0 Bits 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 C-word symbols P LNAGI_E POLAR High2 High1 UP NR16 NR15 NR14 NR13 NR12 NR11 NR10 NR9 NR8 NR7 NR6 NR5 NR4 NR3 NR2 NR1 NR0 390120712002 Rev. 009 Channel Channel Channel Channel ‘00’ ‘01’ ‘10’ ‘11’ 868.3 433.92 915.0 315.0 MHz MHz MHz MHz 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 L E R 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 1 1 0 1 1 0 0 0 0 0 1 1 1 0 1 1 0 1 0 0 1 0 not used not used EnDelPLL LNAHYST EnAdj EnFM Max2 Max1 Max0 Min2 Min1 Min0 RT9 RT8 RT7 RT6 RT5 RT4 RT3 RT2 RT1 RT0 0 0 1 1 0 0 1 1 1 0 1 1 0 0 0 0 0 1 0 0 0 0 N I IM Channel Channel Channel Channel ‘00’ ‘01’ ‘10’ ‘11’ 868.3 433.92 915.0 315.0 MHz MHz MHz MHz 0 1 1 0 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 B-word symbols Channel Channel Channel Channel ‘00’ ‘01’ ‘10’ ‘11’ 868.3 433.92 915.0 315.0 MHz MHz MHz MHz 0 1 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 0 B-word symbols MODUL_CTR LD_TM1 LD_TM0 ER_TM1 ER_TM0 NT16 NT15 NT14 NT13 NT12 NT11 NT10 NT9 NT8 NT7 NT6 NT5 NT4 NT3 NT2 NT1 NT0 Page 5 of 20 Y R A 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 0 0 1 0 Channel Channel Channel Channel ‘00’ ‘01’ ‘10’ ‘11’ 868.3 433.92 915.0 315.0 MHz MHz MHz MHz 0 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0 1 1 1 1 0 0 1 0 1 1 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 0 0 0 1 1 0 0 1 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Programmable Channel Operation Serial Control Interface Description A 3-wire (SCLK, SDTA, SDEN) Serial Control Interface (SCI) is used to program the transceiver in multichannel mode (see Fig. 2). At each rising edge of the SCLK signal, the logic value on the SDTA pin is written into a 24-bit shift register. The data stored in the shift register are loaded into one of the 4 appropriate latches on the rising edge of SDEN. The control words are 24 bits lengths: 2 address bits and 22 data bits. The first two bits (bit 23 and 22) are latch address bits. As additional leading bits are ignored, only the least significant 24 bits are serial-clocked into the shift register. The first incoming bit is the most significant bit (MSB). To program the transceiver in multi-channel application, four 24-bit words may be sent: A-word, B-word, C-word and D-word. If individual bits within a word have to be changed, then it is sufficient to program only the appropriate 24-bit word. The serial data input timing and the structure of the control words are illustrated in Fig. 2 and 3. Table REGISTER SETTINGS describes the function of each bit. SDTA 24-BIT SHIFT REGISTER SCLK 22 22 Y R A 22 A-word B - LATCH 22 B-word C - LATCH 22 C-word D - LATCH 22 D-word A - LATCH 22 2 N I IM 22 ‘00’ L E R ‘01’ SDEN ADDR DECODER P ‘10’ ‘11’ 22 Figure 2: SCI block diagram Due to the static CMOS design, the SCI consumes virtually no current and it can be programmed in active as well as in standby mode. Invalid data SDTA MSB bit 23 LSB bit 22 bit 1 tCH tCWL tCWH Invalid data bit 0 SCLK tCS SDEN tES tEW tEH Figure 3: Serial data input timing 390120712002 Rev. 009 Page 6 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description SCI Words A-word 9 X 8 X 7 X 6 X 5 X 4 X 3 X 2 X 1 X RT2 RT1 B-word 2 X 1 X 0 X NT0 10 X 9 X 8 X 7 X 6 X 5 X NR0 NR1 3 X NT1 11 X NT4 NR2 12 X NT5 4 X NT2 NR5 13 X 0 X NR3 NR6 NT13 1 X NT6 NT14 2 X NR7 NT15 3 X NT7 NT16 4 X NR8 14 X 5 X NT8 15 X 6 X NR9 16 X 7 X NT9 17 X 8 X NR10 18 X 9 X NT10 NR14 19 X 10 X NR11 NR15 20 X 11 X NT11 NR16 21 X 12 X NR12 UP 13 X ER_TM0 14 X High1 15 X ER_TM1 16 X High2 17 X LD_TM0 18 X POLAR 19 X LD_TM1 20 X LSB NT3 P 21 X LNAGI_E 22 1 0 ADDR MODUL_CTR MSB L E R 0 X NR4 C-word N I IM NT12 0 1 ADDR 23 Y R A LSB 22 NR13 23 RT0 MSB 0 X RR0 10 X RT3 RR1 11 X RT4 RR2 12 X RT5 RR3 RR6 13 X RT6 RR4 RR7 1 X RT7 2 X RR8 Max0 3 X RT8 Max1 4 X RR9 Max2 5 X RT9 14 X 6 X RE 15 X 7 X Min0 16 X 8 X TE 17 X 9 X Min1 18 X 10 X LNAG Pow0 19 X 11 X Min2 Pow1 20 X 12 X MIXG PA_AUTO 21 X EnFm 13 X LOCK_MODE 14 X EnAdj 15 X HighCur 16 X LNAHYST 17 X MODUL 18 X EnDelPLL 19 X DI_MODE 20 X not used 21 X not used 22 0 0 ADDR not used 23 LSB RR5 MSB D-word MSB 23 LSB 22 1 1 ADDR 390120712002 Rev. 009 Page 7 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Register Settings A-word Symbol Bits No. [9:0] 10 Description Software button RR9:RR0 Reference divider ratio in RX mode RR9:RR0 TE:RE [11:10] 2 Select active mode at programmable-channel application: OPMODE LNAG [12] [13] Standby mode ‘11’ Idle mode ‘10’ Transmit mode ‘01’ Receive mode ‘0’ low LNA gain ‘1’ high LNA gain 1 1 ‘0’ 2 L E R ‘01’ P PA_AUTO ‘10’ ‘11’ [16] 1 ‘0’ ‘1’ PA_AUTO LOCK_MODE [17] 1 [18] [19] [20] Pmax - 6 dBm Pmax Disable automatic PA turn-on after PLL lock: enabled disabled before lock only ‘1’ before and after lock. Select Charge Pump output current: 1 ‘0’ ± 260 µA ‘1’ ±1300 µA Select modulation mode at internal modulation control: ASK/FSK DI_MODE Pmax - 12 dBm ‘0’ 1 CPCUR MODUL Pmax - 20 dBm Select PFD output analyse mode of lock detecting: LOCK_MODE HighCur high gain Select output power at programmable-channel application: ‘00’ TXPOWER low gain ‘1’ [15:14] N I IM Select mixer conversion gain at programmable-channel application: MIXGAIN Pow1:Pow0 Y R A Select LNA gain at internal gain control: LNAGAIN MIXG ‘00’ ‘0’ ASK ‘1’ FSK 1 Select mode for input data: ‘0’ normal ‘0’ for space at ASK or fmin at FSK, ‘1’ for mark at ASK or fmax at FSK DI_MODE ‘1’ inverse ‘1’ for space at ASK or fmin at FSK, ‘0’ for mark at ASK or fmax at FSK not used 390120712002 Rev. 009 [21] 1 ‘X’ Page 8 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description B-word Symbol Bits No. [9:0] 10 Description Software button RT9:RT0 Reference divider ratio in TX mode RT9:RT0 Min2:Min0 [12:10] 3 Select minimum value of RO active current: ROMIN ‘000’ 0 µA ‘001’ 50 µA ‘010’ 100 µA ‘011’ 150 µA ‘100’ 200 µA ‘101’ 250 µA ‘110’ 300 µA ‘111’ Max2:Max0 [15:13] 3 Select maximum value of RO active current: ‘000’ ‘001’ L E R ‘010’ ROMAX P N I IM 350 µA Y R A ‘011’ 0 µA (RO is off) 50 µA 100 µA 150 µA ‘100’ 200 µA ‘101’ 250 µA ‘110’ 300 µA ‘111’ 350 µA EnFm [16] 1 Test bit. Forced '0' for correct functioning. EnAdj [17] 1 Test bit. Forced '0' for correct functioning. LNAHYST [18] 1 Enable LNA hysteresis: LNAHYST EnDelPLL [19] disabled ‘0’ enabled 1 Enable delayed start of the PLL: EnDelPLL not used [20] 1 ‘X’ not used [21] 1 ‘X’ 390120712002 Rev. 009 ‘1’ ‘1’ disabled ‘0’ enabled. Page 9 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description C-word Symbol Bits No. [16:0] 17 Description Software button NR16:NR0 Feedback divider ratio in RX mode NR16:NR0 UP [17] 1 BAND High2:High1 [19:18] [20] ‘0’ up to 500 MHz ‘1’ 500 to 1000MHz 2 VCOCUR POLAR Select frequency band: Select VCO active current: ‘00’ low current (250 µA) ‘01’ standard current (350 µA) ‘10’ high1 current (450 µA) ‘11’ high2 current (550 µA) 1 Select Phase Detector polarity: N I M I L E R ‘1’ PFDPOL P LNACTRL 390120712002 Rev. 009 positive (1) (1) VCO OUTPUT FREQUENCY ‘0’ LNAGI_E Y R A [21] 1 negative (2) (2) VCO INPUT VOLTAGE Select LNA gain control mode: ‘0’ external LNA gain control ‘1’ internal LNA gain control Page 10 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description D-word Symbol Bits No. [16:0] 17 Description Software button NT16:NT0 Feedback divider ratio in TX mode NT16:NT0 ER_TM1:ER_TM0 [18:17] 2 ER_TM1:ER_TM0 LD_TM1:LD_TM0 [20:19] 2 Select maximum enabled PFD output error for lock detecting (in reference frequency clocks): ‘00’ 2 clocks ‘01’ 4 clocks ‘10’ 8 clocks ‘11’ 16 clocks ‘00’ ‘01’ LD_TM1:LD_TM0 ‘10’ ‘11’ MODUL_CTR [21] 1 P 390120712002 Rev. 009 4 clocks N I IM 16 clocks 64 clocks 256 clocks Select mode of modulation control: L E R ‘0’ MODCTRL Y R A Select minimum number of PFD reference frequency clocks before lock detecting: ‘1’ external modulation control internal modulation control Page 11 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description IN_DTA GND OUT_DTA GND RSSI GND OUT_DEM GND GND SDTA SDEN SCLK FSK Application Circuit 2 1 2 1 2 1 2 1 12 3 12 3 12 3 CX1 CX2 RO 10 XTAL OUT_DTA 8 RSSI 7 OUT_DEM 6 18 VEE INT2 4 IN_DEM 3 VCC 2 C4 C3 CP0 RP 31 VEE 32 OUT_MIX 30 IN_MIX CERRES CRX0 C1 L1 LRX1 1 2 3 CRX1 CERFIL CB1 VCC GAIN_LNA GND 1 2 CTX2 1 IN_IFA CB4 VCC CB0 28 OUT_LNA 25 VCC CB5 C2 CTX0 CTX1 LTX1 CB2 27 VEE 24 RF 26 IN_LNA 23 TNK_LO 29 GAIN_LNA 22 VEE CF2 LTX0 Figure 4: 390120712002 Rev. 009 TH7120 21 LF RPS VCC GND INT1 5 C5 L0 OUT_PA CF1 20 VCC CRX2 CTX3 P 19 FS1/LD CB6 Y R A VEE 9 IN_DTA 12 FSK_SW 11 ASK/FSK 13 FS0/SDEN 17 VCC 14 RE/SCLK 15 16 CB7 CS3 CS2 N I M I L E R CS1 12 3 RE/SCLK ASK/FSK 12 3 FS1/LD FS0/SDEN TE/SDTA RS3 RS1 RS2 4 3 2 1 Circuit for FSK operation Page 12 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description PCB Top View for FSK Application Board layout data in Gerber format is available GND Melexis OUT_DEM GND C5 C4 CB4 CERRES CTX0 C1 L1 1 LTX1 CTX3 LRX1 CRX2 RX_input RX_IN GAIN_LNA CRX0 C2 TX_OUT TX_output RP CRX1 CB0 CTX2 1 CP0 C3 LO LTX0 CB2 CTX1 GND VCC CB5 0 CX2 CB7 N I IM RPS CB3 P Y R A CB1 CF1 L E R RF 390120712002 Rev. 009 RSSI GND K/ AS SK F 1 TA SD / TE / RE LK SC 1 1 FS0/ SDEN CF2 1 1 FS1/LD CB6 1 1 CX1 OUT_DTA GND IN_DTA RS3 CS2 RS2 CS1 RS1 1 CS3 TH7120_EVB3 SCLK SDEN SDTA GND 3 1 1 Page 13 of 20 Board size is 40mm x 51mm EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Board Component Values for FSK Part Size Value Value @ 433.92 MHz @ 868.3 MHz Tolerance Description C1 0603 5.6 pF NIP ±5% LNA output tank capacitor C2 0603 1 pF 1.5 pF ±5% MIX input matching capacitor C3 0805 10 nF 10 nF ±10% data slicer capacitor C4 0805 330 pF 330 pF ±10% C5 0805 330 pF 330 pF ±10% demodulator output low-pass capacitor, depending on data rate RSSI output low pass capacitor CB0 0805 100 nF 100 nF ±10% blocking capacitor CB1 0803 330 pF 330 pF ±10% blocking capacitor CB2 0805 330 pF 330 pF ±10% blocking capacitor CB4 0805 330 pF 330 pF ±10% blocking capacitor CB5 0603 330 pF 330 pF ±10% blocking capacitor CB6 0603 330 pF 47 pF ±10% blocking capacitor CB7 0603 330 pF 330 pF ±10% blocking capacitor CF1 0805 330 pF 330 pF ±5% loop filter capacitor CF2 0805 150 pF 150 pF ±5% loop filter capacitor N I IM Y R A CX1 0805 18 pF 22 pF ±5% RO capacitor for FSK (∆f = ±20 kHz) CX2 0805 150 pF 27 pF ±5% CP0 0805 12 - 12 pF 12 - 12 pF ±5% RO capacitor for FSK (∆f = ±20 kHz) CERRES tuning capacitor CRX0 0603 100 pF 100 pF ±5% RX coupling capacitor CRX1 0805 NIP NIP ±5% RX impedance matching capacitor CRX2 0805 8.2 pF 3.3 pF ±5% RX impedance matching capacitor CTX0 0603 3.3 pF 2.2 pF ±5% TX coupling capacitor CTX1 0805 1 pF NIP ±5% TX impedance matching capacitor CTX2 0805 4.7 pF 4.7 pF ±5% TX impedance matching capacitor NIP 0.47 pF ±5% TX impedance matching capacitor 22 pF 22 pF ±10% protection capacitor 10 KΩ 62 kΩ 10 KΩ 56 kΩ ±5% CERRES loading resistor ±5% loop filter resistor 0805 33 kΩ 33 kΩ ±5% RS1 to RS3 0805 0805 10 kΩ 2.7 nH ±10% L0 10 kΩ 22 nH power-select resistor only required at fixed-frequency operation protection resistor ±5% VCO tank inductor L1 0603 15 nH 10 nH ±5% LNA output tank inductor LRX1 0805 18 nH 8.2 nH ±5% RX impedance matching inductor LTX0 0805 220 nH 82 nH ±5% TX impedance matching inductor LTX1 0805 56 nH 12 nH ±5% XTAL HC49 SMD 7.1505 MHz 7.1505 MHz ±30ppm calibr. ±30ppm temp. TBD CTX3 CS1 to CS3 RP RF RPS CERFIL CERRES P 0805 0805 0603 0805 L E R SFE10.7MFP @ Leaded SFE10.7MFP @ BIF2 = 40 kHz type BIF2 = 40 kHz SFECV10.7MJS-A SMD SFECV10.7MJS-A @ BIF2 = 150 kHz type @ BIF2 = 150 kHz SMD type CDACV10.7MG18-A CDACV10.7MG18-A ±40 kHz TX impedance matching inductor fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 70 Ω ceramic filter from Murata (optional for narrow band applications) ceramic filter from Murata ceramic resonator from Murata NIP – not in place, may be used optionally 390120712002 Rev. 009 Page 14 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description IN_DTA GND OUT_DTA GND RSSI GND GND SDTA SDEN SCLK ASK Application Circuit 2 1 2 1 2 1 RS3 RE/SCLK ASK/FSK 12 3 12 3 CS3 CX1 CB7 RO 10 OUT_DTA 8 RSSI 7 OUT_DEM 6 18 VEE INT2 4 IN_DEM 3 VCC 2 C3 32 OUT_MIX 31 VEE 30 IN_MIX 25 1 IN_IFA C1 L1 LRX1 1 2 3 CRX1 CERFIL CB1 VCC GAIN_LNA GND 1 2 CTX2 CRX0 VCC CB0 CRX2 CTX3 VCC CB5 C2 CTX0 CTX1 LTX1 CB2 28 OUT_LNA 24 RF 27 VEE 23 TNK_LO 29 GAIN_LNA 22 VEE CF2 LTX0 Figure 5: 390120712002 Rev. 009 TH7120 21 LF RPS VCC GND INT1 5 C5 L0 26 IN_LNA CF1 20 VCC OUT_PA P 19 FS1/LD CB6 Y R A VEE 9 FSK_SW 11 IN_DTA 12 ASK/FSK 13 FS0/SDEN 17 XTAL VCC 14 RE/SCLK 15 16 CS2 N I M I L E R CS1 12 3 12 3 FS1/LD FS0/SDEN TE/SDTA 12 3 RS1 RS2 4 3 2 1 Circuit for ASK operation Page 15 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description PCB Top View for ASK Application Board layout data in Gerber format is available GND Melexis OUT_DEM GND C5 C4 CB4 CERRES CTX0 C1 L1 1 LTX1 CTX3 LRX1 CRX2 RX_input RX_IN GAIN_LNA CRX0 C2 TX_OUT TX_output RP CRX1 CB0 CTX2 1 CP0 C3 LO LTX0 CB2 CTX1 GND VCC CB5 0 CX2 CB7 N I IM RPS CB3 P Y R A CB1 CF1 L E R RF 390120712002 Rev. 009 RSSI GND K/ AS SK F 1 TA SD / TE / RE LK SC 1 1 FS0/ SDEN CF2 1 1 FS1/LD CB6 1 1 CX1 OUT_DTA GND IN_DTA RS3 CS2 RS2 CS1 RS1 1 CS3 TH7120_EVB3 SCLK SDEN SDTA GND 3 1 1 Page 16 of 20 Board size is 40mm x 51mm EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Board Component Values for ASK Part Size Value Value @ 433.92 MHz @ 868.3 MHz Tolerance Description C1 0603 5.6 pF NIP ±5% LNA output tank capacitor C2 0603 1 pF 1.5 pF ±5% MIX input matching capacitor C3 0805 10 nF 10 nF ±10% data slicer capacitor C5 0805 330 pF 330 pF ±10% RSSI output low pass capacitor CB0 0805 100 nF 100 nF ±10% blocking capacitor CB1 0803 330 pF 330 pF ±10% blocking capacitor CB2 0805 330 pF 330 pF ±10% blocking capacitor CB5 0603 330 pF 330 pF ±10% blocking capacitor CB6 0603 330 pF 47 pF ±10% blocking capacitor CB7 0603 330 pF 330 pF ±10% blocking capacitor CF1 0805 330 pF 330 pF ±5% loop filter capacitor CF2 0805 150 pF 150 pF ±5% loop filter capacitor CX1 0805 15 pF 15 pF ±5% RO capacitor CRX0 0603 100 pF 100 pF ±5% RX coupling capacitor CRX1 0805 RX impedance matching capacitor CRX2 0805 CTX0 0603 CTX1 0805 CTX2 0805 CTX3 0805 CS1 to CS3 0805 RF 0805 Y R A NIP NIP ±5% 8.2 pF 3.3 pF ±5% RX impedance matching capacitor 3.3 pF 2.2 pF ±5% TX coupling capacitor N I M I L E R 1 pF NIP ±5% TX impedance matching capacitor 4.7 pF 4.7 pF ±5% TX impedance matching capacitor NIP 0.47 pF ±5% TX impedance matching capacitor 22 pF 22 pF ±10% protection rcapacitor 62 kΩ 56 kΩ ±5% loop filter resistor 33 kΩ 33 kΩ ±5% 10 kΩ 22 nH 10 kΩ 2.7 nH ±10% power-select resistor only required at fixed-frequency operation protection resistor ±5% VCO tank inductor 15 nH 10 nH ±5% LNA output tank inductor 18 nH 8.2 nH ±5% RX impedance matching inductor 0805 220 nH 82 nH ±5% TX impedance matching inductor 0805 56 nH 12 nH ±5% TX impedance matching inductor XTAL HC49 SMD 7.1505 MHz 7.1505 MHz CERFIL Leaded type SMD type SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz SFE10.7MFP @ BIF2 = 40 kHz SFECV10.7MJS-A @ BIF2 = 150 kHz ±30ppm calibr. ±30ppm temp. TBD RPS RS1 to RS3 L0 L1 LRX1 LTX0 LTX1 0805 P 0805 0805 0603 0805 ±40 kHz fundamental-mode crystal, Cload = 10 pF to 15pF, C0, max = 7 pF, Rm, max = 70 Ω ceramic filter from Murata (optional for narrow band applications) ceramic filter from Murata NIP – not in place, may be used optionally 390120712002 Rev. 009 Page 17 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description TX/RX Combining Network Circuit Features VCC ! Single TX/RX port ! No TX/RX switch required ! Direct connection to λ/4 antenna possible CTX1 CTX2 LTX0 CTX0 LTX1 RF input RF output LRX2 CTX3 CRX0 CRX2 N I IM LRX1 CRX1 L E R Figure 6: P Y R A 25 OUT_PA 26 IN_LNA Combining network schematic Board Component Values Part CTX0 CTX1 CTX2 CTX3 CRX0 CRX1 CRX2 LTX0 LTX1 LRX1 LRX2 Size 0603 0805 0805 0805 0603 0805 0805 0805 0805 0805 0805 Value Value Value Value @ 315.0 MHz @ 433.92 MHz @ 868.3 MHz @ 915 MHz 10 pF 10 pF 18 pF TBD 100 pF NIP TBD 150 nH TBD 27 nH TBD 1 pF NIP 15 pF NIP 100 pF 4.7 pF 22 pF 150 nH 56 nH 2.2 pF NIP 4.7 pF 0.68 pF 100 pF 2.2 pF 3.3 pF 82 nH 12 nH 8.2 nH 10 nH 10 pF NIP TBD TBD 100 pF NIP TBD TBD TBD TBD TBD 18 nH 15 nH NIP – not in place, may be used optionally 390120712002 Rev. 009 Page 18 of 20 EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Package Dimensions D D1 24 17 16 25 E e E1 32 9 1 A A2 b A1 8 N I IM Y R A L L E R Fig. 7: LQFP32 P All Dimension in mm, coplanaríty < 0.1mm E1, D1 A min A1 A2 0.05 1.35 7.00 max e b L 0.30 0.45 0.8 1.60 0.15 1.45 E, D α 0° 9.00 0.45 0.75 7° 0.012 0.018 0° 0.018 0.030 All Dimension in inch, coplanaríty < 0.004” min 0.002 0.053 0.006 0.057 0.276 max 390120712002 Rev. 009 0.031 0.630 Page 19 of 20 0.354 7° EVB Description Okt/02 EVB7120 300 to 930MHz Transceiver Evaluation Board Description Disclaimer Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical lifesupport or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of technical or other services. © 2002 Melexis NV. All rights reserved. P L E R N I IM Y R A For the latest version of this document. Go to our website at www.melexis.com Or for additional information contact Melexis Direct: Europe and Japan: All other locations: Phone: +32 1367 0495 E-mail: [email protected] Phone: +1 603 223 2362 E-mail: [email protected] QS9000, VDA6.1 and ISO14001 Certified 390120712002 Rev. 009 Page 20 of 20 EVB Description Okt/02