MC33201, MC33202, MC33204, NCV33202 Low Voltage, Rail-to-Rail Operational Amplifiers The MC33201/2/4 family of operational amplifiers provide rail–to–rail operation on both the input and output. The inputs can be driven as high as 200 mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail. This rail–to–rail operation enables the user to make full use of the supply voltage range available. It is designed to work at very low supply voltages (± 0.9 V) yet can operate with a supply of up to +12 V and ground. Output current boosting techniques provide a high output current capability while keeping the drain current of the amplifier to a minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability make this an ideal amplifier for audio applications. http://onsemi.com PDIP–8 P, VP SUFFIX CASE 626 8 1 8 1 SO–8 D, VD SUFFIX CASE 751 • Low Voltage, Single Supply Operation • • • • • • • • (+1.8 V and Ground to +12 V and Ground) Input Voltage Range Includes both Supply Rails Output Voltage Swings within 50 mV of both Rails No Phase Reversal on the Output for Over–driven Input Signals High Output Current (ISC = 80 mA, Typ) Low Supply Current (ID = 0.9 mA, Typ) 600 Ω Output Drive Capability Extended Operating Temperature Ranges (–40° to +105°C and –55° to +125°C) Typical Gain Bandwidth Product = 2.2 MHz 8 1 Micro–8 DM SUFFIX CASE 846A PDIP–14 P, VP SUFFIX CASE 646 14 1 14 SO–14 D, VD SUFFIX CASE 751A 1 14 1 TSSOP–14 DTB SUFFIX CASE 948G ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 11 of this data sheet. Semiconductor Components Industries, LLC, 2002 April, 2002 – Rev. 7 1 Publication Order Number: MC33201/D MC33201, MC33202, MC33204, NCV33202 PIN CONNECTIONS CASE 646/751A/948G CASE 626 NC 1 Inputs 8 2 7 Output 1 1 NC VCC Inputs 1 3 6 Output VEE 4 5 NC 14 Output 4 1 4 3 12 11 5 10 6 2 3 2 1 3 VEE 4 8 VCC 7 Output 2 6 2 5 Inputs 4 VEE Inputs 3 Output 3 (Quad, Top View) CASE 751/846A Inputs 1 9 8 Output 2 7 Output 1 1 13 VCC 4 Inputs 2 (Single, Top View) 2 Inputs 2 (Dual, Top View) VCC VCC VEE VCC Vin- Vout VCC Vin+ VEE This device contains 70 active transistors (each amplifier). Figure 1. Circuit Schematic (Each Amplifier) http://onsemi.com 2 MC33201, MC33202, MC33204, NCV33202 MAXIMUM RATINGS Rating Symbol Value Unit VS +13 V Input Differential Voltage Range VIDR Note 1 V Common Mode Input Voltage Range (Note 2) VCM VCC + 0.5 V to VEE – 0.5 V V Output Short Circuit Duration ts Note 3 sec Maximum Junction Temperature TJ +150 °C Storage Temperature Tstg – 65 to +150 °C Maximum Power Dissipation PD Note 3 mW Supply Voltage (VCC to VEE) DC ELECTRICAL CHARACTERISTICS (TA = 25°C) Characteristic VCC = 2.0 V VCC = 3.3 V VCC = 5.0 V Input Offset Voltage VIO (max) MC33201 MC33202, NCV33202 MC33204 ± 8.0 ±10 ±12 ± 8.0 ±10 ±12 ± 6.0 ± 8.0 ±10 Output Voltage Swing VOH (RL = 10 kΩ) VOL (RL = 10 kΩ) 1.9 0.10 3.15 0.15 4.85 0.15 Power Supply Current per Amplifier (ID) 1.125 1.125 1.125 Unit mV Vmin Vmax mA Specifications at VCC = 3.3 V are guaranteed by the 2.0 V and 5.0 V tests. VEE = Gnd. DC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Characteristic Figure Symbol Input Offset Voltage (VCM 0 V to 0.5 V, VCM 1.0 V to 5.0 V) MC33201: TA = + 25°C MC33201: TA = – 40° to +105°C MC33201V: TA = – 55° to +125°C MC33202: TA = + 25°C MC33202: TA = – 40° to +105°C MC33202V: TA = – 55° to +125°C NCV33202V: TA = – 55° to +125°C (Note 4) MC33204: TA = + 25°C MC33204: TA = – 40° to +105°C MC33204V: TA = – 55° to +125°C 3 VIO Input Offset Voltage Temperature Coefficient (RS = 50 Ω) TA = – 40° to +105°C TA = – 55° to +125°C 4 Input Bias Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V) TA = + 25°C TA = – 40° to +105°C TA = – 55° to +125°C 5, 6 Input Offset Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V) TA = + 25°C TA = – 40° to +105°C TA = – 55° to +125°C – Common Mode Input Voltage Range – Min Typ Max – – – – – – – – – – – – – – – – – – – 6.0 9.0 13 8.0 11 14 14 10 13 17 – – 2.0 2.0 – – – – – 80 100 – 200 250 500 – – – 5.0 10 – 50 100 200 VEE – VCC mV ∆VIO/∆T µV/°C IIB nA IIO VICR Unit nA V 1. The differential input voltage of each amplifier is limited by two internal parallel back–to–back diodes. For additional differential input voltage range, use current limiting resistors in series with the input pins. 2. The input common mode voltage range is limited by internal diodes connected from the inputs to both supply rails. Therefore, the voltage on either input must not exceed either supply rail by more than 500 mV. 3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See Figure 2) 4. NCV prefix is for automotive and other applications requiring site and change control. http://onsemi.com 3 MC33201, MC33202, MC33204, NCV33202 DC ELECTRICAL CHARACTERISTICS (cont.) (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Characteristic Large Signal Voltage Gain (VCC = + 5.0 V, VEE = – 5.0 V) RL = 10 kΩ RL = 600 Ω Output Voltage Swing (VID = ± 0.2 V) RL = 10 kΩ RL = 10 kΩ RL = 600 Ω RL = 600 Ω Figure Symbol Min Typ Max 7 AVOL 50 25 300 250 – – VOH VOL VOH VOL 4.85 – 4.75 – 4.95 0.05 4.85 0.15 – 0.15 – 0.25 60 90 – 500 25 – 50 80 – – – 0.9 0.9 1.125 1.125 Unit kV/V 8, 9, 10 V Common Mode Rejection (Vin = 0 V to 5.0 V) 11 CMR Power Supply Rejection Ratio VCC/VEE = 5.0 V/Gnd to 3.0 V/Gnd 12 PSRR Output Short Circuit Current (Source and Sink) 13, 14 ISC Power Supply Current per Amplifier (VO = 0 V) TA = – 40° to +105°C TA = – 55° to +125°C 15 ID dB µV/V mA mA AC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Characteristic Slew Rate (VS = ± 2.5 V, VO = – 2.0 V to + 2.0 V, RL = 2.0 kΩ, AV = +1.0) Gain Bandwidth Product (f = 100 kHz) Figure Symbol 16, 26 SR Min Typ Max 0.5 1.0 – Unit V/µs 17 GBW – 2.2 – MHz Gain Margin (RL = 600 Ω, CL = 0 pF) 20, 21, 22 AM – 12 – dB Phase Margin (RL = 600 Ω, CL = 0 pF) 20, 21, 22 M – 65 – Deg CS – 90 – dB BWP – 28 – kHz – – 0.002 0.008 – – – 100 – Rin – 200 – kΩ Cin – 8.0 – pF – – 25 20 – – – – 0.8 0.2 – – Channel Separation (f = 1.0 Hz to 20 kHz, AV = 100) 23 Power Bandwidth (VO = 4.0 Vpp, RL = 600 Ω, THD ≤ 1 %) Total Harmonic Distortion (RL = 600 Ω, VO = 1.0 Vpp, AV = 1.0) f = 1.0 kHz f = 10 kHz 24 THD % ZO Open Loop Output Impedance (VO = 0 V, f = 2.0 MHz, AV = 10) Differential Input Resistance (VCM = 0 V) Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (RS = 100 Ω) f = 10 Hz f = 1.0 kHz 25 Equivalent Input Noise Current f = 10 Hz f = 1.0 kHz 25 http://onsemi.com 4 Ω en in nV/ Hz pA/ Hz 2500 40 PERCENTAGE OF AMPLIFIERS (%) PD(max) , MAXIMUM POWER DISSIPATION (mW MC33201, MC33202, MC33204, NCV33202 8 and 14 Pin DIP Pkg 2000 TSSOP-14 Pkg 1500 SO-14 Pkg 1000 SO-8 Pkg 500 0 -55 -40 -25 0 25 50 85 TA, AMBIENT TEMPERATURE (°C) 30 25 20 15 10 5.0 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 VIO, INPUT OFFSET VOLTAGE (mV) 125 Figure 2. Maximum Power Dissipation versus Temperature 50 200 I IB , INPUT BIAS CURRENT (nA) PERCENTAGE OF AMPLIFIERS (%) 30 120 10 -10 0 10 20 30 40 VCM = 0 V to 0.5 V 80 VCM > 1.0 V 40 0 -55 -40 -25 50 TCV , INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (µV/°C) IO 25 70 85 125 Figure 5. Input Bias Current versus Temperature 150 300 A VOL , OPEN LOOP VOLTAGE GAIN (kV/V) I IB , INPUT BIAS CURRENT (nA) 0 TA, AMBIENT TEMPERATURE (°C) Figure 4. Input Offset Voltage Temperature Coefficient Distribution 100 260 50 0 220 -50 180 -100 -150 VCC = 12 V VEE = Gnd TA = 25°C -200 -250 10 VCC = +5.0 V VEE = Gnd 160 20 0 -50 -40 -30 -20 8.0 Figure 3. Input Offset Voltage Distribution 360 amplifiers tested from 3 (MC33204) wafer lots VCC = +5.0 V VEE = Gnd TA = 25°C DIP Package 40 360 amplifiers tested from 3 (MC33204) wafer lots VCC = +5.0 V VEE = Gnd TA = 25°C DIP Package 35 0 2.0 4.0 6.0 8.0 10 VCM, INPUT COMMON MODE VOLTAGE (V) 140 VCC = +5.0 V VEE = Gnd RL = 600 Ω ∆VO = 0.5 V to 4.5 V 100 -55 -40 -25 12 Figure 6. Input Bias Current versus Common Mode Voltage 0 25 70 85 TA, AMBIENT TEMPERATURE (°C) 105 Figure 7. Open Loop Voltage Gain versus Temperature http://onsemi.com 5 125 VO, OUTPUT VOLTAGE (Vpp ) 12 VSAT, OUTPUT SATURATION VOLTAGE (V) MC33201, MC33202, MC33204, NCV33202 RL = 600 Ω TA = 25°C 10 8.0 6.0 4.0 2.0 0 ±1.0 ±2.0 ±3.0 ±4.0 ±5.0 VCC,VEE SUPPLY VOLTAGE (V) ±6.0 TA = 125°C VCC - 0.4 V CMR, COMMON MODE REJECTION (dB) VO, OUTPUT VOLTAGE (Vpp ) 6.0 10 IL, LOAD CURRENT (mA) VEE 20 15 VCC = +6.0 V VEE = -6.0 V RL = 600 Ω AV = +1.0 TA = 25°C 100 80 60 40 VCC = +6.0 V VEE = -6.0 V TA = -55° to +125°C 20 0 1.0 M 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Figure 11. Common Mode Rejection versus Frequency I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) PSR, POWER SUPPLY REJECTION (dB) VEE + 0.2 V TA = -55°C 5.0 Figure 10. Output Voltage versus Frequency 120 100 100 PSR+ 80 60 PSR- 40 VCC = +6.0 V VEE = -6.0 V TA = -55° to +125°C 20 0 TA = 25°C TA = 125°C Figure 9. Output Saturation Voltage versus Load Current 9.0 10 k 100 k f, FREQUENCY (Hz) VEE + 0.4 V VCC = +5.0 V VEE = -5.0 V 0 12 0 1.0 k VCC - 0.2 V TA = 25°C Figure 8. Output Voltage Swing versus Supply Voltage 3.0 VCC TA = -55°C 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Source 80 60 Sink 40 VCC = +6.0 V VEE = -6.0 V TA = 25°C 20 0 0 1.0 2.0 3.0 4.0 5.0 Vout, OUTPUT VOLTAGE (V) Figure 12. Power Supply Rejection versus Frequency Figure 13. Output Short Circuit Current versus Output Voltage http://onsemi.com 6 6.0 125 2.0 VCC = +5.0 V VEE = Gnd 1.6 100 Source 75 TA = 125°C 1.2 Sink TA = 25°C 0.8 50 TA = -55°C 0.4 25 0 -55 -40 -25 0 25 70 85 TA, AMBIENT TEMPERATURE (°C) 105 125 0 ±0 ±1.0 1.5 VCC = +2.5 V VEE = -2.5 V VO = ±2.0 V +Slew Rate 1.0 -Slew Rate 0.5 0 25 70 85 105 1.0 0 -55 -40 -25 0 25 70 85 105 Figure 16. Slew Rate versus Temperature Figure 17. Gain Bandwidth Product versus Temperature 40 VS = ±6.0 V TA = 25°C RL = 600 Ω 80 30 120 2A 10 A 2.0 TA, AMBIENT TEMPERATURE (°C) 50 -30 10 k VCC = +2.5 V VEE = -2.5 V f = 100 kHz TA, AMBIENT TEMPERATURE (°C) 70 -10 3.0 125 2B 1A - Phase, CL = 0 pF 1B - Gain, CL = 0 pF 2A - Phase, CL = 300 pF 2B - Gain, CL = 300 pF 100 k 1B 1.0 M 1A 160 200 , EXCESS PHASE (DEGREES) , OPEN LOOP VOLTAGE GAIN (dB) VOL 0 -55 -40 -25 4.0 A VOL, OPEN LOOP VOLTAGE GAIN (dB) SR, SLEW RATE (V/µ s) 2.0 ±6.0 Figure 15. Supply Current per Amplifier versus Supply Voltage with No Load GBW, GAIN BANDWIDTH PRODUCT (MHz) Figure 14. Output Short Circuit Current versus Temperature ±2.0 ±3.0 ±4.0 ±5.0 VCC, VEE, SUPPLY VOLTAGE (V) 70 30 1A 10 -10 1A - Phase, VS = ±6.0 V 1B - Gain, VS = ±6.0 V 2A - Phase, VS = ±1.0 V 2B - Gain, VS = ±1.0 V f, FREQUENCY (Hz) 100 k 1B 2B 1.0 M f, FREQUENCY (Hz) Figure 18. Voltage Gain and Phase versus Frequency Figure 19. Voltage Gain and Phase versus Frequency http://onsemi.com 7 80 120 2A -30 10 k 240 10 M 40 CL = 0 pF TA = 25°C RL = 600 Ω 50 125 160 200 240 10 M , EXCESS PHASE (DEGREES) 150 I CC , SUPPLY CURRENT PER AMPLIFIER (mA) I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) MC33201, MC33202, MC33204, NCV33202 MC33201, MC33202, MC33204, NCV33202 60 50 40 30 VCC = +6.0 V VEE = -6.0 V RL = 600 Ω CL = 100 pF 40 30 20 20 10 10 Gain Margin 0 -55 -40 -25 0 25 70 85 105 60 60 VCC = +6.0 V VEE = -6.0 V TA = 25°C 45 30 15 0 0 125 10 100 60 Gain Margin THD, TOTAL HARMONIC DISTORTION (%) 14 12 10 40 8.0 30 6.0 20 4.0 10 2.0 0 10 10 1.0 0 1.0 k 100 0.01 0.001 10 90 AV = 10 60 VCC = +6.0 V VEE = -6.0 V VO = 8.0 Vpp TA = 25°C 30 0 100 1.0 k 10 k f, FREQUENCY (Hz) Figure 22. Gain and Phase Margin versus Capacitive Load Figure 23. Channel Separation versus Frequency VCC = +5.0 V TA = 25°C VO = 2.0 Vpp VEE = -5.0 V RL = 600 Ω AV = 100 AV = 10 AV = 1.0 100 1.0 k 10 k 0 100 k AV = 100 120 CL, CAPACITIVE LOAD (pF) AV = 1000 0.1 10 k 150 100 k en , EQUIVALENT INPUT NOISE VOLTAGE (nV/ Hz) 50 16 CS, CHANNEL SEPARATION (dB) Phase Margin 1.0 k Figure 21. Gain and Phase Margin versus Differential Source Resistance A , GAIN MARGIN (dB) M M , PHASE MARGIN (DEGREES) 70 15 RT, DIFFERENTIAL SOURCE RESISTANCE (Ω) Figure 20. Gain and Phase Margin versus Temperature VCC = +6.0 V VEE = -6.0 V RL = 600 Ω AV = 100 TA = 25°C 30 Gain Margin TA, AMBIENT TEMPERATURE (°C) 80 45 50 VCC = +6.0 V VEE = -6.0 V TA = 25°C 40 30 Noise Voltage 20 2.0 1.0 10 Noise Current 0 10 100 1.0 k 10 k f, FREQUENCY (Hz) Figure 25. Equivalent Input Noise Voltage and Current versus Frequency http://onsemi.com 8 4.0 3.0 f, FREQUENCY (Hz) Figure 24. Total Harmonic Distortion versus Frequency 5.0 0 100 k i n , INPUT REFERRED NOISE CURRENT (pA/ Hz) 50 75 Phase Margin M , PHASE MARGIN (DEGREES) 60 75 A , GAIN MARGIN (dB) M M , PHASE MARGIN (DEGREES) Phase Margin A , GAIN MARGIN (dB) M 70 70 MC33201, MC33202, MC33204, NCV33202 DETAILED OPERATING DESCRIPTION Circuit Information The MC33201/2/4 family of operational amplifiers are unique in their ability to swing rail–to–rail on both the input and the output with a completely bipolar design. This offers low noise, high output current capability and a wide common mode input voltage range even with low supply voltages. Operation is guaranteed over an extended temperature range and at supply voltages of 2.0 V, 3.3 V and 5.0 V and ground. Since the common mode input voltage range extends from VCC to VEE, it can be operated with either single or split voltage supplies. The MC33201/2/4 are guaranteed not to latch or phase reverse over the entire common mode range, however, the inputs should not be allowed to exceed maximum ratings. Rail–to–rail performance is achieved at the input of the amplifiers by using parallel NPN–PNP differential input stages. When the inputs are within 800 mV of the negative rail, the PNP stage is on. When the inputs are more than 800 mV greater than VEE, the NPN stage is on. This switching of input pairs will cause a reversal of input bias currents (see Figure 6). Also, slight differences in offset voltage may be noted between the NPN and PNP pairs. Cross–coupling techniques have been used to keep this change to a minimum. In addition to its rail–to–rail performance, the output stage is current boosted to provide 80 mA of output current, enabling the op amp to drive 600 Ω loads. Because of this high output current capability, care should be taken not to exceed the 150°C maximum junction temperature. VCC = +6.0 V VEE = -6.0 V RL = 600 Ω CL = 100 pF TA = 25°C V , OUTPUT VOLTAGE (50 mV/DIV) O VCC = +6.0 V VEE = -6.0 V RL = 600 Ω CL = 100 pF TA = 25°C t, TIME (5.0 µs/DIV) t, TIME (10 µs/DIV) Figure 26. Noninverting Amplifier Slew Rate V , OUTPUT VOLTAGE (2.0 V/DIV) O V , OUTPUT VOLTAGE (2.0 mV/DIV) O General Information Figure 27. Small Signal Transient Response VCC = +6.0 V VEE = -6.0 V RL = 600 Ω CL = 100 pF AV = 1.0 TA = 25°C t, TIME (10 µs/DIV) Figure 28. Large Signal Transient Response http://onsemi.com 9 MC33201, MC33202, MC33204, NCV33202 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self–align when subjected to a solder reflow process. Micro–8 0.208 5.28 0.041 1.04 0.126 3.20 0.015 0.38 0.0256 0.65 inches mm http://onsemi.com 10 MC33201, MC33202, MC33204, NCV33202 ORDERING INFORMATION Operational Amplifier Function Operating Temperature Range Device Package Shipping SO–8 98 Units / Rail MC33201D MC33201DR2 Single SO–8 2500 Units / Tape & Reel Plastic DIP 50 Units / Rail SO–8 98 Units / Rail SO–8 98 Units / Rail SO–8 2500 Units / Tape & Reel Micro–8 4000 Units / Tape & Reel Plastic DIP 50 Units / Rail TA= –40° to +105°C MC33201P MC33201VD TA = –55° to 125°C MC33202D MC33202DR2 TA= –40 40 ° to +105°C MC33202DMR2 MC33202P Dual MC33202VD SO–8 98 Units / Rail MC33202VDR2 SO–8 2500 Units / Tape & Reel SO–8 2500 Units / Tape & Reel Plastic DIP 50 Units / Rail MC33204D SO–14 55 Units / Rail MC33204DR2 SO–14 2500 Units / Tape & Reel TA = –55° 55° to 125°C NCV33202VDR2* MC33202VP TA= –40 ° to +105°C MC33204DTB Quad TSSOP–14 96 Units / Rail MC33204DTBR2 TSSOP–14 2500 Units / Tape & Reel MC33204P Plastic DIP 25 Units / Rail SO–14 55 Units / Rail SO–14 2500 Units / Tape & Reel Plastic DIP 25 Units / Rail MC33204VD MC33204VDR2 TA = –55° to 125°C MC33204VP *NCV33202: Tlow = –55°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and change control. MARKING DIAGRAMS 8 3320x ALYW 1 MC3320xP AWL YYWW 1 MC33204D AWLYWW PDIP–14 VP SUFFIX CASE 646 TSSOP–14 DTB SUFFIX CASE 948G 14 MC33204VP AWLYYWW MC33 204 ALYW 14 1 3202 AYW 1 MC33204P AWLYYWW MC33204VD AWLYWW 1 8 PDIP–14 P SUFFIX CASE 646 14 14 Micro–8 DM SUFFIX CASE 846A MC33202VP AWL YYWW 1 SO–14 VD SUFFIX CASE 751A SO–14 D SUFFIX CASE 751A 14 8 320xV ALYW 1 1 8 8 PDIP–8 VP SUFFIX CASE 626 PDIP–8 P SUFFIX CASE 626 SO–8 VD SUFFIX CASE 751 SO–8 D SUFFIX CASE 751 1 x = 1 or 2 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week http://onsemi.com 11 1 MC33201, MC33202, MC33204, NCV33202 PACKAGE DIMENSIONS PDIP–8 P, VP SUFFIX CASE 626–05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 –B– 1 4 DIM A B C D F G H J K L M N F –A– NOTE 2 L C J –T– MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10 0.030 0.040 N SEATING PLANE D M K G H 0.13 (0.005) M T A M B M SO–8 D, VD SUFFIX CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M S http://onsemi.com 12 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC33201, MC33202, MC33204, NCV33202 PACKAGE DIMENSIONS PDIP–14 P, VP SUFFIX CASE 646–06 ISSUE M 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F DIM A B C D F G H J K L M N L N C –T– SEATING PLANE J K H D 14 PL G M 0.13 (0.005) INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --10 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --10 0.38 1.01 M SO–14 D, VD SUFFIX CASE 751A–03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– 14 8 –B– 1 P 7 PL 0.25 (0.010) 7 G M B M F R X 45 C –T– SEATING PLANE 0.25 (0.010) M T B J M K D 14 PL S A S http://onsemi.com 13 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.228 0.244 0.010 0.019 MC33201, MC33202, MC33204, NCV33202 PACKAGE DIMENSIONS TSSOP–14 DTB SUFFIX CASE 948G–01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S S N 2X 14 L/2 0.25 (0.010) 8 M B –U– L PIN 1 IDENT. F 7 1 0.15 (0.006) T U N S DETAIL E K A –V– ÉÉ ÇÇ ÇÇ ÉÉ K1 J J1 SECTION N–N –W– C 0.10 (0.004) –T– SEATING PLANE D G H DETAIL E http://onsemi.com 14 DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0 8 MC33201, MC33202, MC33204, NCV33202 PACKAGE DIMENSIONS Micro–8 DM SUFFIX CASE 846A–02 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. –A– –B– K PIN 1 ID G D 8 PL 0.08 (0.003) –T– M T B S A S SEATING PLANE 0.038 (0.0015) C H L J http://onsemi.com 15 DIM A B C D G H J K L MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 --1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 --0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 MC33201, MC33202, MC33204, NCV33202 ON Semiconductor is a trademark and is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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