UC5605 9-Line Low Capacitance SCSI Active Terminator FEATURES DESCRIPTION • Reverse Disconnect • Complies with SCSI, SCSI-2 and SPI-2 Standards The UC5605 provides 9 lines of active termination for a SCSI (Small Computer Systems Interface) parallel bus. The SCSI standard recommends active termination at both ends of the cable segment. • 5pF Channel Capacitance during Disconnect • Hot Plugging Capability • −400mA Sourcing Current for Termination • +100mA Sinking Current for Active Negation • 1V Dropout Voltage Regulator • 100µA Supply Current in Disconnect Mode • Trimmed Termination Current to 5% • Trimmed Impedance to 5% • Low Thermal Resistance Surface Mount Packages The only functional differences between the UC5603 and UC5605 is the absence of the negative clamps on the output lines and the disconnect input must be at a logic-low for the terminating resistors to be disconnected. Parametrically, the UC5605 has a 5% tolerance on impedance and current compared to a 3% tolerance on the UC5603. Custom power packages are utilized to allow normal operation at full power (2 Watts). The UC5605 provides a disconnect feature which, when driven low, disconnects all terminating resistors, disables the regulator and greatly reduces standby power consumption. The output channels remain high impedance even without Termpwr applied. A low channel capacitance of 5pF allows interim points of the bus to have little to no effect on the signal integrity. Internal circuit trimming is utilized, first to trim the impedance to a 5% tolerance, and then most importantly, to trim the output current to a 5% tolerance, as close to the maximum SCSI specification as possible. This maximizes the noise margin in fast SCSI operation. Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry standard 16 pin narrow body SOIC, 16 pin ZIP (zig-zag in line package) and 24 pin TSSOP. BLOCK DIAGRAM UDG-94122 Circuit Design Patented 3/97 Powered by ICminer.com Electronic-Library Service CopyRight 2003 UC5605 ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6A Storage Temperature . . . . . . . . . . . . . . . . . . . −65°C to +150°C Operating Temperature . . . . . . . . . . . . . . . . . −55°C to +150°C Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . +300°C Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Unitrode Integrated Circuits databook for thermal limitations and considerations of packages. Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V to 5.25V Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +5V Disconnect Input Voltage . . . . . . . . . . . . . . . . . . 0V to Termpwr CONNECTION DIAGRAMS DIL-16 (Top View) N or J Package ZIP-16 (Top View) Z Package SOIC-16 (Top View) DP Package TSSOP-24 (Top View) PWP Package * DP package pin 5 serves as signal ground; pins 4, 12, 13 serve as heatsink/ground. * PWP package pin 9 serves as signal ground; pins 5, 6, 7, 8, 17, 18, 19, and 20 serve as heatsink/ground. Note: Drawings are not to scale. Powered by ICminer.com Electronic-Library Service CopyRight 2003 2 UC5605 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = 0°C to 70°C. TRMPWR = 4.75V, DISCNCT = 2.4V, TA = TJ. PARAMETER Supply Current Section Termpwr Supply Current TEST CONDITIONS All termination lines = Open All termination lines = 0.5V DISCNCT = 0V Power Down Mode Output Section (Termination Lines) Terminator Impedance ∆ILINE = -5mA to -15mA Output High Voltage TRMPWR = 4V Max Output Current VLINE = 0.5V Max Output Current Output Leakage Output Capacitance Regulator Section Regulator Output Voltage Line Regulation Drop Out Voltage Short Circuit Current Sinking Current Capability Thermal Shutdown Thermal Shutdown Hysteresis Disconnect Section Disconnect Threshold TJ = 25°C 0°C < TJ < 70°C TJ = 25°C VLINE = 0.5V, TRMPWR = 4V (Note 1) 0°C < TJ < 70°C VLINE = 0.2V, TRMPWR = 4.0V to 5.25V 0°C < TJ < 70°C DISCNCT = 0V REG = 0V VLINE = 0 to 4V TRMPWR = 0V to 5.25V VLINE = 5.25V REG = Open VLINE = 0V to 5.25V DISCNCT = 0V (Note 2) (DP Package) All Termination Lines = 4V TRMPWR = 4V to 6V All Termination Lines = 0.5V REG = 0V REG = 3.5V MIN 104.5 2.65 -20.3 -19.8 -19.5 -19.0 –21.6 TYP MAX UNITS 17 200 100 23 225 150 mA mA µA 110 2.9 -21.5 -21.5 -21.5 -21.5 –24.0 10 115.5 3.1 -22.4 -22.4 -22.4 -22.4 –25.4 400 100 400 6 Ohms V mA mA mA mA mA nA µA nA pF 2.9 2.9 10 1.0 -400 100 170 10 3.1 3.1 20 1.2 -600 400 V V mV V mA mA °C °C 1.4 1.7 V 10 5 2.7 2.7 -200 75 1.1 Note 1: Measuring each termination line while other 8 are low. Note 2: Guaranteed by design. Not 100% tested in production. APPLICATION INFORMATION UDG-94123 Figure 1: Typical SCSI Bus Configurations Utilizing 2 UC5605 Devices Powered by ICminer.com Electronic-Library Service CopyRight 2003 3 UC5605 APPLICATION INFORMATION (cont.) UDG-94129 Figure 2: Typical Wide SCSI Bus Configurations Utilizing 3 UC5605 Devices. UNITRODE CORPORATION 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1999, Texas Instruments Incorporated Powered by ICminer.com Electronic-Library Service CopyRight 2003