SaRonix Voltage Controlled Crystal Oscillator Technical Data ACTUAL SIZE 3.3V, LVCMOS S1300 / S1309 / ST1300 / ST1309 Series Frequency Range: 1.5 MHz to 28.6363 MHz Frequency Stability: ±20, ±25 or ±50ppm over all conditions: operating temperature, voltage change, load change, calibration tolerance, shock and vibration, with VC = 1.65V Aging @ 25°C: ± 3ppm max per year, ±10ppm max for 10 years Temperature Range: Operating: Storage: 0 to +70°C or -40 to +85°C -55 to +125°C Supply Voltage: Recommended Operating: 3.3V ±10% Supply Current: 10mA typ, 15mA max Output Drive: Description A 3.3V, voltage controlled crystal oscillator with output logic levels compatible with LVCMOS and LVTTL logic families. The series is designed with excellent Jitter characteristics which makes it ideal for use in Telecom and Datacom applications. True SMD DIL versions for IR reflow are available, select option "S" in part number builder. See separate data sheet for SMD package dimensions. Applications & Features • Phase-Locked Loop (PLL) Clock and Data Recovery, Frequency Transaltion, Frequency Synthesis apps in Video, Video Compression, Telephony, and LAN/WAN Data Communication • 3.3 Volt operations • LVCMOS / LVTTL compatible • 3.5ps max RMS period jitter • Wide range of performance options: ±50 to ±100 ppm APR* ±20 to ±50 ppm Frequency Stability • Tri-State option • True SMD for IR reflow available Symmetry: Rise & Fall Times: Logic 0: Logic 1: Load: Jitter: Pull Characteristics: Input Impedance (pin 1): Frequency Response (-3dB): Pullability: Control Voltage: Transfer Function: Linearity: Center Control Voltage: 45/55% max @ 50% VDD 9ns max 20% to 80% VDD 10% VDD max 90% VDD min 30pF 3.5ps max RMS period jitter 50KΩ min 10 kHz min ±50, ±70, ±100ppm APR* min 0.3 to 3.0V Frequency Increases when Control Voltage Increases 5 or 10% max 1.65V Mechanical: Shock: Solderability: Terminal Strength: Vibration: Solvent Resistance: Resistance to Soldering Heat: Environmental: Gross Leak Test: Fine Leak Test: Thermal Shock: Moisture Resistance: MIL-STD-883, Method 2002, Condition B MIL-STD-883, Method 2003 MIL-STD-883, Method 2004, Condition B2 MIL-STD-883, Method 2007, Condition A MIL-STD-202, Method 215 MIL-STD-202, Method 210, Conditions A, B or C ( I or J for Gull Wing) MIL-STD-883C, MIL-STD-883C, MIL-STD-883C, MIL-STD-883C, Method Method Method Method 1014, Condition C 1014, Condition A2 1011, Condition A 1004 Output Waveform CMOS Tr Tf Logic 1 80%VDD 50%VDD * APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability) 20%VDD NOTE: APR is inclusive of 10 Years Aging Logic 0 SYMMETRY SaRonix DS-126 REV E 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894 SaRonix Voltage Controlled Crystal Oscillator Technical Data S1300 / S1309 / ST1300 / ST1309 Series Package Details Part Numbering Guide 5.08 max .200 0.91 .036 max 21.0 max .825 6.35±0.51 0.25±0.02 3.94±.25 .155±.010 .46±.08 .018±.003 15.24±.13 .600±.005 Pin 3 Pin 1 Pin 7 13.0 .510 max 7.75 max .305 Pin 12 Pin 14 3.3V, LVCMOS Pin 8 (4) Glass Insulators S T 130 9 A A A J - 19.4400 (T) SaRonix Packing Method (T) = Tape & Reel for SMD versions, full reel increments only (200pcs) Blank = Bulk Blank = Non Tri-State T = Tri-State (6 pins) Supply Voltage 130 = 3.3V Frequency (MHz) Package Size 0 = Full Size 9 = 1/2 Size Stability Tolerance AA = ±20ppm, 0 to +70°C A = ±25ppm, 0 to +70°C B = ±50ppm, 0 to +70°C E = ±50ppm, -40 to +85°C Pin Function: Pin 8: OUTPUT Pin 12: N/C (optional) Pin 14: +3.3VDC (VDD) Pin 1: Control Voltage Pin 3: Tri-State control (optional) Pin 7: GND/Case (VSS) Lead/Package Types Blank = Thru-Hole S = True SMD Adaptor for DIL14 J = Gull Wing Linearity A = 5% B = 10% Pullability (Minimum APR)** A = ±50 ppm M = ±70 ppm B = ±100 ppm, not available at all frequencies ** APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability) NOTE: APR is inclusive of 10 Years Aging Marking Format ** Includes Date Code, Frequency & Part Number Tri-State Logic Table SARONIX VCXO Pin 3(2) Input Logic 1 or NC Logic 0 or GND Denotes Pin 1 HALF SIZE PACKAGE Pin 8(5) Output Oscillation High Impedance Required Input Levels on Pin 3(2): Logic 1 = 0.7 VDD min Logic 0 = 0.3 VDD max 13.0 max .510 0.91 max .036 5.08 max .200 Test Circuit .46±.08 .018±.003 Pin 2 Optional Tri-State Control 6.35±0.51 0.25±0.02 TEST POINT 2.54 .100 7.62±.20 .300±.008 mA M Pin 4 GND Case (VSS) Pin 8(5) Pin 14(8) Pin 1 Control Voltage 13.0 .510 max 7.62±.20 .300±.008 Pin 8 V DD Pin 5 Output POWER SUPPLY VDD OUT OSCILLATOR VM C L (Note A) = 30pF GND Pin 1(1)* Pin 3(2) Pin 7(4) Marking Format** Includes Date Code, Frequency & Part Number SARONIX CONTROL VOLTAGE OPTIONAL TRI-STATE NOTE A: CL includes probe and fixture capacitance * Items in brackets( ) represent Half Size model Denotes Pin 1 **Exact location of items may vary mm Scale: None (Dimensions in ) inches SaRonix All specifications are subject to change without notice. DS-126 REV E 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894 SaRonix True SMD Adaptor Technical Data SaRonix 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894