ETC HD74LV1GW98A

HD74LV1GW98A
Configurable Multiple–Function Gate
ADE-205-720 (Z)
Rev.0
Feb. 2003
Description
The HD74LV1GW98A has configurable multiple–function gate in a 6 pin package. The Output state is
determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR,
NOR, INVERTER, Non–Inverted Buffer, Data Selector. Low voltage and high speed operation is suitable
for the battery powered products (e.g., notebook computers), and the low power consumption extends the
battery life.
Features
• The basic gate function is lined up as hitachi uni logic series.
• Supplied on emboss taping for high speed automatic mounting.
• Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping
Abbreviation (Quantity)
HD74LV1GW98ACME
CMPAK-6 pin
CMPAK-6V(O)
CM
E (3,000 pcs / Reel)
HD74LV1GW98A
Outline and Article Indication
• HD74LV1GW98A
Index band
Marking
W 1
= Control code
CMPAK–6
Function Table
Inputs
Output
IN2
IN1
IN0
Y
L
L
L
H
L
L
H
H
L
H
L
L
L
H
H
L
H
L
L
H
H
L
H
L
H
H
L
H
H
H
H
L
H : High level
L : Low level
Rev.0, Feb. 2003, page 2 of 12
HD74LV1GW98A
Pin Arrangement
IN1
1
6
IN2
GND
2
5
VCC
IN0
3
4
Y
(Top view)
Logic Diagram
IN0
Y
IN1
IN2
Rev.0, Feb. 2003, page 3 of 12
HD74LV1GW98A
Function Selection Table
Logic Function
Figure No.
2 to 1 data Selector
1
2–inputs NAND
2
2–inputs NOR with one input inverted
3
2–inputs AND with one input inverted
3
2–inputs NAND with one input inverted
4
2–inputs OR with one input inverted
4
2–inputs NOR
5
Non–Invert Buffer
6
Inverter
7
Rev.0, Feb. 2003, page 4 of 12
HD74LV1GW98A
Logic Configurations
VCC
A/B
A
B
A
Y
1 (IN1)
(IN2) 6
A/B
2 (GND) (VCC) 5
B
3 (IN0)
(Y) 4
Y
Figure 1. 2 to 1 Data Selector
VCC
VCC
A
B
A
B
1 (IN1)
(IN2) 6
A
Y
2 (GND) (VCC) 5
Y
B
3 (IN0)
(Y) 4
1 (IN1)
A
B
Y
A
B
Y
(IN2) 6
B
2 (GND) (VCC) 5
A
Y
3 (IN0)
(Y) 4
Y
Figure 3. 2–inputs NOR Gate
with A input inverted
Figure 2. 2–inputs NAND Gate
VCC
VCC
B
A
B
Y
A
B
Y
1 (IN1)
(IN2) 6
A
2 (GND) (VCC) 5
3 (IN0)
(Y) 4
Y
A
B
Y
A
B
Y
B
1 (IN1)
(IN2) 6
A
2 (GND) (VCC) 5
3 (IN0)
Figure 4. 2–inputs NAND Gate
with A input inverted
(Y) 4
Y
Figure 5. 2–inputs NOR Gate
VCC
1 (IN1)
A
Y
(IN2) 6
A
2 (GND) (VCC) 5
3 (IN0)
(Y) 4
Figure 6. Non–Invert Buffer
VCC
A
A
Y
Y
1 (IN1)
(IN2) 6
2 (GND) (VCC) 5
3 (IN0)
(Y) 4
Y
Figure 7. Inverter
Rev.0, Feb. 2003, page 5 of 12
HD74LV1GW98A
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range
*1
Output voltage range
*1, 2
Symbol
Ratings
Unit
VCC
–0.5 to 7.0
V
VI
–0.5 to 7.0
V
VO
–0.5 to VCC + 0.5
V
–0.5 to 7.0
Test Conditions
Output : H or L
VCC : OFF
Input clamp current
IIK
–20
mA
VI < 0
Output clamp current
IOK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±25
mA
VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND
±50
mA
Maximum power dissipation
at Ta = 25°C (in still air) *3
PT
200
mW
Storage temperature
Tstg
–65 to 150
°C
Notes:
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.0, Feb. 2003, page 6 of 12
HD74LV1GW98A
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Supply voltage range
VCC
1.65
5.5
V
Input voltage range
VI
0
5.5
V
Output voltage range
VO
0
VCC
V
Output current
IOL
—
1
mA
—
2
VCC = 2.3 to 2.7 V
—
6
VCC = 3.0 to 3.6 V
—
12
VCC = 4.5 to 5.5 V
—
–1
VCC = 1.65 to 1.95 V
—
–2
VCC = 2.3 to 2.7 V
—
–6
VCC = 3.0 to 3.6 V
—
–12
VCC = 4.5 to 5.5 V
0
300
0
200
VCC = 2.3 to 2.7 V
0
100
VCC = 3.0 to 3.6 V
0
20
VCC = 4.5 to 5.5 V
–40
85
IOH
Input transition rise or fall rate ∆t / ∆v
Operating free-air temperature Ta
ns / V
Conditions
VCC = 1.65 to 1.95 V
VCC = 1.65 to 1.95 V
°C
Note: Unused or floating inputs must be held high or low.
Rev.0, Feb. 2003, page 7 of 12
HD74LV1GW98A
Electrical Characteristic
• Ta = –40 to 85°C
Item
Threshold
voltage
Symbol VCC (V) *
VT
VT
+
–
∆VT
Output voltage
VOH
VOL
Min
Typ
Max
Unit
1.65 to 1.95 —
—
VCC×0.75 V
2.5
—
—
1.75
3.3
—
—
2.31
5.0
—
—
Test condition
3.50
1.65 to 1.95 VCC×0.25 —
—
2.5
0.75
—
—
3.3
0.99
—
—
5.0
1.5
—
—
1.65 to 1.95 0.1
—
VCC×0.4
2.5
0.25
—
1.0
3.3
0.33
—
1.32
5.0
0.5
—
2.0
Min to Max
VCC–0.1
—
—
1.65
1.4
—
—
IOH = –1 mA
2.3
2.0
—
—
IOH = –2 mA
3.0
2.48
—
—
IOH = –6 mA
4.5
3.8
—
—
IOH = –12 mA
Min to Max
—
—
0.1
IOL = 50 µA
1.65
—
—
0.3
IOL = 1 mA
2.3
—
—
0.4
IOL = 2 mA
3.0
—
—
0.44
IOL = 6 mA
4.5
—
—
0.55
IOL = 12 mA
V
IOH = –50 µA
Input current
IIN
0 to 5.5
—
—
±1
µA
VIN = 5.5 V or GND
Quiescent
supply current
ICC
5.5
—
—
10
µA
VIN = VCC or GND,
IO = 0
Output leakage
current
IOFF
0
—
—
5
µA
VIN or VO = 0 to 5.5
V
3.3
—
3.0
—
pF
VIN = VCC or GND
Input capacitance CIN
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
Rev.0, Feb. 2003, page 8 of 12
HD74LV1GW98A
Switching Characteristics
• VCC = 1.8±0.15 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Ta = –40 to 85°C Unit Test
Min
Typ
Max
Min
Max
—
15.8
29.4
1.0
33.0
—
22.6
40.9
1.0
45.0
ns
FROM
Conditions (Input)
TO
(Output)
CL = 15 pF
Y
IN
CL = 50 pF
• VCC = 2.5±0.2 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Ta = –40 to 85°C Unit Test
Min
Typ
Max
Min
Max
—
9.4
17.6
1.0
21.0
—
12.6
22.6
1.0
26.5
FROM
Conditions (Input)
ns
CL = 15 pF
IN
TO
(Output)
Y
CL = 50 pF
• VCC = 3.3±0.3 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Ta = –40 to 85°C Unit Test
Min
Typ
Max
Min
Max
—
7.0
11.0
1.0
13.0
—
9.5
14.5
1.0
16.5
ns
FROM
Conditions (Input)
TO
(Output)
CL = 15 pF
Y
IN
CL = 50 pF
• VCC = 5.0±0.5 V
Item
Propagation
delay time
Symbol
tPLH
tPHL
Ta = 25°C
Ta = –40 to 85°C Unit Test
Min
Typ
Max
Min
—
4.8
6.8
1.0
8.0
—
6.3
8.8
1.0
10.0
FROM
Conditions (Input)
Max
ns
CL = 15 pF
IN
TO
(Output)
Y
CL = 50 pF
Operating Characteristics
• CL = 50 pF
Item
Power dissipation
capacitance
Symbol
CPD
VCC (V) Ta = 25°C
Min
Typ
Max
3.3
—
8.5
—
5.0
—
10.0
—
Unit
Test Conditions
pF
f = 10 MHz
Rev.0, Feb. 2003, page 9 of 12
HD74LV1GW98A
Test Circuit
Measurement point
CL *
Note: CL includes probe and jig capacitance.
• Waveforms
tr
tf
50%
50%
Input
VCC
90%
90%
10%
10%
t PLH
GND
t PHL
VOH
In phase output
50%
50%
VOL
VOH
50%
Out of phase output
t PHL
50%
t PLH
VOL
Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
2. The output are measured one at a time with one transition per measurement.
Rev.0, Feb. 2003, page 10 of 12
HD74LV1GW98A
Package Dimensions
Unit: mm
(1.3)
(0.65)
(2.1)
0.15 ± 0.05
1.3 ± 0.05*
(0.65)
0.025 – 0.1
+ 0.1
6 – 0.2 – 0.05
* Sn-Bi plating.
** The value does not include Resin Bar.
(One side: 0.15 mm (max))
0.88 – 0.03
(0.1)
+ 0.02
2.0 ± 0.1*
Hitachi Code
JEDEC
JEITA
Mass (reference value)
CMPAK-6V(O)
—
Conforms
0.006 g
Rev.0, Feb. 2003, page 11 of 12
HD74LV1GW98A
Disclaimer
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright © Hitachi, Ltd., 2003. All rights reserved. Printed in Japan.
Colophon 7.0
Rev.0, Feb. 2003, page 12 of 12