BIT3102A Beyond Innovation Technology Co., Ltd. Data Sheet BIT3102A Low Cost PWM CCFL Controller Version: 1.3 Notice: All information contained in this document is subject to change without notice. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Beyond Innovation Technology Co., Ltd. 03/02/27 Confidential page 1 of 6 BIT3102A Beyond Innovation Technology Co., Ltd. Features: Pin Layout: PWM Modulation Open Lamp Protection Internal UVLO (Under Voltage Look Out) function Dimming Control CMOS Totem Pole output NMOS output driving SOP /DIP Packing OUT 8 1 GND VDD RT CMP SST VIN- OLP 4 5 General Description: Applications: To aim at the Cold Cathode Fluorescent Lamp (CCFL) applications, the BIT3102A integrated all functions required in a single 8 pin chip. The chip provides a fully functioned PWM control circuit with a true lamp current feedback protection. By setting the required time for striking the lamp through SST , the open-lamp condition can be detected after lamp striking period. The lamp dimming can be done through a PWM feedback loop. CMOS process reduces the operating current (1mA typical) and NMOS output driving capability enhances the system efficiency. Cold Cathode Fluorescent Lamps system Notebook PC LCD Monitor Palm-top Computers Video Phone/ Door Phone Portable Instrumentation Personal Digital Assistants Airline Entertainment Centers Automotive Display ATM/ Financial Terminal POS Terminal Navigation Devices (GPS Equipment) Test Equipment Copiers and Office Equipment Medical Equipment Absolute Ratings: (if Ta=25℃) VDD…………………………………-0.3 ~ +13.7 V GND…………………………………±0.3 V Input Voltage………………………..-0.3 ~ VDD+0.3 V Operating Ambit Temperature…….0 ~ +70 ℃ Operating Junction Temperature….+150 ℃ Storage Temperature……………….-55~+150 ℃ Recommended Operating Condition: Supply Voltage…………………………….4.5 ~ 13.2 V Operating Frequency………………….….50K ~ 250K Hz Operating Ambient Temperature………...0 ~ 70 ℃ Functional Block Diagram: VDD= 4.5 ~ 13.2V OUT GND 1¡G1 Current Mirror VDD VDD 2.25V UVLO 0.75V 4.0V ISS 2.15V VDD 3.8V - 2.25V Band Gap Reference 0.75V Error Amplifier RT 1.5V - Ramp Wave Generator + 2.5V + + + - 325mV - Latch 03/02/27 SST + VDD VDD CMP VIN- Confidential OLP page 2 of 6 BIT3102A Beyond Innovation Technology Co., Ltd. Function Description: VSST = ISSRSS (1-e-t/RssCss); (Fig.a) Where ISS= VRT/RT ± 10%,and VRT =2.15V The output is disabled to "low" level and open lamp protection is disable while SST <0.325V. A ~ 180uA current is flow into INN to set the initial state. The PWM BI3102 RT controller is enable while 2.5V < SST < 0.325V. The open lamp protection circuit SST will be enable when VSST > 2.5V (Fig.b) The required time for striking Fig.a RT Rss Css 1¡G1 Current Mirror VDD VDD ISS 2.15V1.5V + - RT 2V Opan Lamp Enable - the lamp could be calculated as bellow: TSTRIKE = (RSSCSS) ln((ISSRSS-0.325)/(ISSRSS-2.175) ) TSTRIKE is decided by the characteristic of lamp. SST + UVLO: The Under-Voltage-Look-Out circuit turns the output driver off when supplying voltage drops to a specified low level. Band Gap Reference: This circuit provides a accuracy voltage reference which is very stable even though the operating temperature is variable. Base on this reference, a specified voltage can be generated which is used by another circuit. Ramp Wave Generator: This circuit generates a typical 140KHz ramp wave. (as RT =100 KΩ) The relation between frequency and resistor RT is as the equation below: Freq. (KHz) = 14000/RT(KΩ) PWM Controller: The pulse width modulation control circuit includes a ramp wave generator, an error amplifier and a comparator. These devices provide the required active components for the PWM feedback control application. The Power On Initialization and Open Lamp Protection: The current source ISS charges the external resistor and capacitor during power on process. The voltage drops on the SST pin will be increased as 2.5V Fig.b Table 1. Power On Initialization and Open Lamp Protection SST < 0.325V 2.5V < SST < 0.325V SST >2.5V OUT Disable to "Low" Enable Enable OLP Disable Disable Enable VINInternally Forced to "High" Externally Controlled Externally Controlled Pin Description: Pin No. 1 2 3 4 Names OUT VDD CMP Vin- 5 OLP 6 7 8 SST RT GND Description PWM output, logic high active for driving NMOS device. Supply voltage. PWM controller input, the output of error amplifier. PWM controller input, the inverting input of error amplifier. A voltage sense input pin. If voltage level is less than 325 mV after a user defined period of time, the chip will shut down the OUT and PWM circuits. A digital latch circuit latches this result. The latch condition will be released if the power be turned off. The timer for open lamp protection. Operation frequency control. Ground DC/AC Characteristics: Parameter Test Conditions Min. Typ.(Limits) Max. Unit 1.455 1.5 1.545 V 2 20 mV Reference Voltage Output voltage Measure VinVDD=12V, Ta=25°C Line regulation 03/02/27 VDD=4.5 ~ 13.2 V Confidential page 3 of 6 BIT3102A Beyond Innovation Technology Co., Ltd. Under Voltage Look Out Upper threshold voltage Ta=25℃ Hysteresis 3.8 4 4.2 V 0.1 0.2 0.3 V 140 160 KHz 250 KHz Ramp Wave Generator Frequency RT=100K Ω 120 Operating Frequency note 1 50 Output peak 2.25 V Output valley 0.75 V Error Amplifier note 1 Input voltage 0.75 2.25 V Open loop gain 60 80 dB Unit gain band width 1 1.5 MHz 2.15V/RT uA 2.5 V 325 mV 50 mV Open Lamp Enable Output current VDD=12V, Ta=25℃ Open lamp detection enable Open Lamp Protection Open lamp detection lower threshold VDD=12V, Ta=25℃ Hysteresis Output CMOS output impedance note 1 50 Ω Rising Time 1000pF load, 110 ns Falling Time note 1 100 ns Ta : ambient temperature. Note 1: It is guaranteed by design not 100% tested. Application Circuit: CN2 A low cost 1~2 lamp design. HV LV BIT3102A CN1 VDD BRIGHTNESS GND 1 2 3 4 1 2 3 OUT GND VDD RT CMP SST VIN- OLP 8 7 6 5 VDD=4.5V~13.2V BRIGHTNESS=DC 0~3.3V, 0V brightest dimming. CN2 may connect 1~2 CCFLs 03/02/27 Confidential page 4 of 6 BIT3102A Beyond Innovation Technology Co., Ltd. Order Information: BIT3102A-SO SOP type packing Part number Beyond Innovation Technology Co., Ltd. BIT3102A-DP DIP type packing Part number Beyond Innovation Technology Co., Ltd. 03/02/27 Confidential page 5 of 6 BIT3102A Beyond Innovation Technology Co., Ltd. Package Information : Unit: mm SOP type : DIP type : 03/02/27 Confidential page 6 of 6