ETC ALRS08FB

ALRS08FB
8-Ch Auto Sensitivity Calibration Capacitive Touch Sensor
SPECIFICATION V1.0
November, 2009
ADSemiconductor
ADSemiconductor®
ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
 Revision History
Rev.
1.0
Description of change
Initial Release (ALRS08FB)
Date
Originator
09.11.26
KD PARK
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
1 Specification
1.1 General Feature



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





8-Channel capacitive sensor with auto sensitivity calibration
Available LED PWM drive up to 8
2
Multi interface (Parallel outputs / I C serial interface)
Selectable output operation mode (Single output /Multi output)
Selectable output logic level (Active high / Active low)
Uniformly adjustable 64 steps sensitivity
Almost no external component needed
Low current consumption
Embedded common and normal noise elimination circuit
RoHS compliant 24MLF package
1.2 Application


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Home appliances (TV, Monitor keypads)
Mobile applications (PMP, MP3, Car navigation)
Membrane switch replacement
Sealed control panels, keypads
Touch screen replacement application
1.3 Package (24MLF)
※ Drawings not to scale
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2 Pin Description
VDD, GND
Supply voltage and ground pin
R.N.D
Radio frequency Noise Detection pin. Normally, R.N.D pin does not connect to anywhere.
But, in radio frequency noise environment, this pin must form a pattern line on PCB.
CS0~CS7
Capacitive sensor input pins.
VPP
VPP is external supply voltage for OTP writing.
RST
System reset input pin. High digital level on this pin makes internal system reset signal. ALRS08 has
another internal reset block which is for the power reset. So, RST connection is not always necessary and
in case of not use, this pin must be not connected to any circuitry.
D0~D7
Parallel output ports of CS0~CS7 respectively / LED PWM drive output ports. The structure of these
parallel output ports are can be selected open drain NMOS for active low output level operation as well as
open drain PMOS for active high output level operation.
SCL, SDA
2
2
SCL is I C clock input pin and SDA is I C data input-output pin. These ports have internal pull-up resistor
1
which can be activated by “global_ctrl1” register setting.
In case of not use, this pin must be not connected to any circuitry.
INT
Touch sensing interrupt output pin.
1
Refer to the chapter 8.2.6. Global option control 1 register
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
2.1 ALRS08 (24MLF package)
Pin No.
Name
I/O
1
CS3
Analog Input
Capacitive sensor input3
VDD/GND
2
CS4
Analog Input
Capacitive sensor input4
VDD/GND
3
CS5
Analog Input
Capacitive sensor input5
VDD/GND
4
CS6
Analog Input
Capacitive sensor input6
VDD/GND
5
CS7
Analog Input
Capacitive sensor input7
VDD/GND
6
R.N.D
Analog Input
Radio frequency Noise Detection pin
VDD/GND
7
VPP
Power
8
SCL
Digital Input
Digital
Input / Output
9
SDA
10
GND
Ground
11
RST
Digital Input
12
D0
13
Description
External OTP writing Power (11.5V)
2
I C clock input
Protection
GND
VDD/GND
2
I C data input-output
Open drain NMOS structure
Supply ground
VDD/GND
VDD
External system reset input(High active)
VDD/GND
Digital Output
Parallel output of CS0 (Active high/Active low)
LED PWM drive output0
Open drain NMOS/ PMOS structure
VDD/GND
D1
Digital Output
Parallel output of CS1 (Active high/Active low)
LED PWM drive output1
Open drain NMOS/ PMOS structure
VDD/GND
14
D2
Digital Output
Parallel output of CS2 (Active high/Active low)
LED PWM drive output2
Open drain NMOS/ PMOS structure
VDD/GND
15
D3
Digital Output
Parallel output of CS3 (Active high/Active low)
LED PWM drive output3
Open drain NMOS/ PMOS structure
VDD/GND
16
D4
Digital Output
Parallel output of CS4 (Active high/Active low)
LED PWM drive output4
Open drain NMOS/ PMOS structure
VDD/GND
17
D5
Digital Output
Parallel output of CS5 (Active high/Active low)
LED PWM drive output5
Open drain NMOS/ PMOS structure
VDD/GND
18
D6
Digital Output
Parallel output of CS6 (Active high/Active low)
LED PWM drive output6
Open drain NMOS/ PMOS structure
VDD/GND
19
D7
Digital Output
Parallel output of CS7 (Active high/Active low)
LED PWM drive output7
Open drain NMOS/ PMOS structure
VDD/GND
20
INT
Digital Output
Touch sensing interrupt output1
Open drain NMOS structure
VDD/GND
21
VDD
Power
22
CS0
Analog Input
Capacitive sensor input0
VDD/GND
23
CS1
Analog Input
Capacitive sensor input1
VDD/GND
24
CS2
Analog Input
Capacitive sensor input2
VDD/GND
Power (2.5V~5.5V)
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
3 Absolute Maximum Rating
Battery supply voltage
6V
Maximum voltage on any pin VDD+0.3
Maximum current on any PAD 100mA
Power Dissipation
800mW
Storage Temperature
-50 ~ 150℃
Operating Temperature
-20 ~ 75℃
Junction Temperature
150℃
Note : Unless any other command is noted, all above are operated in normal temperature.
4 ESD & Latch-up Characteristics
4.1 ESD Characteristics
Mode
H.B.M
M.M
C.D.M
Polarity
Max
Reference
8000V
VDD
8000V
VSS
8000V
P to P
600V
VDD
625V
VSS
500V
P to P
1000V
Field Induced Charge
Polarity
Max
Reference
Positive
100mA
Negative
-100mA
Positive
14.0V
Pos / Neg
Pos / Neg
-
4.2 Latch-up Characteristics
Mode
I Test
V supply over 5.0V
JESD78A
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
5 Electrical Characteristics
▪ Note : VDD=3.3V, Typical system frequency (Unless otherwise noted), TA = 25℃
Characteristics
Symbol
Test Condition
Min
Power supply requirement and current consumption
Operating voltage
VDD
2.5
OTP writing voltage
VPP
11
2
Slow calibration speed
VDD =
Normal calibration speed
3.3V
Fast calibration speed
Current consumption
IDD
Slow calibration speed
VDD =
Normal calibration speed
5.0V
Fast calibration speed
Reset and input level
Internal reset voltage
VDD_RST
TA = 25℃
Input high level
VIH
| IIH | ≤ +5μA
VDD*0.7
Input low level
VIL
| IIL | ≤ +5μA
–0.3
Slow calibration speed
Self calibration time after
TCAL
Normal calibration speed
system reset
Fast calibration speed
Internal P/U resister of
RP/U
SDA(SCL) and INT
Touch sensing performance
Minimum detective
ΔCMIN
0.1
capacitance difference
Sense input
CS
3
capacitance range
ΔC > ΔCMIN
Output impedance
Zo
(open drain)
ΔC < ΔCMIN
System performance
Max. output current
IOUT
Per unit drive output port
(LED drive current)
4
LED PWM control
NPWM
5
Sensitivity control
2
2
Max. I C SCL clock speed
fSCL_MAX
Maximum internal I C clock
Touch expired time
TEX
Normal calibration speed
-
2
Typ
Max
Units
3.3
11.5
55
90
160
80
120
210
5.5
12
85
120
210
130
180
280
V
V
1.8
㎂
2.0
VDD+0.3
VDD*0.3
V
V
V
100
80
60
-
msec
30(15)
-
kΩ
-
-
㎊
-
50
㎊
12
30M
-
Ω
-
8.0
㎃
256
64
30
2
-
step
step
MHz
sec
Slow calibration speed isn’t recommended if it has not problem of current consumption.
3
The sensitivity can be decreased with higher parallel capacitance of CS pin including parasitic capacitance made by
neighbor GND or other pattern. The series resistor(under 1kΩ) of CS can be used in noisy condition to avoid mal-function
from external surge and ESD.
4
Refer to the chapter 8.2.7. Global option control 2 register
Refer to the chapter 8.2.13. LED luminance control register
5
Refer to the chapter 8.2.11. Sensitivity register
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6 ALRS08 Implementation
6.1 Typical current consumption
ALRS08 uses internal bias circuit, so internal clock frequency and current consumption is fixed
and no external bias circuit is needed. ALRS08 has three optional calibrations speed. Faster
calibration speed needs more current consumption than normal or slower calibration speed.
2
6
Internal clock frequency and calibration speed can be changed by I C register setting . Slow
calibration speed isn’t recommended if it has not problem of current consumption. The typical
current consumption curve of ALRS08 is represented in accordance with VDD voltage as below.
Internal bias circuit can make the circuit design simple and reduce external components.
Typical current consumption curve of ALRS08
6
Refer to 8.2.6 Global option control 1
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6.2 CS implementation
ALRS08 has 64 step selections of sensitivity and internal surge protection resister. Sensitivity of
each sensing channel (CS) can be independently controlled on others. External components of
CS pin such as series resistor or parallel capacitor isn’t necessary. The parallel parasitic
capacitance of CS pins caused by touch line, touch pad and neighbor GND or other pattern
may affect sensitivity. The sensitivity will be decreased when bigger parallel parasitic
capacitance of CS pin is added.
Parallel capacitor (CS0~S7) of CS pin is useful in case of detail sensitivity mediation is required
such as for complementation sensitivity difference between channels. Same as above parallel
parasitic capacitance, sensitivity will be decreased when a big value of parallel capacitor
(CS0~S7) is used. Under 50pF capacitor can be used as sensitivity meditation capacitor and a
few pF is usually used. The RS, serial connection resistor of CS pins, may be used to avoid
mal-function from external surge and ESD. (It might be optional.) From 200Ω to 1kΩ is
recommended for RS. Refer to below CS pins application figure.
RS7
CS7<<
Touch PAD7
CS7
RS0
CS0<<
Touch PAD0
CS0
The ALRS08 has eight independent touch sensor input from CS0 to CS7. The internal touch
decision process of each channel is separated from others. Therefore eight channel touch key
board application can be designed by using only one ALRS08 without coupling problems.
The size and shape of PAD might have influence on the sensitivity. The sensitivity will be optimal
when the size of PAD is approximately an half of the first knuckle (it’s about 10 ㎜ｘ 7 ㎜). The
connection line of CS to touch PAD is recommended to be routed as short as possible to
prevent from abnormal touch detect caused by connection line.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6.3 D0~D7 implementation
6.3.1 LED drive
ALRS08 has a function to control the LED using D0~D7 ports. For using D0~D7 as LED driver
ports, LEDs and resisters must be equipped as below figure, and write the ‘par_output_mode’
7
8
bit of ‘global_ctrl2’ register as ‘0’. D0 ~ D7 ports can drive LEDs by ‘LED_control’ register
control. ALRS08 can drive up to 8 LED as below method.
VDD
VDD
LED0
LED7
RD0
RD7
D0 <<
D7 <<
6.3.2 Parallel output
9
ALRS08 has 2 parallel output mode controlled by ‘par_output_pol’ bit of ‘global_ctrl2’ register
setting. One is active high parallel output mode and the other is active low parallel output mode.
Structures of D0~D7 are same. In case of active high parallel output mode, parallel output
ports (D0~D7) have an open drain PMOS structure. In other case of active low parallel output
mode, parallel output ports (D0~D7) have an open drain NMOS structure. For this reason, both
parallel output modes of ALRS08 need ROUT as below figures. The maximum output drive current
is 8mA, so over a few kΩ must be used as ROUT. Normally 10kΩ is used as ROUT.
VDD
ROUT0
ROUT1
OUTPUT0
D0
OUTPUT1
D1
ROUT7
OUTPUT7
D7
Active low parallel output mode circuit
7
8
9
Refer to the chapter 8.2.7.
Refer to the chapter 8.2.4.
Refer to the chapter 8.2.7. Global option control 2.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
D0
OUTPUT0
ROUT0
D6
ROUT6
D7
OUTPUT6
ROUT7
OUTPUT7
GND
Active high parallel output mode circuit
6.4 INT (Interrupt output) implementation
10
There are two interrupt operation is possible and can be selected by ‘global_ctrl3’ register
setting. In first interrupt operation case, the interrupt pulse is generated only during short period
of every each channel touch start points and touch end point. In other interrupt operation case,
the interrupt pulse is generated during every each channel touch duration. Interrupt pulse has
logical low level in both two interrupt modes. Pull-up resister about a few kΩ is required for
interrupt output. Because of internal pull-up resister of INT which can be activated by
11
‘global_ctrl1’ register setting, external pull-up resister can be removed.
10
11
Refer to the chapter 8.2.8. Global option control 3.
Refer to the chapter 8.2.6. Global option control 1.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
6.5 RST implementation
ALRS08 has both internal and external reset. Internal reset is for the power reset of initial power
on time. External reset by RST pin input is for abrupt reset that is required for intensive system
reset. If abrupt reset is not required, there is no need to use RST pin and this RST pin has only
to be floating. High pulse signal of RST pin reset internal system.
6.6 Change initial reset register values (OTP writing)
ALRS08 has eight integrated OTP (One Time Programmable) ROM cells. So, initial reset register
values can be rewritten up to eight times. One OTP ROM cell size is 64-byte. User can write the
data eight times to the OTP.
There are three operation modes about OTP read/write. These are automatically load operation
mode, writing operation mode and reading operation mode.
Automatically load operation mode
After power reset, ALRS08 start to read the LSB of 00H address in each OTP ROM cells from
8th to 1st. ALRS08 automatically loads the data of the first OTP ROM cell of which LSB of 00H
address has ‘0’ into the control register. And then ALRS08 is starting to work with control
register values that are loaded from OTP ROM cell. If there are no OTP ROM cell which has ‘0’ in
LSB of 00H address, ALRS08 is working with initial control register value.
Writing operation mode
OTP ROM cell writing provides the flexible reset register values that control all the operation
options of ALRS08. So, additional communication programs on MCU for operation option select
or register value setting are not required.
12
There are two writing operation modes. When the ‘write_all’ bit of ‘mtp_cmd’ register is ‘0’,
single byte writing mode is activated. User can select OTP ROM cell and address on which new
register value is wanted to be written. OTP ROM cell selection is enabled by writing ‘mtp_sel_en’
13
bit of ‘usr_mtp_sel’ register ‘1’. When ‘mtp_sel_en’ bit of ‘usr_mtp_sel’ register is ‘0’, OTM ROM
cell is automatically selected from 1st to 8th. And, ‘org_usr_mtp_sel’ bits of ‘usr_mtp_sel’
register are for the OTP ROM selection. Read or write command register is ‘mtp_cmd’ registers
and user can start writing by ‘wr_start’ bit of ‘mtp_cmd’ register setting as ‘1’. This ‘wr_start’ bit
of ‘mtp_cmd’ register is recovered as ‘0’ at ending of writing.
When the ‘write_all’ bit of ‘mtp_cmd’ register is ‘1’, all bytes writing operation mode is activated.
User can write all register frame data on selected OTP ROM cell. At this writing operation mode,
only OTP ROM cell has to be selected. Writing start is same as single byte writing mode.
OTP ROM writing needs another 11.5V power supply voltage. VPP pin is for this writing 11.5V
power.
Reading operation mode
When OTP ROM data is required to be read, user can read all the OTP ROM cell date by reading
operation. When the ‘read_all’ bit of ‘mtp_cmd’ register is ‘0’, user can read one byte data that
12
13
Refer to the chapter 8.2.17. OTP ROM control register.
Refer to the chapter 8.2.17. OTP ROM cell select register.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
is written on selected address of selected OTP ROM cell. OTP ROM cell and address selection
are same as single byte writing operation mode. When ‘mtp_sel_en’ bit of ‘usr_mtp_sel’ register
is ‘0’, OTM ROM cell is automatically selected from 8th to 1st.
When the ‘read_all’ bit of ‘mtp_cmd’ register is ‘1’, user can read all data on selected OTP ROM
cell.
OTP ROM read start command bit is ‘rd_start’ bit of ‘mtp_cmd’ register. When the ‘rd_start’ bit
of ‘mtp_cmd’ register is ‘1’, ALRS08 starts to read. This ‘rd_start’ bit of ‘mtp_cmd’ register is
recovered as ‘0’ at ending of reading.
6.7 SCL, SDA implementation
2
2
SCL is I C clock input and SDA is I C data input-output. These ports have internal pull-up
14
resistor which can be activated by ‘global_ctrl1’ register setting. SCL has Schmitt trigger input
2
structure to prevent clock signal from being broken. Maximum supported I C clock frequency is
2MHz. SDA has NMOS open drain structure and internal pull-up resister of which value is 30kΩ
typical. So, according to communication speed a few kΩ resister must be used as pull-up
2
resister for proper data pulse rising time. For more details refer to ‘Chapter 7. I C Interface’.
14
Refer to the chapter 8.2.6. Global option control 1.
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7 I2C Interface
7.1 I2C Enable / Disable
2
If the SDA or SCL signal goes to low, I C control block is enabled automatically. And if the SDA
2
and SCL signal maintain high during about 2 us, I C control block is disabled automatically also.
7.2 Start & stop condition
 Start Condition (S)
 Stop Condition (P)
 Repeated Start (Sr)
7.3 Data validity
The SDA should be stable when the SCL is high and the SDA can be changed when the SCL is
low.
7.4 Byte format
The byte structure is composed with 8Bit data and an acknowledge signal.
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7.5 Acknowledge
It is a check bit whether the receiver gets the data from the transmitter without error or not. The
receiver will write ‘0’ when it received the data successfully and ‘1’ if not.
7.6 First byte
7.6.1 Slave address
It is the first byte from the start condition. It is used to access the slave device. The initial chip
2
address of ALRS08 is ‘48’ hex number and the chip address is possible to change with “I C
15
Address of ALRS08” register .
─
7.6.2 R/W
The direction of data is decided by the bit and it follows the address data.
MSB
15
Address
LSB
R/W
7 bit
1bit
Refer to the chapter 8.2.3.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
7.7 Transferring data
7.7.1 Write operation
The
1.
2.
3.
4.
5.
byte sequence is as follows:
The first byte gives the device address plus the direction bit (R/W = 0).
The second byte contains the internal address of the first register to be accessed.
The next byte is written in the internal register. Following bytes are written in successive
internal registers.
The transfer lasts until stop conditions are encountered.
The ALRS08 acknowledges every byte transfer.
7.7.2 Read operation
The address of the first register to read is programmed in a write operation without data, and
terminated by the stop condition. Then, another start is followed by the device address and
R/W= 1. All following bytes are now data to be read at successive positions starting from the
initial address.
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7.7.3 Read/Write Operation
7.8 I2C write and read operations in normal mode
2
The following figure represents the I C normal mode write and read registers.
☞ Write register 0x00 to 0x01 with data AA and BB
Start
Device
Address 0x48
ACK
Register
Address 0x00
ACK
Data AA
ACK
Data BB
ACK
Stop
Read register 0x00 and 0x01
Start
Device
Address 0x48
ACK
Register
Address 0x00
ACK
Start
Device
Address 0x49
ACK
Data Read AA
ACK
From Master to Slave
Stop
Data Read BB
ACK
Stop
From Slave to Master
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8 ALRS08 Control Register List
2
 Note: The unused bits (defined as reserved) in I C registers must be kept to zero.
 Note: The reset value of ALRS08 can be changed by MTP ROM writing.
8.1 I2C Register Map
Name
ch_enable
/soft_rst
Addr.
(Hex)
01H
Reset
Value
Bit name of each bytes
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1111 1111
ch7_en
ch6_en
ch5_en
ch4_en
ch3_en
ch2_en
ch1_en
ch0_en
-
-
-
-
-
bf_option
dl2_on
dl1_on
dl0_on
o_ch2
o_ch1
(Bin)
global_ctrl0
05H
---- ---0
i2c_id
06H
0100 1000
LED_control
07H
0000 0000
i2c_id
dl7_on
dl6_on
dl5_on
wr_bit
dl4_on
dl3_on
o_ch3
output
2AH
0000 0000
o_ch7
o_ch6
o_ch5
o_ch4
global_ctrl1
34H
0100 1010
int_pu_up
sda(scl)_pu_up
imp_sel_opt
irb_mode
global_ctrl2
35H
---- -001
-
-
-
-
-
pwm_sel
par_output_pol
global_ctrl3
36H
-0-- -000
-
int_out_mode
-
-
-
0
0
0
global_ctrl4
37H
--00 1100
-
-
sts_clr_en
clk_off
sw_rst
global_ctrl5
38H
0101 0100
cal_hold
sin_multi_mode
exp_op_en
exp_op_mode
Sensitivity0
39H
--00 1001
Sensitivity1
3AH
--00 1001
-
-
sensitivity01
Sensitivity2
3BH
--00 1001
-
-
sensitivity02
Sensitivity3
3CH
--00 1001
-
-
sensitivity03
Sensitivity4
3DH
--00 1001
-
-
sensitivity04
Sensitivity5
3EH
--00 1001
-
-
sensitivity05
Sensitivity6
3FH
--00 1001
-
-
sensitivity06
Sensitivity7
40H
--00 1001
-
-
cal_speed
41H
1111 1010
pwm0
43H
0000 0000
pwm0
pwm1
44H
0000 0000
pwm1
pwm2
45H
0000 0000
pwm2
pwm3
46H
0000 0000
pwm3
pwm4
47H 0000 0000
pwm4
pwm5
48H
0000 0000
pwm5
pwm6
49H
0000 0000
pwm6
pwm7
4AH
0000 0000
pwm7
rd_ch_H1
53H
0000 0000
rd_ch_L1
54H
---- ---0
-
-
sen_H
55H
--00 0000
-
-
sen_L
56H
0000 0000
ref_H
57H
--00 0000
-
-
ref_L
58H
0000 0000
rd_ch_H2
59H
0000 0000
rd_ch_L2
5AH
---- ---0
-
-
-
-
usr_mtp_sel
5BH
0000 0000
0
0
0
mtp_sel_en
0
write_all
irb_sel
o_ch0
rb_sel
response_ctrl
cal_hold_time
par_output
_mode
sensitivity00
sensitivity07
bf_up
bf_down
bs_up
bs_down
rd_ch_H1
-
-
-
-
-
rd_ch_L1
-
rd_ch_L2
sen_count[13:8]
sen_count[7:0]
ref_count[13:8]
ref_count[7:0]
rd_ch_H2
mtp_cmd
5CH
0000 0000
0
mtp_status
5DH
---- ----
0
-
read_all
org_mtp_sel
otp_add_sel
5EH
0000 0000
otp_wr_data
5FH
0000 0000
0
otp_wr_data
otp_rd_data
60H
---- ----
otp_rd_data
-
org_usr_mtp_sel
0
0
wr_start
rd_start
wr_done_sts
rd_done_sts
no_load_sts
otp_add_sel
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2 Details
8.2.1 Channel enable / reset register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
01h
ch_enable
/soft_rst
ch7_en
ch6_en
ch5_en
ch4_en
ch3_en
ch2_en
ch1_en
ch0_en
Description
Enable, disable and reset of each channel control register.
Bit name
Reset value
chx_en
1
Function
Channel enable / disable and Channel reset (chx_en is control bit for CSx channel)
0 : Channel disable and sensing channel reset
1 : Channel enable
8.2.2 Global option control register 0
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
05h
global_ctrl0
-
-
-
-
Bit3
Bit2
Bit1
Bit0
-
-
bf_opt
Bit2
Bit1
Bit0
Description
Operation mode selection control register.
Bit name
Reset value
bf_opt
0
Function
Operation mode selection
0 : Normal mode
1 : BF mode
8.2.3 I2C address of ALRS08
Type: R/W
Address
Register Name
06h
i2c_id
Bit7
Bit6
Bit5
Bit4
Bit3
i2c_id
wr_bit
Description
Chip address of ALRS08 control register. User can change this address value with OTP ROM write. During
reset period OTP ROM data is loaded to registers.
Bit name
Reset value
Function
wr_bit
0
Write/Read address selection - 0 : Write address, 1 : Read address
i2c_id
0100100
Chip address of ALRS08.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.4 LED Control
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
07h
LED_control
dl7_on
dl6_on
dl5_on
dl4_on
dl3_on
dl2_on
dl1_on
dl0_on
Description
LED ON/OFF control registers of D0~D7. Firstly LSB of 35H must be ‘0’.
Bit name
Reset value
dlx_on
0
Function
LED on/off control (dlx_en is LED enable bit for DX output port)
0 : Turn the LED off
1 : Turn the LED on
8.2.5 Output data
Type: R
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
2Ah
output
o_ch7
o_ch6
o_ch5
o_ch4
o_ch3
o_ch2
o_ch1
o_ch0
Bit2
Bit1
Bit0
Description
The output data register from channel 0 to channel 7.
Bit name
Reset value
o_chx
0
Function
o_chx is output bit for CSx channel
0 : No touch detected
1 : Touch detected
8.2.6 Global option control 1
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
34h
global_ctrl1
int_pu_u
p
sda(scl)_
pu_up
imp_sel_
opt
irb_
mode
Bit3
irb_sel
rb_sel
Description
This register controls the global options of ALRS08
Bit name
Reset value
Function
rb_sel
10
ALRS08 provides three internal calibration speeds and user can control the ALRS08
calibration speed by using these bits.
00, 01 : Fast
10 : Normal
11 : Slow
[irb_mode :
irb_sel]
010
ALRS08 provides six internal I2C clock frequencies. Slower one reduces current
consumption.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
000 : Fast
001 : Faster
010 , 011 : Fastest
100 : Slowest
101 : Slower
110,111: Slow
imp_sel_opt
0
Impedance of the sensing wire of all channels control bit.
0 : High impedance
1 : Low impedance except sensing period.
sda(scl)_pu_up
1
Pull-up resistor enable control bit on the SDA(SCL) port.
0 : Disable pull-up resistor
1 : Enable pull-up resistor
int_pu_up
0
Pull-up resistor enable control bit on the INT port.
0 : Disable pull-up resistor
1 : Enable pull-up resistor
8.2.7 Global option control 2
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
35h
global_ctrl2
-
-
-
-
-
pwm_sel
par_outp
ut_pol
par_outp
ut_mode
Description
This register controls the global options of ALRS08.
Bit name
Reset value
Function
par_output_m
ode
1
Parallel outputs enable bit.
If user wants to use D0~D7 ports as LED PWM drive ports, this bit has to be ‘0’.
0 : Disable parallel output mode
1 : Enable parallel output mode
par_output_p
ol
0
Polarity of parallel outputs selection bit.
0 : Active low
1 : Active high
0
LED PWM outputs enable bit.
If user wants to use D0~D7 ports as a LED PWM drive ports, this bit has to be ‘1’
under condition of the LSB of 35H is ‘0’.
0 : Disable LED PWM output
1 : Enable LED PWM output
pwm_sel
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.8 Global option control 3
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
36h
global_ctrl3
-
int_out_
mode
-
-
-
0
0
0
Bit3
Bit2
Bit1
Bit0
clk_off
sw_rst
Description
This register controls the global options of ALRS08.
Bit name
Reset value
int_out_mode
0
Function
Interrupt output mode selection.
0 : Pulse mode (Interrupt mode A)
1 : Level mode (Interrupt mode B)
8.2.9 Global option control 4
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
37h
global_ctrl4
-
-
sts_clr_en
Bit4
response_ctrl
Description
This register controls the global options of ALRS08.
Bit name
Reset value
Function
sw_rst
0
Software reset control bit.
0 : Not reset
1 : Reset
clk_off
0
System clock off control bit.
0 : Not clock off
1 : Clock off
response_ctrl
011
Numbers of continuous touch detections for touch decision.
Response ctrl[2:0] + 1 (Maximum time : 7)
sts_clr_en
0
Clear the ‘mtp_status’ register (Address: 5DH) control bit.
0 : Not clear
1 : Clear
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.10 Global option control 5
Type: R/W
Address
Register Name
Bit7
Bit6
38h
global_ctrl5
cal_hold
sin_multi
_mode
Bit5
Bit4
Bit3
Bit2
cal_hold_time
Bit1
Bit0
exp_op_
en
exp_op_
mode
Description
This register controls the global options of ALRS08.
Bit name
Reset value
Function
exp_op_mode
0
Output expiration time count mode selection bit.
0 : Expiration time counter is reset when any touch output is not appeared.
1 : Expiration time counter is reset when any output state is changed.
exp_op_en
0
Output expiration enable control bit.
0 : Don’t use output expiration
1 : Use output expiration
cal_hold_
time
0101
sin_multi_
mode
1
Single/Multi output operation mode selection bit.
0 : Single output mode
1 : Multi output mode
cal_hold
0
Calibration hold of all channels control bit.
0 : Calibration
1 : Calibration hold
Output expiration Time control.
cal_hold_time[3:0] x 4 ( seconds)
8.2.11 Sensitivity
Type: R/W
Address
Register Name
Bit7
Bit6
39h ~ 40h
Sensitivity0 ~
sensitivity7
-
-
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
sensitivity00 ~ sensitivity07
Description
ALRS08 can control the sensitivities of all channels independently.
Bit name
Reset value
sensitivity00
~
sensitivity07
001001
Function
Sensitivities of each channel.
Sensitivity of CSx channel: {(sensitivity0x[5:0] x 0.1) + 0.05} (%).
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.12 Calibration speed control register
Type: R/W
Address
Register Name
41h
cal_speed
Bit7
Bit6
bf_up
Bit5
Bit4
Bit3
bf_down
Bit2
Bit1
bs_up
Bit0
bs_down
Description
Calibration speed of each operation mode can be controlled by this ‘cal_speed’ register.
Bit name
bs_down
bs_up
bf_down
bf_up
Reset value
Function
10
Down calibration speed in BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : ref. count  sen. count. (Most priority)
10
Up calibration speed in BS mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
11
Down calibration speed in BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
11
Up calibration speed in BF mode control bits.
00 : Fastest
01 : Fast
10 : Normal
11 : Slow
8.2.13 LED luminance control register
Type: R/W
Address
Register Name
43h ~ 4Ah
pwm0~pwm7
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
pwm0 ~ 1pwm
Description
LED luminance control.
Bit name
Reset value
pwmx
00000000
Function
The LED PWM control bits of Dx port.
00000000 : The minimum low duty
11111111 : The maximum low duty
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
8.2.14 Sense, reference count read register
Type: R
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
53h
rd_ch_H1
54h
rd_ch_L1
-
-
55h
sen_H
-
-
56h
sen_L
57h
ref_H
58h
ref_L
ref_count[7:0]
59h
rd_ch_H2
rd_ch_H2
5Ah
rd_ch_L2
Bit2
Bit1
Bit0
-
-
rd_ch_L1
-
rd_ch_L2
rd_ch_H1
-
-
-
sen_count[13:8]
sen_count[7:0]
-
-
-
-
ref_count[13:8]
-
-
-
-
Description
ALRS08 provides the special function to read sense count of each channels or reference count.
Bit name
Reset value
Function
Read channel indication register.
00000001 : Dummy channel
00000010 : CS0 channel
00000100 : CS1 channel
00001000 : CS2 channel
00010000 : CS3 channel
00100000 : CS4 channel
01000000 : CS5 channel
10000000 : CS6 channel
rd_ch_H1
00000000
rd_ch_L1
0
sen_count[13:8]
000000
sen_count[7:0]
00000000
ref_count[13:8]
000000
ref_count[7:0]
00000000
Reference count data of least significant eight bits.
Reference count [7:0]
rd_ch_H2
00000000
Read channel confirm register.
00000001 : Dummy channel
00000010 : CS0 channel
00000100 : CS1 channel
00001000 : CS2 channel
00010000 : CS3 channel
00100000 : CS4 channel
01000000 : CS5 channel
10000000 : CS6 channel
rd_ch_L2
0
Read channel indication register.
1 : CS7 channel
Sense count data of most significant six bits.
Sense count [13:8]
Sense count data of least significant eight bits.
Sense count [7:0]
Reference count data of most significant six bits.
Reference count [13:8]
Read channel confirm register.
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ADSemiconductor®
ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
1 : CS7 channel
8.2.15 OTP ROM cell select register
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
5Bh
usr_mtp_sel
0
0
0
mtp_sel_en
Bit3
Bit2
Bit1
Bit0
org_usr_mtp_sel
Description
The OTP ROM cells of ALRS08 are made up of eight memory cells of 64 bytes. ALRS08 provides the way to
access OTP ROM cells with this register. User can select the OTP ROM cell with ‘org_usr_mtp_sel’ bits and if
user doesn’t want to select the OTP ROM cell directly, ‘mtp_sel_en’ bit leaves ‘0’, then OTP ROM cell is
selected the automatically.
Bit name
Reset value
org_usr_mtp_
sel
0000
mtp_sel_en
0
Function
OTP ROM cell selection bits.
0000, 0001 : 1st OTP ROM cell
0010 : 2nd OTP ROM cell
0011 : 3rd OTP ROM cell
0100 : 4th OTP ROM cell
0101 : 5th OTP ROM cell
0110 : 6th OTP ROM cell
0111 : 7th OTP ROM cell
1000 : 8th OTP ROM cell
OTP ROM cell selection enable bit.
0 : Select OTP ROM cell automatically
1 : Select OTP ROM cell by user
8.2.16 OTP ROM control register (OTP ROM command)
Type: R/W
Address
Register Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
5Ch
mtp_cmd
0
0
write_all
read_all
0
0
wr_start
rd_start
Description
OTP ROM commands to access.
Bit name
Reset value
Function
rd_start
0
Reading selected OTP ROM cell start command bit.
0 : Don’t start
1 : Start to read
wr_start
0
Writing on selected OTP ROM cell start command bit.
0 : Don’t write
1 : Start to write
read_all
0
Unit of reading the selected OTP ROM cell control bit.
0 : 1-Byte reading
1 : All bytes of selected OTP ROM cell reading
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
write_all
Unit of writing on selected OTP ROM cell control bit.
0 : 1-Byte writing
1 : All bytes of selected OTP ROM cell writing
0
8.2.17 OTP ROM status register.
Type: R
Address
Register Name
Bit7
5Dh
mtp_status
-
Bit6
Bit5
Bit4
Bit3
org_mtp_sel
Bit2
Bit1
Bit0
wr_done
_sts
rd_done
_sts
no_load_
sts
Description
This register indicates the status of operation of selected one OTP ROM cell.
Bit name
Reset
no_load_sts
-
This bit indicates whether some data are loaded from OTP ROM cells.
0 : There is some data loaded from OTP ROM cells
1 : No data loaded from OTP ROM cells
rd_done_sts
-
This bit indicates the end of reading.
0:
1 : End of reading
wr_done_sts
-
This bit indicates the end of writing.
0:
1 : End of writing
-
These bits indicate that OTP ROM cell is loaded at initial time.
0000 : No loaded
0001 : 1st OTP ROM cell
0010 : 2nd OTP ROM cell
0011 : 3rd OTP ROM cell
0100 : 4th OTP ROM cell
0101 : 5th OTP ROM cell
0110 : 6th OTP ROM cell
0111 : 7th OTP ROM cell
1000 : 8th OTP ROM cell
org_mtp_sel
Function
8.2.18 OTP ROM data address select register
Type: R/W
Address
Register Name
Bit7
Bit6
5Eh
otp_add_sel
0
0
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
otp_add_sel
Description
Register for the specific address of selected OTP ROM cell. User can access OTP ROM data of specific address
by leaving ‘read_all’ and ‘write_all’ bits in the ‘mtp_cmd’ register ‘0’, selecting the OTP ROM cell with
‘usr_mtp_sel’ register and selecting the specific address with this register.
Bit name
Reset
Function
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ADSemiconductor®
ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
otp_add_sel
000000
Select specific address of selected OTP ROM cell.
otp_add_sel[5:0] : Address
8.2.19 OTP ROM data register to write
Type: R/W
Address
Register Name
5Fh
otp_wr_data
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit2
Bit1
Bit0
otp_wr_data
Description
The data register to write on specific address of selected OTP ROM cell.
Bit name
Reset
otp_wr_data
00000000
Function
Data register to write.
otp_wr_data[7:0] : Data
8.2.20 OTP data register to read
Type: R
Address
Register Name
60h
otp_rd_data
Bit7
Bit6
Bit5
Bit4
Bit3
otp_rd_data
Description
The data register for reading data from specific address of selected OTP ROM cell.
Bit name
Reset
otp_rd_data
---- ----
Function
Data register for reading OTP ROM data.
otp_rd_data [7:0] : Data
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ADSemiconductor®
ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9 Recommended Circuit Diagram
ALRS08FB(24MLF) Application Example Circuit for parallel output
ALRS08 is reset by internal reset circuit. VDD voltage rising time should be shorter than 100msec for
proper operation.
Normally, R.N.D pin dose not connection to anywhere. But, in radio frequency noise environment,
R.N.D pin must form a pattern line on PCB.
The VDD periodic voltage ripple over 50mV and the ripple frequency is lower than 10 kHz can cause
wrong sensitivity calibration. To prevent above problem, power (VDD, GND) line of touch circuit
should be separated from other circuit. Especially LED driver power line or digital switching circuit
power line certainly should be treated to be separated from touch circuit.
The CS patterns also should be routed as short as possible and the width of line might be about 0.25mm.
Parallel capacitor of CS pin could be useful in case detail sensitivity mediation is required such as for
complementation sensitivity difference between channels.
Serial connection resistor of CS pins may be used to avoid mal-function from external surge and ESD.
The capacitor that is between VDD and GND is an obligation. It should be located as close as possible
from ALRS08.
The CS pattern routing should be formed by bottom metal (opposite metal of touch PAD).
The empty space of PCB must be filled with GND pattern to strengthen GND pattern and to prevent
external noise from interfere with sensing frequency.
The D0 ~ D7 are open drain output ports. Therefore, in the case of active high output or active low
output, the pull-up or pull-down resistor should be needed as above figure.
Unused CS pins may be connected to GND for stable operation.
‘Vpp’ pin for 11.5V voltage input is needed at OTP ROM writing only.
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
9.1 Example – Power Line Split Strategy PCB Layout
A. Not split power Line (Bad power line design)
The noise that is generated by AC load or relay can be loaded at 5V power line.
A big inductance might be appeared in case of the connection line between main board and
display board is too long, moreover the voltage ripple could be generated by LED (LCD)
display driver at VDD (5V).
B. Split power Line (One 5V regulator used) – Recommended
C. Split power Line (Separated 5V regulator used) – Strongly recommended
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
10 MECHANICAL DRAWING
10.1 Mechanical Drawing of ALRS08FB (24 MLF Punched type)
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
11 MARKING DESCRIPTION
Device Code
: ALRS 0 8 FB
Type of package
Channel Number
Touch Switch Group
Weekly Code
: YY WW
Manufacturing Week
Manufacturing Year
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ALRS08FB (8-CH Auto Sensitivity Calibration Capacitive Touch Sensor)
NOTES:
LIFE SUPPORT POLICY
AD SEMICONDUCTOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN
LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE
PRESIDENT AND GENERAL COUNSEL OF AD SEMICONDUCTOR CORPORATION
The ADS logo is a registered trademark of ADSemiconductor
ⓒ 2006 ADSemiconductor – All Rights Reserved
www.adsemicon.com
www.adsemicon.co.kr
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