MPS MP4021

MP4021
Universal AC Input, Isolated, Primary-Side Control
LED Controller with Active PFC
The Future of Analog IC Technology
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
The MP4021 is a primary-side-control offline LED
lighting controller which can achieve high power
factor and accurate LED current for an isolate
lighting application in a single stage converter.
The proprietary real current control method can
control the LED current accurately from the
primary side information. It can significantly
simplify the LED lighting system design by
eliminating the secondary side feedback
components and the optocoupler.
F
The extremely low start-up current and the
quiescent current can reduce the power
consumption thus lead to an excellent efficiency
performance.
N
O
The multi-protection function of MP4021 can
greatly enhance the system reliability and safety.
The MP4021 features over-voltage protection,
short-circuit protection, cycle-by-cycle current
limit, VCC UVLO and auto-restart overtemperature protection.
S
C
The MP4021 is available in a small SOIC8
package.
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TYPICAL APPLICATION
EMI
filter
N
MULT COMP
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ZCD
VCC
GATE
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•
•
•
•
•
•
•
•
•
•
•
•
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Real Current Control Without Secondaryfeedback Circuit
High Current Accuracy Of Line Regulation
High Power Factor:>0.95 Over the Universal
Input
Boundary Conduction Mode Operation
Ultra-low (10µA) Start Up Current
Low (1mA) Quiescent Current
Input UVLO
Cycle-by-cycle Current Limit
Over-voltage Protection
Short-circuit Protection
Over-temperature Protection
Available in a SOIC8 Package
IA
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N
E
ID
The MP4021 integrates power factor correction
function and works in boundary conduction mode
for reducing the MOSFET switching losses.
P
L
FEATURES
DESCRIPTION
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•
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U
B
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APPLICATIONS
Isolated, Solid State Lighting
Industrial and Commercial Lighting
Residential Lighting
E
R
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
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The MP4021 is under patent pending.
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IS
FB/NC
GND
CS
MP4021
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to
Mobile:13632922201 QQ:372669079 Futurea
1
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
ORDERING INFORMATION
Part Number*
Package
SOIC8
MP4021DS
L
Top Marking
Free Air Temperature (TA)
MP4021
-40°C to +85°C
IA
* For Tape & Reel, add suffix –Z (e.g. MP4021DS–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP4021DS–LF–Z)
T
PACKAGE REFERENCE
7
N
6
GND
5
CS
TOP VIEW
MULT
1
ZCD
2
VCC
3
GATE
4
ID
F
N
O
E
8
E
COMP
FB
T
SOIC8
R
U
IB
(4)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Input Voltage VCC ..........................-0.3V to +30V
Analog Inputs and Outputs ...............-0.3V to 8V
ZCD Pin Maximum Current...........-50mA~10mA
Max. Gate Current .................................... ±1.2A
Continuous Power Dissipation
(TA = +25°C) (2)
SOIC8 ........................................................ 1.3W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
SOIC8 ....................................96 ...... 45 ... °C/W
P
S
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Recommended Operating Conditions
(3)
Supply Voltage VCC ........................10.3V to 23V
Operating Junct. Temp (TJ)...... -40°C to +125°C
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D
N
S
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T
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operation conditions.
4) Measured on JESD51-7 4-layer board.
D
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to
Mobile:13632922201 QQ:372669079 Futurea
2
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
ELECTRICAL CHARACTERISTICS
VCC = 14V, TA = +25°C, unless otherwise noted.
Parameter
Supply Voltage
Operating Range
Turn On Threshold
Turn Off Threshold
Hysteretic Voltage
Clamp Voltage
Supply Current
Start up Current
Quiescent Current
Operating Current
Multiplier
Operation Range
Gain (5)
Symbol
VCC
VCC_on
VCC_off
VCC_hys
Vz
Transconductance
GEA
O
Voltage Gain
10.3
11
7
3.2
ID
Lower clamp Voltage
Max Source Current
S
Max Sink Current
P
C
VCOMP_H
S
I
ICOMP
TLEB
Current sense clamp voltage
VCS_clamp
Zero Current Detector
T
O
Zero Current Detect threshold
VZCD_T
Zero Current Detect Hystestic
VZCD_Hy
Over-voltage Threshold
VZCD_OVP
Minimum off time
Toff_min
Starter
Start timer period
O
Gate Driver
Output clamp voltage
Max source current
N
Tstart
D
D
Vgate-clamp
V
V
V
V
V
30
2
5
µA
mA
mA
0.6
0.386
0.4
0.414
2.4
Falling edge
1us delay after turn-off
23
13
8.2
3.8
3
0.8
0.7
ICOMP
Units
0
0.5
E
T
U
IB
V
1/V
V
100
µA/V
400
V/V
R
T
VCOMP_L
Leading edge blanking time
Max sink current
20
1
2
5.3
Current Sense Comparator
M
T
12
7.6
Max
30
VEA
Upper clamp Voltage
L
Typ
IA
N
E
F
N
VFB
After turn on
VCC=11V
No switch
Fs =70kHz
VMULT
K
Feedback Voltage
Min
ICC=20mA
Istartup
Iq
Icc
Error Amplifier
Condition
5.65
6
V
0.9
1.1
V
75
µA
-200
µA
280
ns
2.9
3.4
V
0.35
V
550
mV
5.2
5.5
5.8
V
2
3.5
5
µs
130
11
13
µs
15
V
Igate-source
1
A
Igate-sink
-1.2
A
Notes: 5) The multiplier output is given by: Vcs=K•Vmult• (Vcomp-0.9)
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
3
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
PIN FUNCTIONS
Pin #
Name
1
MULT
2
ZCD
3
VCC
4
GATE
5
CS
6
GND
7
FB/NC
8
IA
One of the input pin of the internal multiplier. Connects this pin to the tap of resistor divider
from the rectified voltage of the AC line. The half-wave sinusoid signal in this pin is provided
a reference signal for the internal current control loop.
Zero current detection pin. A negative going edge triggers the turn on signal of the external
MOSFET, connects this pin through a resistor divider from the auxiliary winding to GND.
Over-voltage condition is detected through ZCD, if ZCD voltage is higher than the overvoltage-protection (OVP) threshold after a blanking time 1us, the over-voltage condition is
detected.
Supply voltage pin. This pin supply power both for control signal and the gate drive signal.
Connect this pin to an external bulk capacitor of typically 22uF with a 100pF ceramic cap to
reduce the noise.
Gate drive output pin. The totem pole output stage is able to drive high power MOSFET with
a peak current of 1A source capability and 1.2A sink capability. The high level voltage of
this pin is clamped to 13V to avoid excessive gate drive voltage.
Current sense pin. The MOSFET current is sensed via a resistor, the resulting voltage
compared to the internal sinusoid shaped current reference signal to determine when the
MOSFET turns off. A feed-forward from the rectified voltage of the AC line is recommended
to add to get an excellent line regulation. If the voltage in this pin is higher than the current
limit threshold 2.8V after some blanking time in the turning on interval, the gate signal will
be turned off.
N
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C
N
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ID
F
T
E
T
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IB
R
Ground pin. Current return of the control signal and the gate drive signal.
T
Feedback signal Pin. If using primary side control, this pin can be NC.
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COMP
P
M
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Pin Function
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Loop Compensation pin. Connects a compensation network to stabilize the LED driver and
get an accurate LED current of the LED driver.
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N
T
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MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
4
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
TYPICAL PERFORMANCE CHARACTERISTICS
VIN =110VAC, 5 LEDs in series, Io=500mA, Vo=16V, Lm=2.2mH, Np:Ns:Naux =144:24:24
IC Consumption vs.
VCC at operation
IO Line Regulation vs. VIN
I O REGULATION
2.2
2
1.8
1.6
0.9
3.00%
0.8
0.7
1.00%
0.00%
1.2
-4.00%
9
11
13
15
17
-5.00%
19
80
ID
130
9kHz
S
M
P
F
N
Conducted EMI
1 PK
MAXH
2 AV
MAXH
180
V IN (V)
V CC (V)
0.6
0.5
0.4
0.3
0.2
THD
0
230
80
O
C
S
I
D
OVP, LED Load open
when working
ILED
500mA/div.
D
O
N
ILED
500mA/div.
VCC
10V/div.
Vcomp
5V/div.
Vgate
10V/div.
230
280
T
U
IB
R
T
VIN
100V/div.
T
O
180
V IN (V)
IIN
100mA/div.
VCC
6DB
10V/div.
Vcomp
2V/div.
Vgate
10V/div.
30MHz
130
Steady State
TDS ILED
500mA/div.
E
0.1
Steady State
VIN Startup
VCC
5V/div.
Vcomp
2V/div.
Vgate
10V/div.
N
E
-3.00%
PF
T
2.00%
-2.00%
1.4
1
1
4.00%
-1.00%
L
IA
5.00%
PF & THD
2.4
PF & THD vs. VIN
SCP,LED+ Short to LEDwhen working
ILED
500mA/div.
VCC
10V/div.
Vcomp
5V/div.
Vgate
10V/div.
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
5
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
FUNCTION DIAGRAM
L
N:1
IA
EMI
filter
Current control
Gate
driver
Control
PWM/
PFC
Multiplier
E
ID
Current sense
Current
Sense
COMP
Latch off
or
Restart
OTP
FB/NC
O
Real Current
Control
P
S
M
C
Zero current
detection
GND
OVP
F
N
Protection
Current
LImit
CS
T
N
GATE
MULT
T
U
IB
Power supply
UVLO
VCC
R
Power Supply
T
ZCD
Zero Current
Detection
E
S
I
Figure 1—MP4021 Function Block Diagram
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N
T
O
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MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
6
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
OPERATION
The MP4021 is a primary side control offline LED
controller which incorporates all the features for
high performance LED lighting. LED current can
be accurately controlled with the real current
control method form the primary side information.
High power factor can also be achieved to
eliminate the pollution to the AC line.
VAC line+NVOUT
Boundary Conduction Mode Operation
F
N
During the external MOSFET on time (tON), the
rectified input voltage is applied across the
primary side inductor (Lm) and the primary
current increases linearly from zero to the peak
value (Ipk). When the external MOSFET turns off,
the energy stored in the inductor forces the
secondary side diode to be turn-on, and the
current of the inductor begins to decrease linearly
from the peak value to zero. When the current
decreases to zero, the parasitic resonant of
inductor and all the parasitic capacitance makes
the MOSFET drain-source voltage decrease, this
decreasing is also reflected on the auxiliary
winding (see Figure 2).
The zero-current
detector in ZCD pin generates the turn on signal
of the external MOSFET when the ZCD voltage
is lower than 0.35V and ensures the MOSFET
turn on at a valley voltage (see Figure 3).
P
S
M
O
C
O
D
N
T
O
T
N
Inductor
current
E
ID
The MP4021 will shutdown as soon as VCC pin
is lower than 7.6V.
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VAC line
Start Up
Initially, VCC of the MP4021 is charged through
the start up resistor from the AC line, when VCC
reaches 12V, the control logic works and the gate
drive signal begins to switch. Then the power
supply is taken over by the auxiliary winding.
L
VDS
Valley turn on
Ipk
Ton
Toff
E
VZCD
T
0
U
IB
Figure 2—Boundary Conduction Mode
Auxiliary Winding
+
Vcc
R
T
Valley
signal
S
I
RZCD1
ZCD
0.35V
RZCD2
CZCD
Figure 3—Zero Current Detector
D
As a result, there are virtually no primary switch
turn-on losses and no secondary diode reverserecover losses. It ensures high efficiency and low
EMI noise.
Real Current Control
The proprietary real current control method
allows the MP4021 controlling the secondary
side LED current from the primary side
information. The output LED mean current can
be calculated approximately as:
Io ≈
N ⋅ VFB
2 ⋅ Rs
N—Turn ratio of primary side to secondary side
VFB—The feedback reference voltage (typical 0.4)
Rs—The sensing resistor connected between the
MOSFET source and GND.
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
7
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
on, if ZCD fails to send out another turn on signal
Power Factor Correction
after 130µs, the starter will automatically send
The MULT pin is connected to the tap of the
out the turn on signal which can avoid the IC
resistor divider from the rectified instantaneous
unnecessary shut down by ZCD missing
line voltage and fed as one input of the Multiplier.
detection.
The output of the multiplier will be shaped as
sinusoid too. This signal provides the reference
Minimum Off Time
for the current comparator and comparing with
The MP4021 operates with variable switching
the primary side inductor current which sets the
frequency, the frequency is changing with the
primary peak current shaped as sinusoid with the
input instantaneous line voltage. To limit the
input line voltage. High power factor can be
maximum frequency and get a good EMI
achieved.
performance, MP4021 employs an internal
Multiplier output
minimum off time limiter—3.5µs, show as figure 6.
F
N
IA
T
N
E
ID
Inductor current
L
U
IB
GATE
Figure 4—Power Factor Correction Scheme
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The maximum voltage of the multiplier output to
the current comparator is clamped to 2.9V to get
a cycle-by-cycle current limitation.
C
VCC Under-voltage Lockout
S
12V
P
M
Auxiliary Winding Takes Charge
And Regulates the VCC
Gate
Switching Pulses
O
D
T
O
Protection happens
8V
N
Toff >3.5µs
R
1µs/div
T
Figure 6—Minimum Off Time
When the VCC voltage drops below UVLO
threshold 7.6V, the MP4021 stops switching and
totally shuts down, the VCC will restart charging
by the external start up resistor from AC line.
Figure 5 shows the typical waveform of VCC
under-voltage lockout
Vcc
E
T
ZCD
S
I
Leading Edge Blanking
In order to avoid the premature termination of the
switching pulse due to the parasitic capacitance
discharging at MOSFET turning on, an internal
leading edge blanking (LEB) unit is employed
between the CS Pin and the current comparator
input. During the blanking time, the path, CS Pin
to the current comparator input, is blocked.
Figure 7 shows the leading edge blanking.
D
VCS
TLEB =280nS
Figure 5—VCC Under-Voltage Lockout
Auto Starter
The MP4021 integrates an auto starter, the
starter starts timing when the MOSFET is turned
t
Figure 7—Leading Edge Blanking
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2010 MPS. All Rights Reserved.
8
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
VZCD
Output Over-Voltage Protection (OVP)
Output over voltage protection can prevent the
components from damage in the over voltage
condition. The positive plateau of auxiliary
winding voltage is proportional to the output
voltage, the OVP uses the auxiliary winding
voltage instead of directly monitoring the output
voltage, the OVP sample is shown in figure 8.
Once the ZCD pin voltage is higher than 5.5V,
the OVP signal will be triggered and latched, the
gate driver will be turned off and the IC work at
quiescent mode, the VCC voltage dropped below
the UVLO which will make the IC shut down and
the system restarts again. The output OVP
setting point can be calculated as:
Vout _ ovp ⋅
Naux
R ZCD2
⋅
= 5.5
Nsec R ZCD1 + R ZCD2
N
Naux—The auxiliary winding turns
O
Nsec—The secondary winding turns
Auxiliary Winding
C
+
S
Vcc
P
Latch
M
OVP
signal
Figure 8—OVP Sample Unit
T
O
To avoid the mis-trigger OVP by the oscillation
spike after the switch turns off, the OVP sampling
has a TOVPS blanking period, typical 1us, shown
in figure 9.
O
D
N
When the output short circuit happens, the
positive plateau of auxiliary winding voltage is
also near zero, the VCC can not be held on and it
will drop below VCC UVLO. The IC will shut
down and restart again.
E
N
E
T
Thermal Shut Down
To prevent from any lethal thermal damage,
when the inner temperature exceeds 150DegC,
the MP4021 shuts down switching cycle and
latched until VCC drop below UVLO and restart
again.
Design Example
U
IB
R
For the design example, please refer to MPS
application note AN038 for the detailed design
procedure and information.
T
S
I
CZCD
1 uS
Blanking
T
Output Short Circuit Protection
ZCD
RZCD2
TOVPS
Figure 9—ZCD Voltage and OVP Sample
RZCD1
5.5V
L
IA
0V
ID
F
Vout-ovp—Output over voltage protection point
Sampling Here
D
MP4021 Rev.0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to
Mobile:13632922201 QQ:372669079 Futurea
9
MP4021—PRIMARY SIDE CONTROL OFFLINE LED CONTROLLER WITH ACTIVE PFC
PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION –3CEMS USE ONLY
L
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
8
5
T
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
F
TOP VIEW
S
P
N
O
C
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
O
DETAIL "A"
D
N
T
O
0.213(5.40)
S
I
D
E
T
U
IB
R
T
SEE DETAIL "A"
0.050(1.27)
BSC
0.010(0.25)
x 45o
0.020(0.50)
0.050(1.27)
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
FRONT VIEW
M
N
E
D
I
4
0.013(0.33)
0.020(0.51)
IA
0.024(0.61)
0.0075(0.19)
0.0098(0.25)
SIDE VIEW
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP4021 Rev. 0.81
www.MonolithicPower.com
12/2/2010
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to
Mobile:13632922201 QQ:372669079 Futurea
10