LTC3416 4A, 4MHz, Monolithic Synchronous Step-Down Regulator with Tracking U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO High Efficiency: Up to 95% 4A Output Current Low RDS(ON) Internal Switch: 67mΩ Tracking Input to Provide Easy Supply Sequencing Programmable Frequency: 300kHz to 4MHz 2.25V to 5.5V Input Voltage Range ±2% Output Voltage Accuracy 0.8V Reference Allows Low Output Voltage Low Dropout Operation: 100% Duty Cycle Power Good Output Voltage Monitor Overtemperature Protected Available in a 20-Lead Thermally Enhanced TSSOP Package The LTC3416 operates in forced continuous operation and provides tracking of another power supply rail. Forced continuous operation reduces noise and RF interference and provides excellent transient response. Fault protection is provided by an overcurrent comparator, and adjustable compensation allows the transient response to be optimized over a wide range of loads and output capacitors. U APPLICATIO S ■ ■ ■ ■ Portable Instruments Notebook Computers Distributed Power Systems Battery-Powered Equipment POL Board Power , LTC and LT are registered trademarks of Linear Technology Corporation. OPTI-LOOP is a registered trademark of Linear Technology Corporation. U ■ The LTC®3416 is a high efficiency monolithic synchronous, step-down DC/DC converter utilizing a constant frequency, current mode architecture. It operates from an input voltage range of 2.25V to 5.5V and provides a regulated output voltage from 0.8V to 5V while delivering up to 4A of output current. The internal synchronous power switch with 67mΩ of on-resistance increases efficiency and eliminates the need for an external Schottky diode. Switching frequency is set by an external resistor. 100% duty cycle provides low dropout operation extending battery life in portable systems. OPTI-LOOP® compensation allows the transient response to be optimized over a wide range of loads and output capacitors. TYPICAL APPLICATIO VOUT2 2.5V I/O VOLTAGE 100 90 VIN 2.5V TO 5.5V 80 SVIN PVIN RT PGOOD SW LTC3416 RUN/SS PGND ITH SGND TRACK VFB 127k 7.5k 0.2µH 100µF ×2 60 VIN = 3.3V 50 40 30 10 255k 3416 F01a 200k 70 VIN = 2.5V 20 820pF 255k VOUT1 1.8V 4A EFFICIENCY (%) 22µF 200k 0 0.01 VOUT = 1.8V f = 2MHz 0.10 1 LOAD CURRENT (A) 10 3416 G09 Figure 1a. 2.5V/4A Step-Down Regulator with Tracking Figure 1b. Efficiency vs Load Current 3416f 1 LTC3416 W W W AXI U U ABSOLUTE RATI GS U U W PACKAGE/ORDER I FOR ATIO (Note 1) Input Supply Voltage .................................. – 0.3V to 6V ITH, RUN, VFB Voltages .............................. – 0.3V to VIN TRACK Voltage .......................................... – 0.3V to VIN SW Voltage .................................. – 0.3V to (VIN + 0.3V) Peak SW Sink and Source Current ......................... 11A Operating Ambient Temperature Range (Note 2) .................................................. – 40°C to 85°C Junction Temperature (Notes 5, 6) ...................... 125°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C ORDER PART NUMBER TOP VIEW PGND 1 20 PGND RT 2 19 VFB TRACK 3 18 ITH RUN/SS 4 17 PGOOD SGND 5 21 16 SVIN NC 6 PVIN 7 14 PVIN SW 8 13 SW SW 9 12 SW PGND 10 LTC3416EFE 15 NC 11 PGND FE PACKAGE 20-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 38°C/W, θJC = 10°C/W EXPOSED PAD IS GND (PIN 21) MUST BE SOLDERED TO PCB Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.3V, unless otherwise noted. SYMBOL PARAMETER VIN Input Voltage Range CONDITIONS MIN TYP VFB Regulated Feedback Voltage IFB Feedback Input Current ∆VFB Reference Voltage Line Regulation VIN = 2.5V to 5.5V (Note 3) VTRACK Tracking Voltage Offset Tracking Voltage Range VTRACK = 0.4V VLOADREG Output Voltage Load Regulation Measured in Servo Loop, VITH = 0.36V Measured in Servo Loop, VITH = 0.84V ∆VPGOOD Power Good Range RPGOOD Power Good Resistance IQ Input DC Bias Current Active Current Shutdown (Note 4) VFB = 0.7V, VITH = 1.2V VRUN = 0V fOSC Switching Frequency Switching Frequency Range ROSC = 294kΩ fSYNC SYNC Capture Range RPFET RDS(ON) of P-Channel FET ISW = 300mA 67 100 mΩ RNFET RDS(ON) of N-Channel FET ISW = –300mA 50 100 mΩ ILIMIT Peak Current Limit VUVLO Undervoltage Lockout Threshold ILSW SW Leakage Current VRUN RUN Threshold 2.25 (Note 3) ● 0.784 0.800 V µA 0.2 %/V 30 0.8 mV V 0.2 –0.2 % % ±7.5 ±9 % 120 200 Ω 300 0.02 350 1 µA µA 1 1.12 4.00 MHz MHz 4 MHz 0.02 –0.02 0.3 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3416E is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to 85°C operating V 0.2 0 6 8 1.75 2 0.5 VRUN = 0V, VIN = 5.5V UNITS 5.5 0.816 0.04 0.88 0.30 MAX A 2.25 V 0.1 1 µA 0.65 0.8 V temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The LTC3416 is tested in a feedback loop that adjusts VFB to achieve a specified error amplifier output voltage (ITH). 3416f 2 LTC3416 ELECTRICAL CHARACTERISTICS Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: TJ is calculated from the ambient temperature TA and power dissipation PD as follows: LTC3416E: TJ = TA + (PD)(38°C/W) Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. U W TYPICAL PERFOR A CE CHARACTERISTICS Switch On-Resistance vs Input Voltage VREF vs Temperature, VIN = 3.3V 90 0.800 Switch On-Resistance vs Temperature, VIN = 3.3V 120 TA = 25°C 80 0.798 0.797 100 PFET ON-RESISTANCE (mΩ) 70 ON-RESISTANCE (mΩ) VREF (V) 0.799 60 50 NFET 40 30 80 PFET NFET 60 40 20 0.796 20 10 0.795 –40 –20 0 0 2.25 2.75 3.25 3.75 4.25 4.75 5.25 INPUT VOLTAGE (V) 20 40 60 80 100 120 140 TEMPERATURE (°C) Switch Leakage vs Input Voltage Frequency vs ROSC 7000 6000 16 14 PFET 12 10 8 6 NFET Frequency vs Input Voltage 1040 VIN = 3.3V TA = 25°C 5000 1020 FREQUENCY (kHz) TA = 25°C FREQUENCY (kHz) SWITCH LEAKAGE CURRENT (nA) 18 3416 G03 3416 G02 3416 G01 20 0 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 5.75 4000 3000 ROSC = 294k TA = 25°C 1000 980 960 2000 940 1000 920 4 2 0 2.25 0 2.75 3.25 3.75 4.25 4.75 INPUT VOLTAGE (V) 5.25 3416 G04 25 125 225 325 425 525 625 725 825 925 ROSC (k) 3416 G05 900 2.25 2.75 3.25 3.75 4.25 4.75 INPUT VOLTAGE (V) 5.25 3416 G06 3416f 3 LTC3416 U W TYPICAL PERFOR A CE CHARACTERISTICS DC Supply Current vs Input Voltage Frequency vs Temperature VIN = 3.3V ROSC = 294k 1010 990 970 950 80 300 EFFICIENCY (%) QUIESCENT CURRENT (µA) 1030 250 200 150 20 40 60 80 TEMPERATURE (°C) 100 120 2.75 3.25 3.75 4.25 4.75 INPUT VOLTAGE (V) 5.25 0.10 1 LOAD CURRENT (A) 10 3416 G09 0 VOUT = 2.5V TA = 25°C VIN = 3.3V VOUT = 1.8V –0.20 –0.40 ∆VOUT/VOUT (%) 92 EFFICIENCY (%) VOUT = 1.8V f = 2MHz 0 0.01 Load Regulation Efficiency vs Input Voltage 94 50 40 3416 G08 98 IOUT = 1A VIN = 3.3V 60 10 0 2.25 3416 G07 96 70 20 50 0 VIN = 2.5V 30 100 930 910 –40 –20 90 350 1050 FREQUENCY (kHz) 100 400 1090 1070 Efficiency vs Load Current, Forced Continuous 90 88 IOUT = 4A 86 84 –0.60 –0.80 –1.00 82 –1.20 80 78 2.5 –1.40 3.0 4.0 4.5 3.5 INPUT VOLTAGE (V) 5.0 5.5 0 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) 3416 G10 Load Step Transient 3.5 4.0 3416 G11 Tracking: Start-Up and Shutdown VOUT INDUCTOR CURRENT 2A/DIV 20µs/DIV VIN = 3.3V, VOUT = 1.8V f = 2MHz LOAD STEP = 0A TO 4A 3416 G12 5ms/DIV 3416 G13 VIN = 3.3V, VOUT = 1.8V TRACKING 2.5V 3416f 4 LTC3416 U U U PI FU CTIO S PGND (Pins 1, 10, 11, 20): Power Ground. Connect this pin closely to the (–) terminal of CIN and COUT. RT (Pin 2): Oscillator Resistor Input. Connecting a resistor to ground from this pin sets the switching frequency. TRACK (Pin 3): Tracking Voltage Input. Applying a voltage that is less than 0.8V to this pin enables tracking. During tracking, the VFB pin will regulate to the voltage on this pin. Do not float this pin. SW (Pins 8, 9, 12, 13): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. SVIN (Pin 16): Signal Input Supply. Decouple this pin to the SGND capacitor. PGOOD (Pin 17): Power Good Output. Open-drain logic output that is pulled to ground when the output voltage is not within ±7.5% of the regulation point. RUN/SS (Pin 4): Run Control and Soft-Start Input. Forcing this pin below 0.5V shuts down the LTC3416. In shutdown all functions are disabled, drawing <1µA of supply current. A capacitor to ground from this pin sets the ramp time to full output current. ITH (Pin 18): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.2V to 1.4V with 0.4V corresponding to the zero-sense voltage (zero current). SGND (Pin 5): Signal Ground. All small-signal components and compensation components should connect to this ground, which in turn connects to PGND at one point. VFB (Pin 19): Feedback Pin. Receives the feedback voltage from a resistive divider connected across the output. Exposed Pad (Pin 21): Ground. Connect to SGND. NC (Pins 6, 15): No Connect. PVIN (Pins 7, 14): Power Input Supply. Decouple this pin to PGND with a capacitor. 3416f 5 LTC3416 W FU CTIO AL DIAGRA U U SVIN SGND EXPOSED PAD ITH 16 5 21 18 PVIN 7 PMOS CURRENT COMPARATOR SLOPE COMPENSATION RECOVERY VOLTAGE REFERENCE 14 + TRACK 3 – + – VFB ERROR AMPLIFIER SLOPE COMPENSATION 19 0.74V + OSCILLATOR 8 – 9 SW LOGIC 12 – + 13 0.86V + – RUN/SS 4 NMOS CURRENT COMPARATOR RUN PGOOD 1 10 17 PGND 11 2 RT 20 3416 FD U OPERATIO Main Control Loop The LTC3416 is a monolithic, constant frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (P-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power MOSFET. The peak inductor current at which the current comparator shuts off the top power switch is controlled by the voltage on the ITH pin. The error amplifier adjusts the voltage on the ITH pin by comparing the feedback signal from a resistor divider on the VFB pin with an internal 0.8V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The bottom current limit is set at –5A. The operating frequency is externally set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 4MHz. Overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage comes out of regulation by ±7.5%. In an overvoltage condition, the top 3416f 6 LTC3416 U OPERATIO power MOSFET is turned off and the bottom power MOSFET is switched on until either the overvoltage condition clears or the bottom MOSFET’s current limit is reached. Voltage Tracking Some microprocessors, ASIC and DSP chips need two power supplies with different voltage levels. These systems often require voltage sequencing between the core power supply and the I/O power supply. Without proper sequencing, latch-up failure or excessive current draw may occur that could result in damage to the processor’s I/O ports or the I/O ports of supporting system devices such as memory, FPGAs or data converters. To ensure that the I/O loads are not driven until the core voltage is properly biased, tracking of the core supply voltage and the I/O supply voltage is necessary. Voltage tracking is enabled by applying a voltage to the TRACK pin. When the voltage on the TRACK pin is below 0.8V, the feedback voltage will regulate to this tracking voltage. When the tracking voltage exceeds 0.8V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. Low Supply Operation The LTC3416 is designed to operate down to an input supply voltage of 2.25V. One important consideration at low input supply voltages is that the RDS(ON) of the P-channel and N-channel power switches increases. The user should calculate the power dissipation when the LTC3416 is used at 100% duty cycle with low input voltages to ensure that thermal limits are not exceeded. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the LTC3416, however, slope compensation recovery is implemented to keep the maximum inductor peak current constant throughout the range of duty cycles. This keeps the maximum output current relatively constant regardless of duty cycle. Short-Circuit Protection Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle, eventually reaching 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the internal P-channel MOSFET and the inductor. When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. To prevent current runaway from occurring, a secondary current limit is imposed on the inductor current. If the inductor valley current exceeds 7.8A, the top power MOSFET will be held off and switching cycles will be skipped until the inductor current is reduced. 3416f 7 LTC3416 U W U U APPLICATIO S I FOR ATIO The basic LTC3416 application circuit is shown in Figure␣ 1a. External component selection is determined by the maximum load current and begins with the selection of the operating frequency and inductor value followed by CIN and COUT. Operating Frequency Selection of the operating frequency is a tradeoff between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. Operation at lower frequencies improves efficiency by reducing internal gate charge losses but requires larger inductance values and/or capacitance to maintain low output ripple voltage. The operating frequency of the LTC3416 is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator and can be calculated by using the following equation: ROSC = 3.08 • 1011 (Ω) – 10kΩ f Although frequencies as high as 4MHz are possible, the minimum on-time of the LTC3416 imposes a minimum limit on the operating duty cycle. The minimum on-time is typically 110ns. Therefore, the minimum duty cycle is equal to 100 • 110ns • f(Hz). Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ∆IL increases with higher VIN or lower VOUT and decreases with higher inductance. V V ∆IL = OUT 1– OUT fL VIN Having a lower ripple current reduces the core losses in the inductor, the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ∆IL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: VOUT VOUT L= 1 – f∆IL(MAX) VIN(MAX) Inductor Core Selection Once the value for L is known, the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Toko and Sumida. CIN and COUT Selection The input capacitance, CIN, is needed to filter the trapezoidal wave current at the source of the top MOSFET. To 3416f 8 LTC3416 U W U U APPLICATIO S I FOR ATIO prevent large voltage transients from occurring, a low ESR input capacitor sized for the maximum RMS current should be used. The maximum RMS current is given by: IRMS = IOUT(MAX) VOUT VIN VIN –1 VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For low input voltage applications, sufficient bulk input capacitance is needed to minimize transient effects during output load changes. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ∆VOUT, is determined by: 1 ∆VOUT ≤ ∆IL ESR + 8 fCOUT The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by an external resistive divider according to the following equation: R2 VOUT = 0.8 V 1 + R1 The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 2. VOUT R2 VFB LTC3416 R1 SGND 3416 F02 Figure 2. Setting the Output Voltage Voltage Tracking The LTC3416 allows the user to program how its output voltage ramps during start-up by means of the TRACK pin. Through this pin, the output voltage can be set up to either 3416f 9 LTC3416 U W U U APPLICATIO S I FOR ATIO coincidentally or ratiometrically track another output voltage as shown in Figure 3. If the voltage on the TRACK pin is less than 0.8V, voltage tracking is enabled. During voltage tracking, the output voltage regulates to the tracking voltage through a resistor divider network. The output voltage during tracking can be calculated with the following equation: R2 VOUT = VTRACK 1 + , VTRACK < 0.8V R1 Voltage tracking can be accomplished by sensing a fraction of the output voltage from another regulator. This is typically done by using a resistor divider to attenuate the output voltage that is being tracked. Setting this attenuation factor equal to the reciprocal of the gain factor provided by the feedback resistors will force the regulator outputs to be equal to each other during tracking. If tracking is not desired, connect the TRACK pin to SVIN. To implement the coincident tracking shown in Figure 3a, connect an extra resistor divider to the output of VOUT2 and connect its midpoint to the TRACK pin of the LTC3416 as shown in Figure 4. The ratio of this divider should be selected the same as that of VOUT1’s resistor divider. To implement the ratiometric sequencing in Figure 3b, no extra resistor divider is necessary. Simply connect the TRACK pin to VFB(MASTER). An alternative method of tracking is shown in Figure 5. For the circuit of Figure 5, the following equations can be used to determine the resistor values: R2 VOUT1 = 0.8 V 1 + R1 R4 + R5 VOUT2 = 0.8 V 1 + R3 V R4 = R3 OUT2 – 1 VOUT1 VOUT1 VOUT2 OUTPUT VOLTAGE OUTPUT VOLTAGE VOUT2 VOUT1 3416 F03 TIME TIME (3a) Coincident Tracking (3b) Ratiometric Sequencing Figure 3. Two Different Modes of Output Voltage Sequencing VOUT2 VOUT2 R4 R2 R2 TO VFB(MASTER) PIN TO TRACK PIN R3 TO TRACK PIN R1 R1 TO VFB(MASTER) PIN 3416 F04 (4a) Coincident Tracking Setup (4b) Ratiometric Setup Figure 4. Setup for Tracking and Ratiometric Sequencing 3416f 10 LTC3416 U W U U APPLICATIO S I FOR ATIO VOUT2 R5 SLAVE R4 VFB LTC3416 R3 SGND VOUT1 MASTER R2 VFB TRACK LTC3416 R1 SGND 3416 F05 Figure 5. Dual Voltage System with Tracking Soft-Start The RUN/SS pin provides a means to shut down the LTC3416 as well as a timer for soft-start. Pulling the RUN/ SS pin below 0.5V places the LTC3416 in a low quiescent current shutdown state (IQ < 1µA). The soft-start gradually raises the clamp on ITH. The full current range becomes available on ITH after the voltage on ITH reaches approximately 2V. The clamp on ITH is set externally with a resistor and capacitor on the RUN/SS pin as shown in Figure 1a. The soft-start duration can be calculated by using the following formula: VIN tSS = RSSCSSIn (Seconds) VIN – 1.8 V Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. 1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. In most applications, the LTC3416 does not dissipate much heat due to its high efficiency. But in applications where the LTC3416 is running at high ambient temperature with low supply voltage and high duty cycles, such as 3416f 11 LTC3416 U W U U APPLICATIO S I FOR ATIO in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3416 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. For the 20-lead exposed TSSOP package, the θJA is 38°C/W. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). To maximize the thermal performance of the LTC3416, the Exposed Pad should be soldered to a ground plane. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ∆ILOAD(ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The ITH pin external components and output capacitor shown in figure 1a will provide adequate compensation for most applications. Design Example As a design example, consider using the LTC3416 in an application with the following specifications: VIN = 3.3V, VOUT1 = 1.8V, VOUT2 = 2.5V, IOUT1(MAX) = IOUT2(MAX) = 4A, f = 1MHz. VOUT1 and VOUT2 must track when powering up and powering down. First, calculate the timing resistor: ROSC = 3.08 • 1011 – 10k = 298k 1 • 106 Use a standard value of 294kΩ. Next, calculate the inductor values for about 40% ripple current: 1.8 V 1.8 V L1 = 1– = 0.51µH 1MHz • 1.6 A 3.3V 2.5V 2.5V L2 = 1– = 0.38µH 1MHz • 1.6 A 3.3V Using a 0.47µH inductor for both results in maximum ripple currents of: 1.8 V 1.8 V ∆IL1 = = 1.74A 1– 1MHz • 0.47µH 3.3V 2.5V 2.5V ∆IL2 = = 1.29 A 1– 1MHz • 0.47µH 3.3V COUT1 and COUT2 will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design, two 100µF ceramic capacitors will be used at each output. CIN1 and CIN2 should be sized for a maximum current rating of: 1.8 V 3.3V – 1 = 1.99 ARMS IRMS1 = 4A 3.3V 1.8 V 2.5V 3.3V – 1 = 1.71ARMS IRMS2 = 4A 3.3V 2.5V 3416f 12 LTC3416 U W U U APPLICATIO S I FOR ATIO Decoupling the PVIN and SVIN pins with two 100µF capacitors on both switching regulators is adequate for most applications. Setting R1 to 200k results in a value of 255k for R2. To calculate the resistor values for the voltage divider on VOUT2, we can use the following equations: The resitor values for the voltage divider on VOUT1 can be calculated by using the following equation: 2.5V – 1 R4 = R3 1.8 V R2 1.8 V = 0.8 V 1 + R1 R4 + R5 2.5V = 0.8 V 1 + R3 Setting R3 to 205k gives the following results: R4 = 78.7k and R5 = 357k. Figure 6 shows the complete schematic for this design example. VIN 3.3V 7 14 CIN2** 100µF 2× 16 4 RPG2 100k PGOOD 17 3 2 ROSC2 294k 5 1 10 VIN 3.3V 7 CIN1** 100µF 2× RPG1 100k PGOOD 14 16 4 17 3 2 ROSC1 294k 5 1 10 PVIN SW PVIN SW SVIN SW RUN SW LTC3416 PGOOD VFB TRACK NC RT NC SGND ITH PGND PGND PGND PGND PVIN SW PVIN SW SVIN SW RUN SW LTC3416 PGOOD VFB TRACK NC RT NC SGND ITH PGND PGND PGND PGND 8 L2* 0.47µH 9 12 CFF2 22pF X7R 13 19 6 R5 357k COUT2** 100µF 2× VOUT2 2.5V 4A R4 78.7k R3 205k 15 18 20 11 8 RITH2 5.9k CITH2 680pF X7R CC2 22pF X7R L1* 0.47µH 9 12 13 CFF1 22pF X7R R2 255k COUT1** 100µF 2× VOUT1 1.8V 4A 19 6 R1 200k 15 18 20 11 RITH1 5.9k CITH1 680pF X7R 3416 F06 CC1 22pF X7R *TOKO FDVO630-R47M **TDK C4532X5R0J107M Figure 6. 1.8V and 2.5V, 4A Voltage Tracking Regulators at 1MHz 3416f 13 LTC3416 U W U U APPLICATIO S I FOR ATIO PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3416. Check the following in your layout. 1. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the SGND pin at one point which is then connected to the PGND pin close to the LTC3416. 2. Connect the (+) terminal of the input capacitor(s), CIN, as close as possible to the PVIN pin. This capacitor provides the AC current into the internal power MOSFETs. 3. Keep the switching node, SW, away from all sensitive small-signal nodes. 4. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. You can connect the copper areas to any DC net (PVIN, SVIN, VOUT, PGND, SGND or any other DC rail in your system). 5. Connect the VFB pin directly to the feedback resistors. The resistor divider must be connected between VOUT and SGND. 3416 F07a (7a) Top Layer 3416 F07b (7b) Bottom Layer Figure 7. LTC3416 Layout Diagram 3416f 14 LTC3416 U PACKAGE DESCRIPTIO FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation CA 6.40 – 6.60* (.252 – .260) 4.95 (.195) 4.95 (.195) 20 1918 17 16 15 14 13 12 11 6.60 ±0.10 2.74 (.108) 4.50 ±0.10 2.74 6.40 (.108) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 RECOMMENDED SOLDER PAD LAYOUT 1.20 (.047) MAX 4.30 – 4.50* (.169 – .177) 0° – 8° 0.09 – 0.20 (.0036 – .0079) 0.45 – 0.75 (.018 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) 0.05 – 0.15 (.002 – .006) FE20 (CA) TSSOP 0203 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3416f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3416 U TYPICAL APPLICATIO 1.5V, 4A Step-Down Regulator Tracking from 3.3V I/O Supply I/O SUPPLY CIN1** 100µF R3 174k 14 16 4 RPG 100k PGOOD 17 3 2 ROSC 294k R4 200k 5 1 10 PVIN SW PVIN SW SVIN SW RUN SW LTC3416 PGOOD VFB TRACK NC RT NC SGND ITH PGND PGND PGND PGND L1* 0.68µH 8 9 100 R2 174k 12 13 C2 22pF X7R COUT** 100µF 2× VOUT1 1.5V 4A 19 6 R1 200k 15 18 20 CITH 820pF X7R 11 RITH 7.5k 90 80 EFFICIENCY (%) 7 VIN 5V Efficiency vs Load Current 3.3V 70 60 50 40 30 *VISHAY DALE IHLP-2525CZ-01 0.68µH **TDK C4532X5R0J107M 20 10 0 0.01 C1 47pF X7R 0.1 1 LOAD CURRENT (A) 10 4316 TA02 3416 TA01 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1616 500mA (IOUT), 1.4MHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN: 3.6V to 25V, VOUT = 1.25V, IQ = 1.9mA, ISD < 1µA, ThinSOT Package LT1676 450mA (IOUT), 100kHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN: 7.4V to 60V, VOUT = 1.24V, IQ = 3.2mA, ISD < 2.5µA, S8 Package LT1765 25V, 2.75A (IOUT), 1.25MHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN: 3V to 25V, VOUT = 1.2V, IQ = 1mA, ISD < 15µA, S8, TSSOP16E Packages LT1776 500mA (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN: 7.4V to 40V, VOUT = 1.24V, IQ = 3.2mA, ISD < 30µA, N8, S8 Packages LTC1879 1.20A (IOUT), 550kHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.7V to 10V, VOUT = 0.8V, IQ = 15µA, ISD < 1µA, TSSOP16 Package LTC3405/LTC3405A 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.75V to 6V, VOUT = 0.8V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3406/LTC3406B 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 0.6V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3411 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 0.8V, IQ = 60µA, ISD < 1µA, MS, DFN Packages LTC3412 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 0.8V IQ = 60µA, ISD < 1µA, TSSOP16E Package LTC3413 3A (IOUT Sink/source), 2MHz, Monolithic Synchronous Regulator for DDR/QDR Memory Termination 90% Efficiency, VIN: 2.25V to 5.5V, VOUT = VREF/2, IQ = 280µA, ISD < 1µA, TSSOP16E Package LTC3414 4A (IOUT), 4MHz Synchronous Step-Down Regulator 95% Efficiency, VIN: 2.25V to 5V, VOUT to 0.8V, IQ = 64µA, TSSOP28E Package LTC3430 60V, 2.75A (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 90% Efficiency, VIN: 5.5V to 60V, VOUT = 1.2V, IQ = 2.5mA, ISD < 25µA, TSSOP16E Package LTC3440 600mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT = 2.5V, IQ = 25µA, ISD < 1µA, MS Package 3416f 16 Linear Technology Corporation LT/TP 0104 1K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2004