JunoTM UR8HC007-001 Input Device and Power Management Companion IC for Jupiter Devices HID & SYSTEM MANAGEMENT PRODUCTS, H/PC IC FAMILY JunoTM 01 is a member of a series of multi-functional companion ICs for Jupiter and other devices running Microsoft® Windows® CE and utilizing RISC-based processors. The IC interfaces the system via either asynchronous serial or the Serial Peripheral Interface (SPI) and provides keyboard scanning, special general purpose I/O (GPIO) and unique system power management capabilities. The Zero-PowerTM JunoTM will power down even between key presses. Semtech’s proprietary circuitry (patent pending) allows the IC to power down even when PS/2 devices are connected and active. Typical power consumption is less than 1 µA, a first for embedded ICs. The JunoTM provides continuous operation between 3 and 5V and scans a fully programmable 8 X 16 keyboard matrix. The IC is equipped with three Zero-PowerTM PS/2 ports for the hot-plug connection of an external PS/2 keyboard and mouse as well as an internal PS/2 mouse, including those with MouseWheels. FEATURES • Typically consumes less than 1 µA • Scans a fully programmable 8 X 16 matrix that supports Japanese, English and European keyboards • Operates continuously between 3 and 5 Volts • Offers unique power management capabilities that work in harmony with Windows® CE’s power modes • Always runs in “Stop” mode without data or event loss • Provides three Zero-PowerTM PS/2 ports for the hot-plug connection of external keyboards/mice & internal mouse, including MouseWheels • Uses proprietary circuitry, so “Stop” mode is entered even when PS/2 devices are connected and active • Available in 1.7mm high package to accommodate slim designs • GPIO pins provide interrupt at both falling and rising edge of signals, ideal for lid functions, power, ring indicators, docking signals, battery measurement, etc. • Has additional GPIO available for LEDs, switches, etc. • Offers internal control of LCD brightness/contrast, audio, etc. as well as four 10-bit A/D channels for power management monitoring • Cost-effective, reducing overall system costs by integrating features that would typically require multiple additional components • Provides programmable features that allow for maximum design differentiation without customization • Other JunoTM versions offer control of internal pointing device PIN ASSIGNMENTS • Jupiter devices/Professional PCs • H/PCs, Web Phones, & G3 Terminals APPLICATIONS 60 In addition, the JunoTM offers special general purpose I/O (GPIO), ideal for use for lid functions, power switches, ring indicators, docking signals, battery measurement, LEDs, etc. SS/RTS WKUP EPX6 EPX7 EPX8 EPX4 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 DESCRIPTION 41 61 40 PWM1 PWM0 R7 R6 R5 R4 R3 R2 R1 R0 VDD AVREF AVSS EPX10 EPX9 EPX1 EPX0 GIO33/AD3 GIO32/AD2 GIO31/AD1 The integration of features, many of them programmable, on one IC increases flexibility and reduces component count and cost. C14 C15 EPX3 EPX2 GIO14/SW14 GIO15/SW15 GIO00/LED0 GIO01/LED1 GIO02/LED2 GIO03/LED3 VSS OSCO OSCI PS2EN HSUS RESET VSS1 LID PWROK MOSI/RXD UR8HC007-001-FQ 80 1 GIO30/AD0 GIO17/SW17 GIO16/SW16 EX1CLK EX0CLK IPCLK EX1DAT EX0DAT IPDAT EPX5 DA GIO21/SW1/±INT1 GIO20/SW0/±INT0 GIO13/SW13 GIO12/SW12 GIO11/SW11 GIO10/SW10 ATN/CTS SCLK/ISEL MISO/TXD 1 Juno is a trademark of Semtech Corporation. All other trademarks belong to their respective companies. Copyright @1998-2001 Semtech Corporation DOC8-007-001-DS-108 21 www.semtech.com 20 ORDERING CODE Package options Pitch in mm’s 80-pin, Plastic LQFP 0.5 Other materials Type Document Technical Reference Manual JunoTM Evaluation Kit Evaluation Kit XX = Optional for customization XXX = Denotes revision number TA = 0°C to +75°C UR8HC007-001-XX-FQ Part number DOC8-007-001-TR-XXX EVK8-007-001-XXX FUNCTIONAL DIAGRAM SCLK / ISEL MOSI/RxD MISO/TxD Dual Mode Serial Communications Port ROW 0-7 Keyboard Matrix Scanner COL 0-15 SS/RTS 10 Embedded Pointer PWROK Configuration Status and Control Registers Power Management Unit LID HSUS 3 4 HID Manager ATN/CTS Analog Outputs 14 bit PWM0 14 bit PWM1 8 bit D/A External PS/2 Port 2 External PS/2 Port 1 Internal PS/2 Pointer Analog Inputs 10 bit A/D (Shared with GI03) Clock Data Clock Data Clock Data GPIO GIO30-33 / A/D0-3 GIO00-03 / LED0-3 4 Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 4 2 GIO10-17 / SW / INT 8 GIO20-21 / ±INT0-1 2 www.semtech.com PIN DEFINITIONS Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 Pin Numbers Mnemonic Power Supply VDD AVREF AVSS VSS VSS1 71 72 73 30 24 PWR AI PWR PWR PWR Positive Supply Voltage Positive analog reference voltage Ground: analog signal Ground: negative supply voltage Auxiliary Ground; must be tied to pin 30 Reset _RESET 25 I Controller hardware reset pin: when at Low-level, this pin holds the UR8HC007in a reset state. This pin must be held at a logic-low until Power Supply voltage (VDD) reaches the minimum operating level (2.7V). Oscillator pins OSCI 28 I _OSCO 29 O Oscillator input: connect ceramic resonator with built-in load capacitors or CMOS clock from external oscillator 4 MHz operating frequency Oscillator Output: connect ceramic resonator with built-in load capacitors or keep open if external oscillator is used Keyboard / Event Wake-up _WKUP 59 I/pD Wake-up: wakes up the chip if there is a key press in the scanned keyboard matrix (Active-Low) or drives the pin High when running QFP Type Name and Function Scanned matrix pins ROW0-ROW7 COL0-COL7 COL8-COL11 COL12-COL13 COL14-COL15 PS/2 ports PS2EN 62-55 54-47 38-35 27-26 79-78 I O Row matrix outputs Column matrix outputs 27 O IPDAT 9 I5V/nD5V IPCLK 6 I5V/nD5V EX0DAT EX0CLK EX1DAT EX1CLK 8 5 7 4 I5V/nD5V I5V/nD5V I5V/nD5V I5V/nD5V Control output: when Low, disables PS/2 communications by holding the PS/2 Clock lines low PS/2 Data line for Internal Pointing Device PS/2 Clock line for Internal Pointing Device PS/2 Data line for External Device 0 PS/2 Clock line for External Device 0 PS/2 Data line for External Device 1 PS/2 Clock line for External Device 1 3 www.semtech.com PIN DEFINITIONS (CON’T) Pin Numbers Mnemonic General Purpose Input/Ouput GIO0 GIO00/LED0-GIO3/LED3 GIO1 GIO10/SW10-GIO15/SW15 QFP Type 34-31 I/O 17-14 36-35 3-2 I/O Name and Function General purpose input/output pin, LED driver General purpose input/output pin, Switch input GIO16/SW16-GIO17/SW17 I5V/nD5V General purpose input/output pin, Switch input Note: In order to have a Negative Edge Interrupt capability for SW10 - SW17, the corresponding Switch Inputs should also be connected to the extended resistive network acting on the _WKUP pin. Switch closure must be tied to Ground; the IC will remain in high power consumption mode until all the switches are released. GIO2 GIO20/SW0/±INT0 13-12 I/O, I±Int General purpose input/output pin, GIO20/SW0/±INT0 Switch Input. Capable of Interrupt on both Positive and Negative edges GIO3 - analog input GIO30/AD0 1 I/O/Ai General purpose input/output pin, A/D input 0 GIO31/AD1 80 I/O/Ai General purpose input/output pin, A/D input 1 GIO32/AD2 79 I/O/Ai General purpose input/output pin, A/D input 2 GIO33/AD3 78 I/O/Ai General purpose input/output pin, A/D input 3 Analog output PWM0 62 O Channel 0 of Pulse Width Modulator PWM1 61 O Channel 1 of Pulse Width Modulator DA 11 Ao D/A output (Range: AVSS to AVREF) Reserved for embedded pointing device EPX0 77 I/O/Ai Driver, A/D EPX1 76 I/O/Ai Driver, A/D EPX2 37 I/O Control, Driver EPX3 38 I/O Control, Driver EPX4 55 I/O Control, Driver EPX5 10 I/O/Ao Control, Driver, Analog Adjustment EPX6 58 I/Ipup/O Left Button EPX7 57 I/Ipup/O Middle Button EPX8 56 I/Ipup/O Right Button EPX9 75 I/O/Ai Driver, A/D EPX10 74 I/O/Ai Driver, A/D System status monitoring _LID 23 I±Int Lid closed signal from the lid switch (Active-Low). Capable of Interrupt on both Positive and Negative edges PWROK 22 I±Int Power OK signal. Capable of Interrupt on both Positive and Negative edges Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 4 www.semtech.com PIN DEFINITIONS (CON’T) Mnemonic _HSUS Pin Numbers QFP Type 26 I Communication interface _SS/_RTS 60 I_Int _ATN/_CTS 18 O MISO/TXD 20 I/O / O MOSI/RXD 21 I SCLK/ISEL 19 I Name and Function Host_Suspended signal (Active-Low). When Low, indicates that Host Computer System is in Power-reduced or Stop mode. Slave_Select (SPI Mode) or Ready_To_Send (Asynchronous Serial Mode). Active-Low signal Input. Low-level indicates that the Host System has data for the UR8HC007001 peripheral device or the Host System is ready to accept data from the UR8HC007-001 peripheral device. Capable of Interrupt on Negative edge. Pin 60 and pin 18 should both be "Low" for data exchange to occur. Attention (SPI Mode) or Clear_To_Send (Asynchronous Serial Mode ). Active-Low signal Output. Low-level indicates that the UR8HC007-001 peripheral device has data for the Host System or the UR8HC007 peripheral device is ready to accept data from the Host System. Pin 18 and pin 60 should both be "Low" for data exchange to occur. Master-In-Slave-Out (SPI Mode) or Transmit Data (Asynchronous Serial Mode, Idle = "High" = 1) Master-Out-Slave-In (SPI Mode) or Receive Data (Asynchronous Serial Mode) Serial Clock (SPI Mode) or Interface Select (Asynchronous Serial Mode). Tie "Low" to select Asynchronous Serial Mode. In SPI Mode, use the following Clock sequence: Idle-High / Negative-Edge (Shift Data) \ PositiveEdge (Latch Data), Idle-High. Note 1: An underscore in front of the pin mnemonic denotes an active low signal. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 5 www.semtech.com JUNOTM FAMILY COMMUNICATIONS INTERFACE The Juno™ family of controllers implements two modes of serial communications: The "Synchronous Peripheral Interface" (SPI) mode and the "Asynchronous Serial Interface" (ASI). The diagrams below describe the SPI and ASI communications interfaces, respectively. SPI Communications Interface MOSI The SPI is a synchronous bidirectional, multi-slave interface that supports bit rates up to 500 Kb/s. Several Hosts and companion chips implement the SPI protocol in order to communicate with a wide range of peripherals such as EEPROMs, A/D converters, MCUs and other system components. Alternatively, the SPI may be implemented through software on the Host side. The Juno™ family implements the _ATN as an additional hand-shake signal in order to support low power operation of the bus. MISO Host (master) SCLK _SS _ATN _SS USAR Juno™ (slave) SLAVE 2 ASI Communications Interface The ASI is an asynchronous interface (UART type) that operates at a fixed baud rate of 62.5 Kb/s. Host Both interfaces are implemented through the same set of four pins. The IC determines the mode of communication with the Host during power-up by reading the value of the SCLK/ISEL pin. If the pin is tied low, the ASI mode is enabled. If it is high, the SPI interface is enabled. Please refer to the JunoTM Technical Reference Manual for a description of handshake and critical timing parameters for each interface. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 UR8HC007 CTS CTS RTS RTS RxD RxD TxD TxD ISEL GND 6 www.semtech.com PROTOCOLS, COMMANDS AND REPORTS Overview General Message Structure The Juno™ UR8HC007 implements and supports four types of transaction messages. Communications between the Juno™ UR8HC007 and the Host processor are implemented using a set of packet protocols and commands. The general structure of a message is shown in the following diagram: 1. Commands from the UR8HC007 to the Host system Protocol Header Command/Report Identifier Message Body (if applicable) 2. Commands from the Host system to the UR8HC007 LRC 3. Human Input Device (HID) reports to the system 4. Event Alert messages to the system General Message Format The Protocol Header identifies the type of transaction. The following table lists the available protocols. Protocol Headers The protocol is fundamentally implemented through a set of general packet commands that allow handling and reporting of each individual controller register and each bit within each register. In this manner, the system achieves maximum flexibility in manipulating the operation of the UR8HC007 controller. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 Protocols used in commands issued by the Host Protocol Simple Commands Write Register bit Read Register bit Write Register Read Register Write Block Read Block Protocols used in responses, reports and alerts issued by the controller Protocol Simple Commands Report Register bit & Event Alerts Report Register Report Block Pointing Device Data Report Keyboard Device Data Report 7 Header 80H 81H 82H 83H 84H 85H 86H Header 80H 81H 83H 85H 87H 88H www.semtech.com PROTOCOLS, COMMANDS AND REPORTS, (CON’T) HID Data Report General Commands Format The Pointing Device Data Reports format covers both absolute (where applicable) and relative positioning devices. In addition, it provides support for MouseWheel-type of input devices. For protocols used by either the host or the UR8HC007, a set of simple commands is implemented. These support the basic communication protocol and handle reset and errors in transmission. Keyboard Data Report The Keyboard Data Reports return changes on the keyboard matrix or the External PS/2 keyboard device. Keys are uniquely identified according to the Key Number table listed in Appendix A of the JunoTM Technical Reference Manual. The Key Up or Key Release numbers comprise the logic OR of the Key Number and 80H. LRC (Longitudinal Redundancy Check) A simple command would have the following structure: Header (80H) Command Code LRC Simple Command Structure Following is a summary of the simple commands used by both the Host and the UR8HC007: Simple Commands Summary Command Initialize Protocol Simple Cmd Code 20H Initialization Complete Simple 21H Resend Request Simple 25H The LRC is calculated for the whole packet, including the Protocol Header. The LRC is calculated by first taking the bitwise exclusive OR of all bytes from the message. If the most significant bit (MSB) of the LRC is set, the LRC is modified by clearing the MSB and changing the state of the next most significant bit. Thus, the Packet Check Byte will never consist of a valid LRC with the most significant bit set. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 8 Description Forces the recipient to enter the known default power-on state Issued as a hand-shake response only to the "Initialize" command. Issued upon error in the reception of a package. The recipient will resend the last transmitted packet www.semtech.com REGISTERS The Juno™ implements a set of internal registers that can be used to control and monitor the operation of the various functional units of the controller IC. These registers can be accessed through the Read/Write Register commands described in the Commands chapter of the Juno™ Technical Reference Manual. The register architecture of the Juno™ allows for maximum flexibility and expandability of the controller operation. At the same time, by using the default values for each register, a system can utilize all the basic functionality of the IC controller with minimum Host driver intervention. Registers’ Page Organization Register Offset 00 01 Registers’ Page 0 Control and Status Registers 0 255 Page Number Register Page Number Register Register Offset 1 00 01 Registers’ Page 1 Scanned Matrix and Alternate Layout Keys Registers 255 Page Number Register Figure 1: Registers’ Page Organization Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 9 www.semtech.com POWER MANAGEMENT MODES OF OPERATION POWER MANAGEMENT The UR8HC007 has three modes of operation relating to its power consumption. The Juno™ UR8HC007 family of controllers implements two power management methods: system-coordinated power management and Self Power Management™ (SPM). The "Stop" mode is the lowest power consumption mode. In this mode, the crystal is stopped and the IC consumes only 1 µA of leakage current. This is the default mode to which the IC will revert any time an event or a signal condition does not force it to exit this mode. System-coordinated power management primarily determines the tasks performed and the type of reports communicated to the Host. The Juno™ monitors the system states through the PWROK (Power OK), _LID (Lid closed) and _HSUS (Host suspended) lines. In addition to these signal inputs, the UR8HC007 family provides a set of registers, described in the "Registers" chapter of the JunoTM Technical Reference Manual, that can be used by the host to control the PM-related performance of the controller through software. According to the status of these lines (or register settings), the Juno™ will enable or disable specific tasks and reports suited to the current power and system management state of the Host. The "Wait" mode is entered each time it is necessary for a timer to be running in order to perform a system function. Such functions include the LED blinking mode and the use of one of the PWM channels. Typical power consumption in this mode is several hundred µAs. The "Run" mode is entered briefly, only to process an event or while an interrupt-generating signal condition persists. The controller IC will remain in this mode only for as long a signal prohibits it from reentering a lower power consumption mode or for as long as it is necessary to process a Host-related transaction (a few milliseconds). Self Power Management™ describes a method implemented by the Juno™ controller that, independently of any system intervention, results in the lowest power consumption possible within the given parameters of its operation. Through Self Power Management™, the Juno™ controllers are capable of typically operating at only 1 µA, independent of the state of the system. Self Power Management™ primarily determines the actual power consumption of the controller IC. The Juno™ implements the Semtech-patented Self Power Management™ method to achieve the minimum power consumption possible, independent of the Host power management state. Even when the Host is in the active state, the IC can still operate most of the time at only 1 µA, even with external PS/2 devices attached to it. Critical Suspend PWROK=1 AND _LID=0 PWROK=0 PWROK=1 AND _LID=1 AND _HSUS=1 PWROK=0 PWROK=1 AND _LID=1 AND _HSUS=0 PWROK=0 Lid Closed* PWROK=1 AND _LID=0 PWROK=1 AND _LID=1 AND _HSUS=0 Host Suspend PWROK=1 AND _LID=1 AND _HSUS=1 PWROK=1 AND _LID=0 PWROK=1 AND _LID=1 AND _HSUS=1 PWROK=1 AND _LID=1 AND _HSUS=0 Figure 2: USAR JunoTM State Diagram Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 10 www.semtech.com SPM ZERO-POWERTM OPERATION OF PS/2 PORTS The Juno™ implements the Semtech-patented "Message lossless wake-up™" method to operate all three PS/2 ports. This method enables the controller to interface with devices attached to its PS/2 ports while still operating in the "Stop" mode. Typical power consumption of the PS/2 ports is therefore 1 µA. If a PS/2 device reports a data packet, the controller will exit the "Stop" mode for as long as it takes to process the device message and relay the information, if necessary, to the Host system. This operation is done transparently to the Host, without any message loss or any response delays from the input devices. This unique technology allows computers to operate at their minimum power consumption state even with PS/2 devices attached. Systems that employ an internal pointing device, such as a touch pad or a force stick, can benefit the most from this feature, since the pointing device will force the controller to exit its "Stop" mode only when there is data to be reported. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 PS/2 PORTS The UR8HC007-001 provides three PS/2 ports for the hot-plug connection of an external keyboard, an external mouse and an internal mouse. All of the internal and external devices are active at all times. Data from both the external and internal keyboards and mice are merged and seamlessly presented to the system. 5-Volt Tolerant PS/2 ports The UR8HC007 controller can be powered by a power supply between 3 and 5 Volts (+/- 10%). Even when the USAR controller is powered by a 3Volt supply, the three PS/2 ports can directly interface with 5-Volt powered devices — without the need of any external level-shifting circuitry. The Host can enable or disable all the external PS/2 ports simultaneously, in sync with the 5-Volt power plane that powers them. Alternatively, it can select any PS/2 port selectively, through the "HID enable/disable control" register. PS/2 Mouse Handling The JunoTM provides a port for the connection of an internal PS/2 mouse. This port supports MouseWheel functionality. An internal mouse connected to a system’s PS/2 port consumes a significant amount of power as it must always be “on.” A mouse connected to one of Juno’s™ PS/2 ports consumes minimal power because the Juno™ will power down even when the internal mouse is connected and active. 11 www.semtech.com HID MANAGER The UR8HC007 Human Input Device (HID) Manager is responsible for the configuration and handling of HID devices that are embedded or attached to the controller. The HID Manager has the following responsibilities: 1. Enabling and disabling embedded and attached input devices through the "HID enable/disable control" register 2. Formatting and relaying input device reports to the Host 3. Controlling the configuration and operation of both embedded and attached input devices The HID Manager consists of the four functional blocks: the PS/2 Port Manager; the Keyboard Manager; the Pointing Device Manager; and the Direct Port Manager. The function of each Manager is explained in full in the JunoTM Technical Reference Manual. OTHER JUNOTM SERIES MEMBERS Other members of the JunoTM series of companion ICs offers advanced, ergonomic control of an internal pointing device. Enabled pointing devices include touch pads, touch screens or force sticks. If the application requires an internal pointing device, using a pointingenabled JunoTM will eliminate the need for a dedicated mouse encoder IC. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 KEYBOARD ENCODING The UR8HC007-001 will encode an 8-row by 16-column keyboard matrix. OEMs may reprogram the matrix by sending commands to the IC from the system. The JunoTM supports English, Japanese and European keyboards. In addition, the IC supports both sticky keys and notebook-style keyboards. The keyboard below, the Fujitsu FKB7654, is the default keyboard for the UR8HC007-001. E sc F1 ! 1 t ab cap l ock F2 @ 2 Q F4 # 3 W A S fn F5 $ 4 E Z shi f t ct rl F3 % 5 R D X F7 ^ 6 T F C a lt F6 & 7 Y G V F8 7 * 8 U H B F9 4 J N sZpa c e F1 0 8 ( 9 I 1 5 K M 0 F1 1 9 2 6 L < , Pa u Br k _ - ) 0 O SL NL F1 2 : ; > . alt . + ? / D el Srq ~ ` + = P 3 Ins Prt { [ } ] " ' | \ bk sp e n te r / s h ift c trl pgup pgup pgup pgup Fujitsu FKB7654 GENERAL PURPOSE INPUT OUTPUT The JunoTM provides many GPIO pins which enable OEMs to easily differentiate their products. Four GPIO ports provide interrupt at both falling and rising edge of signals. Two of these pins are dedicated for use as a Lid indicator and Digital power monitor. The other two may be used for a ring indicator, docking signal, soft power button, etc. Three GPIO pins provide A/D input and are ideal for battery measurement. Three GPIO pins provide two Pulse Width Modulation (PWM) channels and one D/A channel and may be used for analog control functions such as LCD brightness/contrast or audio volume control. Four GPIO pins with high drive ability are set aside as LED drivers or I/O. Eight GPIO pins can be used as system control outputs or inputs, for example, for switches. 12 www.semtech.com SAMPLE SCHEMATIC FOR THE UR8HC007-001-FQ RN1 10k TO / FROM KEYBOARD MATRIX 47pF 47pF C3 8 Z1 Z0 3 5 6 Y1 Y0 1 2 X1 X0 13 12 _WKUP 9 10 11 6 7 5 4 3 2 2 3 35 36 14 15 16 17 GIO17/SW17 GIO16/SW16 GIO15/SW15 GIO14/SW14 GIO13/SW13 GIO12/SW12 GIO11/SW11 GIO10/SW10 GIO21 GIO20 12 13 GIO21/SW1/±INT1 GIO20/SW0/±INT0 GIO33 GIO32 GIO31 GIO30 78 79 80 1 GIO33/AD3 GIO32/AD2 GIO31/AD1 GIO30/AD0 PWM1 PWM0 DA 61 62 11 PWM1 PWM0 DA OSCI 28 VSS1 VSS AVSS 24 30 73 RESET 25 AVREF VDD 72 71 R1 10k Q1 TD_PNP V+ 59 WKUP 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 63 64 65 66 67 68 69 70 R7 R6 R5 R4 R3 R2 R1 R0 29 Q2 TD_NPN GIO17 GIO16 GIO15 GIO14 GIO13 GIO12 GIO11 GIO10 OSCO 4.00 MHz GIO03/LED3 GIO02/LED2 GIO01/LED1 GIO00/LED0 13 1 .1µF 3 U3 VOLT_DET V+ SS/RTS ATN/CTS MISO/TXD MOSI/RXD SCLK/ISEL ASYNCRONOUS INTERFACE SYNCR ONOUS INTER FACE 2 SYNCRONOUS S ERIAL CLOCK MASTER_OUT / SLAVE_IN or RxD MASTER_IN / SLAVE_OUT or TxD _ATTENTION or _CTS _SLAVE_S ELECT or _RTS www.semtech.com COMMUNICATION INTERFACE POWER_OK NOT_HOST_SUSPENDED 60 18 20 21 19 23 22 26 LID CLOSED 3 1 SPDT Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 LID OPEN 2 S W 1 V+ RESERVED FO R EMBEDD DED POINTER FROM CHIPSET AND/OR POWER SUPPLY LID PWROK HSUS C1 UR8HC007-001-FQ EPx5 EPx4 EPx3 EPx2 EPx1 EPx0 10 55 38 37 76 77 56 57 58 EPx8 EPx7 EPx6 EPx10 EPx9 Y1 31 32 33 34 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0 4 EX1CLK 7 EX1DAT 5 EX0CLK 8 EX0DAT 6 IPCLK 9 IPDAT 27 PS2EN GIO03 GIO02 GIO01 GIO00 74 75 ANALOG OUT GIO PORT 3 GIO PORT 2 GIO PORT 1 GIO PORT 0 +5V 1 16 X C2 R2 10k +5V Y VDD 15 14 8 7 VEE U2 74HCT4053 VSS Z GND IPDAT R3 10k EX0CLK EX0DAT IPPWR TO PAGE 2 PS/2 I/O EX1CLK EX1DAT IPCLK INTERNAL PS/2 POINTE POINTER 4 9 C B A INH JUNOTM ELECTRICAL CHARACTERISTICS Absolute maximum ratings (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Value -0.3 to +7.0 Supply Voltage VDD Input voltage All pins except 2-9 VIN -0.3 to VDD+0.3 Pins 2-9 (PS/2 ports XXXDAT, XXXCLK, GIO16/SW16, GIO17/SW17) VIN -0.3 to +5.8 Output current Total peak for all pins ΣIOH (Peak) -80 80 ΣIOL (Peak) Total average for all pins ΣIOH (Avg) -40 40 ΣIOL (Avg) All pins except 31-34 Peak for each pin IOH (Peak) -10 IOL (Peak) 10 Average for each pin IOH (Avg) -5 IOL (Avg) 5 Pins 31-34 (GIO00/LED0 - GIO03/LED3) Peak for each pin IOH (Peak) -10 IOL (Peak) 20 -5 Average for each pin IOH (Avg) IOL (Avg) 15 Temperature range -20 to 85 Operating Temperature TLOW to THIGH Storage Temperature TSTG -40 to 125 Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 14 www.semtech.com Unit V V V mA mA mA mA mA mA ºC ºC POWER CONSUMPTION WHILE OPERATING THE PWM CHANNELS Users should consider the built-in PWM channels for generating slowly changing DC control voltages. Since continuous clocking is necessary for the PWM operations, the only penalty for using the built-in PWM channels is the requirement for the chip to operate at least in the Reduced Power Mode, with typical Current Consumption of 750 µA. NOTES FOR ELECTRICALS Note1: Current Consumption values do not include any loading on the Output pins or Analog Reference Current for the built-in A/D or D/A modules. Note 2: Since the built-in A/D module consumes current only during short periods of time (when A/D conversion is actually requested), the Analog Reference Current for the built-in A/D module is not a significant contributor to the overall power consumption. Note 3: The Analog Reference Current for the built-in D/A module correlates linearly to the Output Voltage. For D/A output of 0V, the Analog Reference Current is null. For D/A outputs approaching Full Scale (AVREF), the maximum Analog Reference Current is indicated in this Table. This current is a significant contributor to the overall power consumption. JUNOTM ELECTRICAL CHARACTERISTICS, (CON’T) Recommended Operating Conditions, Digital Section (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Min Typ Max 2.7 3.0 5.5 Supply voltage VDD Input logic high voltage VDD 0.8VDD All pins except 2-9 VIH Pins 2-9 (PS/2 ports xxxDAT, xxxCLK, GIO16/SW16, GIO17/SW17) VIH 0.8VDD 5.5 Input logic low voltage 0 0.2VDD All pins except 28 VIL Pin 28 (OSCI) VIL 0 0.16VDD Input current IIL / IIL -5.0 0 5.0 VI = VSS, VDD) Input Pull-up Current (pins 56-58 / IP6-IP8, -120 -10 IPUP VI = VSS) Output voltage VDD-1.0 VOH IOH = -1.0 mA VOL 0.4 IOL = 1.6 mA Current Consumption (see note 1 below) Full Speed Mode (Fosc=4MHz) IDD 3.5 7.0 Reduced Power Mode 750 (Fosc=4MHz) IDD Stop Mode (Interrupts active, Fosc=0) 1.0 (TA = 25ºC) IDD .1 10(TA = 85ºC ) Recommended operating conditions, analog section (VSS = 0V, Ambient Temperature TA is in the range TLOW to THIGH) Parameter Symbol Min Typ Max Analog Signal Ground AVSS 0 Analog Reference Voltage AVREF 2.7 VDD VDD A/D Resolution 10 A/D Absolute Accuracy ±4 A/D Analog Input Voltage Range VIA AVSS AVREF A/D Analog Input Current IIA 5.0 Analog Reference Current (see note 2) (A/D is active) IAVREF 200 D/A Resolution 8 D/A Absolute Accuracy 2.5 D/A Output Impedance RO 1 2.5 4.0 Analog Reference Current (see note 3) (D/A is active, Output = Full Scale) IAVREF 3.2 Note 1: please see left Note 2: please see left Note 3: please see left Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 15 www.semtech.com Unit V V V V V µA µA V V mA µA µA Unit V V Bits LSb V µA µA Bits % KOhms mA MECHANICALS FOR THE UR8HC007 LQFP PACKAGE HD D 61 60 20 41 E 1 HE 80 A 21 40 L1 A2 F A1 c e L Detail F b y Symbol b2 ME e MD I2 Recommended Mount Pad A A1 A2 b c D E e HD HE L L1 y b2 I2 MD ME Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 16 Dimension in Millimeters Min Nom Max – – 1.7 0.1 0.2 0 – – 1.4 0.13 0.18 0.28 0.105 0.125 0.175 11.9 12.0 12.1 11.9 12.0 12.1 – 0.5 – 13.8 14.0 14.2 13.8 14.0 14.2 0.3 0.5 0.7 1.0 – – – – 0.1 – 0˚ 10˚ – – 0.225 – – 1.0 – – 12.4 – – 12.4 www.semtech.com BILL OF MATERIALS FOR THE UR8HC007-001-FQ Quantity 1 2 1 3 1 1 2 Manufacturer Generic Generic Harris Generic CTS AVX ALCO Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 Part# C1296-104-X50 C1206-470-N50 CD74HCT4053M R1206-103-TF-5 745-101-R103CT-ND PBRC-4.00BR ADE-03 17 Description .1uF Ceramic Chip Cap, Z5U, SMT, 1206 47 pF Ceramic Chip Cap, NPO orX7R, SMT, Size:1206 SMT Triple 2-ch Ana Mult/Dem 10K Resistor, 5% Thick Film, SMT, 1206 10K, 8 resistors, bussed, 10 pins, SMT 4.00MHz Ceramic Resonator w/Caps, SMT Switch, 3 Position Dip, THD www.semtech.com For sales information and product literature, contact: HID & System Mgmt Division Semtech Corporation 568 Broadway New York, NY 10012 [email protected] http://www.semtech.com 212 226 2042 Telephone 212 226 3215 Telefax Semtech Western Regional Sales 805-498-2111 Telephone 805-498-3804 Telefax Semtech Central Regional Sales 972-437-0380 Telephone 972-437-0381 Telefax Semtech Eastern Regional Sales 203-964-1766 Telephone 203-964-1755 Telefax Semtech Asia-Pacific Sales Office +886-2-2748-3380 Telephone +886-2-2748-3390 Telefax Semtech Japan Sales Office +81-45-948-5925 Telephone +81-45-948-5930 Telefax Semtech Korea Sales Sales +82-2-527-4377 Telephone +82-2-527-4376 Telefax Northern European Sales Office +44 (0)2380-769008 Telephone +44 (0)2380-768612 Telefax Southern European Sales Office +33 (0)1 69-28-22-00 Telephone +33 (0)1 69-28-12-98 Telefax Central European Sales Office +49 (0)8161 140 123 Telephone +49 (0)8161 140 124 Telefax Copyright ©1998-2001 Semtech Corporation. All rights reserved. Juno is a trademark of Semtech Corporation. Semtech is a registered trademark of Semtech Corporation. All other trademarks belong to their respective companies. INTELLECTUAL PROPERTY DISCLAIMER This specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. A license is hereby granted to reproduce and distribute this specification for internal use only. No other license, expressed or implied to any other intellectual property rights is granted or intended hereby. Authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. Authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights. Copyright ©1998-2001 Semtech Corporation DOC8-007-001-DS-108 18 www.semtech.com