MICRO-LINEAR ML4861ES-3

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ML4861*
Low Voltage Boost Regulator
GENERAL DESCRIPTION
FEATURES
The ML4861 is a boost regulator designed for DC to DC
conversion in 1 to 3 cell battery powered systems. The
combination of BiCMOS process technology, internal
synchronous rectification, variable frequency operation,
and low supply current make the ML4861 ideal for 1 cell
applications. The ML4861 is capable of start-up with input
voltages as low as 1V and is available in 6V, 5V, and 3.3V
output versions with output voltage accuracy of ±3%.
■
An integrated synchronous rectifier eliminates the need
for an external Schottky diode and provides a lower
forward voltage drop, resulting in higher conversion
efficiency. In addition, low quiescent battery current and
variable frequency operation result in high efficiency
even at light loads. The ML4861 requires only one
inductor and two capacitors to build a very small
regulator circuit capable of achieving conversion
efficiencies in excess of 90%.
The circuit also contains a RESET output which goes low
when the IC can no longer function due to low input
voltage, or when the DETECT input drops below 200mV.
■
■
■
■
■
Guaranteed full load start-up and operation at 1V input
Pulse Frequency Modulation and Internal Synchronous
Rectification for high efficiency
Minimum external components
Low ON resistance internal switching FETs
Micropower operation
6V, 5V, and 3.3V output versions
* Some Packages Are Obsolete
BLOCK DIAGRAM
L1
CIN*
1
6
VIN
VL
VOUT
5
*RA
UVLO
DETECT
+
4
VREF
+
–
+
BOOST
CONTROL
–
FEEDBACK
2
COUT
*RB
PWR
GND
GND
8
3
–
RESET
7
*OPTIONAL
TO MICROPROCESSOR
1
ML4861
PIN CONNECTION
ML4861-6/-5/-3
8-Pin SOIC (S08)
VIN
1
8
PWR GND
VREF
2
7
RESET
GND
3
6
VL
DETECT
4
5
VOUT
TOP VIEW
PIN DESCRIPTION
PIN
NO.
2
NAME
FUNCTION
PIN
NO.
NAME
FUNCTION
1
VIN
Battery input voltage
5
VOUT
Boost regulator output
2
VREF
200mV reference output
6
VL
Boost inductor connection
3
GND
Analog signal ground
7
RESET
4
DETECT
When this pin below VREF, causes
the RESET pin to go low
Output goes low when regulation
cannot be achieved or when DETECT
goes below 200mV
8
PWR GND Return for the NMOS output transistor
ML4861
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Temperature Range
ML4861CS-X .............................................. 0°C to 70°C
ML4861ES-X ........................................... –20°C to 70°C
ML4861IS-X ............................................ –40°C to 85°C
VIN Operating Range
ML4861CS-X ................................ 1.0V to VOUT – 0.2V
ML4861ES-X, ML4861IS-X ............ 1.1V to VOUT – 0.2V
Voltage on any pin ....................................................... 7V
Peak Switch Current, I(PEAK) ..................................................... 2A
Average Switch Current, I(AVG) ....................................... 500mA
Junction Temperature ............................................. 150°C
Storage Temperature Range ...................... –65°C to 150°C
Lead Temperature (Soldering 10 sec.) ..................... 260°C
Thermal Resistance (qJA) ..................................... 160°C/W
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN = Operating Voltage Range, TA = Operating Temperature Range (Note 1).
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNITS
45
55
µA
8
10
µA
1
µA
Supply
VIN Current
VIN = VOUT – 0.2V
VOUT Quiescent Current
VL Quiescent Current
Reference
Output Voltage (VREF)
0 < IPIN2 < –5µA,
190
200
210
mV
9
10
11
µs
8.5
10
11.5
µs
5.82
4.85
3.2
6.0
5.0
3.3
6.18
5.15
3.4
V
V
V
PFM Regulator
Pulse Width (TON)
VIN = 2.4V
C/E Suffix
I Suffix
Output Voltage (VOUT)
ML4861-6
ML4861-5
ML4861-3
(Note 2)
Load Regulation
ML4861-6
See Figure 1
VIN = 1.2V, IOUT - 20mA
VIN = 2.4V, IOUT - 95mA
5.82
5.82
6.0
6.0
6.18
6.18
V
V
ML4861-5
VIN = 1.2V, IOUT - 25mA
VIN = 2.4V, IOUT - 135mA
4.85
4.85
5.0
5.0
5.15
5.15
V
V
ML4861-3
VIN = 1.2V, IOUT - 40mA
VIN = 2.4V, IOUT - 180mA
3.2
3.2
3.3
3.3
3.4
3.4
V
V
C/E Suffix
0.85
0.95
V
I Suffix
0.95
1.05
V
200
210
mV
100
nA
Under-Voltage Lockout Threshold
RESET Comparator
DETECT Threshold
190
DETECT Bias Current
–100
RESET Output High Voltage (VOH)
IOH = –100µA
RESET Output Low Voltage (VOL)
IOL = 100µA
Note 1:
Note 2:
VOUT – 0.2
V
0.2
V
Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
For CS/ES suffix, TON = 0 at VOUT(MAX), 9µs - TON - 11µs at VOUT(MIN). For IS suffix, TON = 0 at VOUT(MAX), 8.5µs - TON - 11.5µs at VOUT(MIN).
3
ML4861
27µH
(Sumida CD75)
VIN
100µF
ML4861
VIN
0.1µF
PWR GND
VREF
RESET
GND
VL
DETECT
VOUT
VOUT
100µF
IOUT
Figure 1. Application Test Circuit
L1
VIN
6
VL
Q2
START-UP
+
VOUT
+
5
A2
C1
–
R Q
10µs
ONE SHOT
Q1
R1
S
–
A1
+
VREF
Figure 2. PFM Regulator Block Diagram
4
R2
VOUT
–
ML4861
RESET COMPARATOR
FUNCTIONAL DESCRIPTION
The ML4861 combines Pulse Frequency Modulation
(PFM) and synchronous rectification to create a boost
converter that is both highly efficient and simple to use. A
PFM regulator charges a single inductor for a fixed period
of time and then completely discharges before another
cycle begins, simplifying the design by eliminating the
need for conventional current limiting circuitry.
Synchronous rectification is accomplished by replacing an
external Schottky diode with an on-chip PMOS device,
reducing switching losses and external component count.
A block diagram of the boost converter is shown in Figure
2. The circuit remains idle when VOUT is at or above the
desired output voltage, drawing 45µA from VIN, and 8µA
from VOUT through the feedback resistors R1 and R2.
When VOUT drops below the desired output level, the
output of amplifier A1 goes high, signaling the regulator to
deliver charge to the output. Since the output of amplifier
A2 is normally high, the flip-flop captures the A1 set signal
and creates a pulse at the gate of the NMOS transistor Q1.
The NMOS transistor will charge the inductor L1 for 10µs,
resulting in a peak current given by:
T × VIN 10µs × VIN
IL(PEAK) = ON
≈
L1
L1
(1)
For reliable operation, L1 should be chosen so that IL(PEAK)
does not exceed 2A.
When the one-shot times out, the NMOS transistor
releases the VL pin, allowing the inductor to fly-back and
momentarily charge the output through the body diode of
PMOS transistor Q2. But, as the voltage across the PMOS
transistor changes polarity, its gate will be driven low by
the current sense amplifier A2, causing Q2 to short out its
body diode. The inductor then discharges into the load
through Q2. The output of A2 also serves to reset the flipflop and one-shot in preparation for the next charging
cycle. A2 releases the gate of Q2 when its current falls to
zero. If VOUT is still low, the flip-flop will immediately
initiate another pulse. The output capacitor (C1) filters the
inductor current, limiting output voltage ripple. Inductor
current and one-shot waveforms are shown in Figure 3.
INDUCTOR
CURRENT
Q1 ON
DESIGN CONSIDERATIONS
INDUCTOR
REGULATOR OPERATION
Q(ONE SHOT)
An additional comparator is provided to detect low VIN,
or any other error condition that is important to the user.
The inverting input of the comparator is internally
connected to VREF, while the non-inverting input is
provided externally at the DETECT pin. The output of the
comparator is the RESET pin, which swings from VOUT to
GND when an error is detected.
Q2
ON
Q1 ON
Selecting the proper inductor for a specific application
usually involves a trade-off between efficiency and
maximum output current. Choosing too high a value will
keep the regulator from delivering the required output
current under worst case conditions. Choosing too low a
value causes efficiency to suffer. It is necessary to know
the maximum required output current and the input
voltage range to select the proper inductor value. The
maximum inductor value can be estimated using the
following formula:
2
V
× TON(MIN) × η
LMAX = IN(MIN)
2 × VOUT × IOUT(MAX)
(2)
where h is the efficiency, typically between 0.8 and 0.9.
Note that this is the value of inductance that just barely
delivers the required output current under worst case
conditions. A lower value may be required to cover
inductor tolerance, the effect of lower peak inductor
currents caused by resistive losses, and minimum dead
time between pulses.
Another method of determining the appropriate inductor
value is to make an estimate based on the typical
performance curves given in Figures 4 and 5. Figure 4
shows maximum output current as a function of input
voltage for several inductor values. These are typical
performance curves and leave no margin for inductance
and ON-time variations. To accommodate worst case
conditions, it is necessary to derate these curves by at
least 10% in addition to inductor tolerance.
For example, a two cell to 5V application requires 80mA
of output current while using an inductor with 15%
tolerance. The output current should be derated by 25%
to 100mA to cover the combined inductor and ON-time
tolerances. Assuming that 2V is the end of life voltage of a
two cell input, Figure 4 shows that with a 2V input, the
ML4861-5 delivers 108mA with a 27µH inductor.
Q2
ON
Q1 & Q2 OFF
Figure 3. PFM Inductor Current Waveforms and Timing.
5
ML4861
ML4861-3.3
500
L = 10µH
IOUT MAX (mA)
400
L = 27µH
400
L = 27µH
300
200
L = 56µH
100
0
ML4861-5.0
L = 15µH
L = 15µH
IOUT MAX (mA)
500
L = 10µH
300
L = 56µH
200
100
2.0
1.0
0
3.0
2.0
1.0
VIN (V)
500
3.0
4.0
VIN (V)
ML4861-6.0
L = 15µH
L = 27µH
IOUT MAX (mA)
400
L = 56µH
300
L = 10µH
200
100
0
1.0
3.0
2.0
4.0
5.0
6.0
VIN (V)
Figure 4. Output Current vs Input Voltage.
Figure 5 shows efficiency under the conditions used to
create Figure 4. It can be seen that efficiency is mostly
independent of input voltage and is closely related to
inductor value. This illustrates the need to keep the
inductor value as high as possible to attain peak system
efficiency. As the inductor value goes down to 10µH, the
efficiency drops to between 70% and 75%. With 56µH,
the efficiency exceeds 90% and there is little room for
improvement. At values greater than 100µH, the operation
of the synchronous rectifier becomes unreliable because
the inductor current is so small that it is difficult for the
control circuitry to detect. The data used to generate
Figures 4 and 5 is provided in Table 1.
After the appropriate inductor value is chosen, it is
necessary to find the minimum inductor current rating
required. Peak inductor current is determined from the
following formula:
IL(PEAK) =
6
TON(MAX) × VIN(MAX)
LMIN
In the two cell application previously described, a
maximum input voltage of 3V would give a peak current
of 1.2A. When comparing various inductors, it is
important to keep in mind that suppliers use different
criteria to determine their ratings. Many use a
conservative current level, where inductance has dropped
to 90% of its normal level. In any case, it is a good idea to
try inductors of various current ratings with the ML4861 to
determine which inductor is the best choice. Check
efficiency and maximum output current, and if a current
probe is available, look at the inductor current to see if it
looks like the waveform shown in Figure 3. For additional
information, see Applications Note 29, “Choosing an
Inductor for Your ML4861 Application.”
Suitable inductors can be purchased from the following
suppliers:
(3)
Coilcraft
(708) 639-6400
Coiltronics
(407) 241-7876
Dale
(605) 665-9301
Sumida
(708) 956-0666
ML4861
ML4861-3.3
95%
ML4861-5.0
95%
L = 56µH
L = 57µH
EFFICIENCY AT IOUT MAX
EFFICIENCY AT IOUT MAX
90%
L = 27µH
85%
80%
L = 15µH
75%
L = 10µH
90%
L = 27µH
85%
L = 15µH
80%
75%
L = 10µH
70%
70%
65%
0
2
1
0
1.0
2.0
3.0
4.0
VIN (V)
3
VIN
ML4861-6.0
95%
EFFICIENCY AT IOUT MAX
L = 57µH
90%
L = 27µH
85%
L = 15µH
80%
75%
L = 10µH
70%
1.0
0
2.0
3.0
4.0
5.0
6.0
VIN (V)
Figure 5. Typical Efficiency as a Function of VIN.
OUTPUT CAPACITOR
The choice of output capacitor is also important, as it
controls the output ripple and optimizes the efficiency of
the circuit. Output ripple is influenced by three capacitor
parameters: capacitance, ESR, and ESL. The contribution
due to capacitance can be determined by looking at the
change in capacitor voltage required to store the energy
delivered by the inductor in a single charge-discharge
cycle, as determined by the following formula:
2
∆VOUT =
2
TON × VIN
2 × L × C × (VOUT − VIN)
(4)
For a 2.4V input, and 5V output, a 27µH inductor, and a
47µF capacitor, the expected output ripple due to
capacitor value is 87mV.
Capacitor Equivalent Series Resistance (ESR) and
Equivalent Series Inductance (ESL), also contribute to the
output ripple due to the inductor discharge current
waveform. Just after the NMOS transistor turns off, the
output current ramps quickly to match the peak inductor
current. This fast change in current through the output
capacitor’s ESL causes a high frequency (5ns) spike that
can be over 1V in magnitude. After the ESL spike settles,
the output voltage still has a ripple component equal to
the inductor discharge current times the ESR. This
component will have a sawtooth shape and a peak value
equal to the peak inductor current times the ESR. ESR
also has a negative effect on efficiency by contributing
I-squared R losses during the discharge cycle.
An output capacitor with a capacitance of 100µF, an ESR
of less than 0.1ý, and an ESL of less than 5nH is a good
general purpose choice. Tantalum capacitors which meet
these requirements can be obtained from the following
suppliers:
AVX
(207) 282-5111
Sprague
(207) 324-4140
If ESL spikes are causing output noise problems, an EMI
filter can be added in series with the output.
7
ML4861
LAYOUT
INPUT CAPACITOR
Unless the input source is a very low impedance battery, it
will be necessary to decouple the input with a capacitor
with a value of between 47µF and 100µF. This provides
the benefits of preventing input ripple from affecting the
ML4861 control circuitry, and it also improves efficiency
by reducing I-squared R losses during the charge and
discharge cycles of the inductor. Again, a low ESR
capacitor (such as tantalum) is recommended.
REFERENCE CAPACITOR
Under some circumstances input ripple cannot be
reduced effectively. This occurs primarily in applications
where inductor currents are high, causing excess output
ripple due to “pulse grouping”, where the chargedischarge pulses are not evenly spaced in time. In such
cases it may be necessary to decouple the reference pin
(VREF) with a small 10nF to 100nF ceramic capacitor. This
is particularly true if the ripple voltage at VIN is greater
than 100mV.
Good PC board layout practices will ensure the proper
operation of the ML4861. Important layout considerations
include:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4861
• Use short trace lengths from the inductor to the VL pin
and from the output capacitor to the VOUT pin
• Use a single point ground for the ML4861 ground pins,
and the input and output capacitors
A sample PC board layout is shown in Figure 6.
TOP LAYER
BOTTOM LAYER
SETTING THE RESET THRESHOLD
To use the RESET comparator as an input voltage monitor,
it is necessary to use an external resistor divider tied to the
DETECT pin as shown in the block diagram. The resistor
values RA and RB can be calculated using the following
equation:
VIN(MIN) = 0.2 ×
(R A + RB )
RB
(5)
The value of RB should be 100ký or less to minimize bias
current errors. RA is then found by rearranging the
equation:

V
R A = RB ×  IN(MIN) − 1

 0.2
(6)
Figure 6. Sample PC Board Layout.
8
ML4861
TABLE 1. MAXIMUM OUTPUT CURRENT AND EFFICIENCY.
ML4861-3.3
VIN
L = 10µH
1.0
1.5
2.0
2.5
L = 15µH
1.0
1.5
2.0
2.5
3.0
L = 27µH
1.0
1.5
2.0
2.5
3.0
L = 56µH
1.0
1.5
2.0
2.5
3.0
ML4861-5.0
IOUT (mA)
EFFICIENCY PERCENTAGE
77.5
191.7
310.2
409.7
69.7
67.2
67.8
71.1
58.5
137.1
232.1
335.3
405.0
74.5
75.7
76.4
76.9
78.2
40.0
95.4
163.8
242.5
306.0
81.1
82.9
83.6
84.2
85.2
19.5
45.5
79.3
122.6
168.3
89.4
90.9
90.6
91.1
91.7
VIN
L = 10µH
1.0
1.5
2.0
2.5
L = 15µH
1.0
1.5
2.0
2.5
3.0
3.5
L = 27µH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
L = 56µH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
IOUT (mA)
EFFICIENCY PERCENTAGE
45.8
112.6
210.7
331.6
70.6
74.2
74.0
73.0
32.4
85.6
156.3
240.2
332.5
432.3
75.7
79.5
80.6
80.9
81.2
81.6
20.8
59.3
108.6
167.6
236.6
311.2
385.4
442.3
78.7
83.6
84.9
85.6
86.2
86.6
87.2
88.0
11.3
27.4
49.8
78.1
112.0
151.2
194.2
237.0
87.3
89.4
90.5
91.2
91.7
92.2
92.6
93.1
9
ML4861
TABLE 1. MAXIMUM OUTPUT CURRENT AND EFFICIENCY
(Continued)
ML4861-6.0
VIN (V)
L = 10µH
1.0
1.5
2.0
2.5
L = 15µH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
L = 27µH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
L = 60µH
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
10
IIN (mA)
VOUT (V)
IOUT (mA)
EFFICIENCY %
325.8
524.6
730.0
910.8
5.975
5.990
5.995
5.992
40.1
100.0
184.5
284.0
73.5
76.1
75.7
74.7
220.5
365.7
516.7
639.3
755.1
855.1
916.1
5.993
5.981
5.998
5.995
5.999
5.996
5.992
28.5
73.8
139.9
216.3
305.1
402.0
493.0
77.5
80.5
81.2
81.1
80.8
80.5
80.6
154.1
235.7
329.5
404.6
478.2
551.0
610.5
659.9
689.1
665.0
5.992
5.982
5.990
6.000
5.995
5.999
5.997
5.993
5.991
5.999
21.6
50.7
95.9
147.5
209.6
281.6
356.7
434.0
504.3
534.7
84.0
85.8
87.2
87.5
87.6
87.6
87.6
87.6
87.7
87.7
67.6
108.8
148.0
186.0
222.4
257.2
290.2
321.2
346.4
356.1
5.977
5.961
5.976
5.978
5.973
5.975
5.989
5.995
5.997
6.000
10.0
24.7
45.1
71.2
102.6
138.6
178.7
222.7
267.1
302.4
88.4
90.2
91.1
91.5
91.9
92.0
92.2
92.4
92.5
92.6
ML4861
PHYSICAL DIMENSIONS
inches (millimeters)
Package: S08
8-Pin SOIC
0.189 - 0.199
(4.80 - 5.06)
8
PIN 1 ID
0.148 - 0.158 0.228 - 0.244
(3.76 - 4.01) (5.79 - 6.20)
1
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
0.050 BSC
(1.27 BSC)
0.059 - 0.069
(1.49 - 1.75)
0º - 8º
0.055 - 0.061
(1.40 - 1.55)
0.012 - 0.020
(0.30 - 0.51)
0.004 - 0.010
(0.10 - 0.26)
0.015 - 0.035
(0.38 - 0.89)
0.006 - 0.010
(0.15 - 0.26)
SEATING PLANE
ORDERING INFORMATION
PART NUMBER
ML4861CS-3
ML4861CS-5
ML4861CS-6
OUTPUT VOLTAGE TEMPERATURE RANGE
PACKAGE
3.3V
5.0V
6.0V
0°C to 70°C
0°C to 70°C
0°C to 70°C
8-Pin SOIC (S08)
8-Pin SOIC (S08)
8-Pin SOIC (S08)
ML4861ES-3
ML4861ES-5
ML4861ES-6 (Obsolete)
3.3V
5.0V
6.0V
–20°C to 70°C
–20°C to 70°C
–20°C to 70°C
8-Pin SOIC (S08)
8-Pin SOIC (S08)
8-Pin SOIC (S08)
ML4861IS-3 (Obsolete)
ML4861IS-5 (Obsolete)
ML4861IS-6 (Obsolete)
3.3V
5.0V
6.0V
–40°C to 85°C
–40°C to 85°C
–40°C to 85°C
8-Pin SOIC (S08)
8-Pin SOIC (S08)
8-Pin SOIC (S08)
© Micro Linear 1996
is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents: 4,897,611; 4,964,026; 5,027,116;
5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017, 5,559,470. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume
any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the
rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or
representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability
for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
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DS4861-01
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