Revised February 2005 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number Package Package Description Number 74LVX125M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVX125SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LVX125MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LVX125MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Connection Diagram Logic Symbol IEEE/IEC Truth Table Inputs Pin Descriptions OEn Pin Names Description An Inputs OEn Output Enable Inputs On Outputs © 2005 Fairchild Semiconductor Corporation Output An On L L L L H H H X Z H HIGH Voltage Level L LOW Voltage Level Z High Impedance X Immaterial DS012007 www.fairchildsemi.com 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs February 1994 74LVX125 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions (Note 3) 0.5V to 7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI Supply Voltage (VCC) 0.5V 20 mA 0.5V to 7.0V DC Input Voltage (VI) VO 0.5V VCC 0.5V 0V to 5.5V Output Voltage (VO) DC Output Diode Current (IOK) VO 2.0V to 3.6V Input Voltage (VI) 0V to VCC 40qC to 85qC Operating Temperature (TA) Output Voltage (VO) DC Output Source/Sink Current (IO) 20 mA 20 mA 0.5V to VCC 0.5V r25 mA Input Rise and Fall Time ('t/'V) Note 2: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC VCC or Ground Current r50 mA 65qC to 150qC (ICC or IGND ) Storage Temperature Range (TSTG) Power Dissipation 0 ns/V to 100 ns/V Note 3: Unused inputs must be held HIGH or LOW. They may not float. 180 mW DC Electrical Characteristics Symbol Parameter VCC TA (V) VIH VIL VOH VOL IOZ Min 25qC TA Typ Max 40qC to 85qC Min HIGH Level 2.0 1.5 1.5 Input Voltage 3.0 2.0 2.0 3.6 2.4 2.4 2.0 0.5 0.5 Input Voltage 3.0 0.8 0.8 3.6 0.8 0.8 HIGH Level 2.0 1.9 2.0 1.9 3.0 2.9 3.0 2.9 3.0 2.58 V VIN V 2.0 0.0 Output Voltage 3.0 0.0 0.1 0.1 VIN Input Leakage ICC Quiescent Supply IOH 50 PA VIH IOH 50 PA IOH 4 mA VIL or IOL 50 PA VIH IOL 50 PA IOL 4 mA 0.1 0.1 3.0 0.36 0.44 V 3.6 r0.25 r2.5 PA 3.6 r0.1 r1.0 PA VIN 5.5V or GND 3.6 4.0 40.0 PA VIN VCC or GND Off-State Current IIN VIL or 2.48 LOW Level 3-STATE Output Conditions V LOW Level Output Voltage Units Max VIN VOUT VIH or VIL VCC or GND Current Current Noise Characteristics Symbol (Note 4) VCC Parameter (V) TA Typ 25qC Units CL (pF) 50 Limit VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.8 V VOLV Quiet Output Minimum Dynamic VOL 3.3 0.3 0.8 V 50 VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50 VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50 Note 4: Input tr tf 3 ns www.fairchildsemi.com 2 74LVX125 AC Electrical Characteristics Symbol tPLH Propagation Delay Time tPHL Data to Output tPZH VCC Parameter (V) TA Min 25qC TA 40qC to 85qC Typ Max Min Max 2.7 5.8 10.1 1.0 13.5 8.3 13.6 1.0 17.0 3.3 r 0.3 4.4 6.2 1.0 8.5 6.9 9.7 1.0 5.3 9.3 7.8 Units Conditions CL 15 pF CL 50 pF CL 15 pF 12.0 CL 50 pF 1.0 12.5 CL 15 pF, RL 1 k: 12.8 1.0 16.0 CL 50 pF, RL 1 k: 4.0 5.6 1.0 7.5 CL 15 pF, RL 1 k: 6.5 9.1 1.0 11.0 CL 50 pF, RL 1 k: 2.7 10.0 15.7 1.0 19.0 CL 50 pF, RL 1 k: 3.3 r 0.3 8.3 11.2 1.0 13.0 CL 50 pF, RL 1 k: CL 50 pF Output Enable Time 2.7 tPZL 3.3 r 0.3 tPHZ Output Disable tPLZ Time tOSHL Output to Output 2.7 tOSLH Skew (Note 5) 3.3 Note 5: Parameter guaranteed by design. tOSLH |tPLHm tPLHn|, tOSHL 1.5 1.5 1.5 1.5 ns ns ns ns |t PHLm t PHLn| Capacitance Symbol TA Parameter Min 25qC TA Typ Max 10 CIN Input Capacitance 4.0 CPD Power Dissipation 14 40qC to 85qC Min Units Max 10 pF pF Capacitance (Note 6) Note 6: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. 3 www.fairchildsemi.com 74LVX125 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74LVX125 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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