MAXIM MAX7401CSA

19-4788; Rev 1; 6/99
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
Features
♦ 8th-Order, Lowpass Bessel Filters
♦ Low Noise and Distortion: -82dB THD + Noise
♦ Clock-Tunable Corner Frequency (1Hz to 5kHz)
♦ 100:1 Clock-to-Corner Ratio
♦ Single-Supply Operation
+5V (MAX7401)
+3V (MAX7405)
♦ Low Power
2mA (Operating Mode)
0.2µA (Shutdown Mode)
♦ Available in 8-Pin SO/DIP Packages
♦ Low Output Offset: ±5mV
Ordering Information
Applications
ADC Anti-Aliasing
Post-DAC Filtering
CT2 Base Stations
PART
TEMP. RANGE
Speech Processing
MAX7401CSA
0°C to +70°C
8 SO
MAX7401CPA
0°C to +70°C
8 Plastic DIP
MAX7401ESA
MAX7401EPA
MAX7405CSA
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
8 SO
8 Plastic DIP
8 SO
MAX7405CPA
0°C to +70°C
8 Plastic DIP
MAX7405ESA
MAX7405EPA
-40°C to +85°C
-40°C to +85°C
8 SO
8 Plastic DIP
Air-Bag Electronics
Pin Configuration
TOP VIEW
COM 1
IN 2
GND
3
MAX7401
MAX7405
VDD 4
SO/DIP
8
CLK
7
SHDN
6
OS
5
OUT
PIN-PACKAGE
Typical Operating Circuit
VSUPPLY
0.1µF
VDD
INPUT
IN
SHDN
OUT
OUTPUT
MAX7401
MAX7405
CLOCK
CLK
COM
GND
OS
0.1µF
________________________________________________________________ Maxim Integrated Products
1
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For small orders, phone 1-800-835-8769.
MAX7401/MAX7405
General Description
The MAX7401/MAX7405 8th-order, lowpass, Bessel,
switched-capacitor filters (SCFs) operate from a single
+5V (MAX7401) or +3V (MAX7405) supply. These
devices draw only 2mA of supply current and allow corner frequencies from 1Hz to 5kHz, making them ideal
for low-power post-DAC filtering and anti-aliasing applications. They feature a shutdown mode that reduces
supply current to 0.2µA.
Two clocking options are available on these devices:
self-clocking (through the use of an external capacitor)
or external clocking for tighter corner-frequency control.
An offset adjust pin allows for adjustment of the DC output level.
The MAX7401/MAX7405 Bessel filters provide low overshoot and fast settling. Their fixed response simplifies
the design task to selecting a clock frequency.
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
ABSOLUTE MAXIMUM RATINGS
VDD to GND
MAX7401 ..............................................................-0.3V to +6V
MAX7405 ..............................................................-0.3V to +4V
IN, OUT, COM, OS, CLK ...........................-0.3V to (VDD + 0.3V)
SHDN........................................................................-0.3V to +6V
OUT Short-Circuit Duration...................................................1sec
Continuous Power Dissipation (TA = +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
8-Pin DIP (derate 9.09mW/°C above +70°C) ...............727mW
Operating Temperature Ranges
MAX740 _C_A ....................................................0°C to +70°C
MAX740 _E_A .................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX7401
(V DD = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER CHARACTERISTICS
Corner Frequency
Clock-to-Corner Ratio
fC
(Note 1)
0.001 to 5
fCLK / fC
Clock-to-Corner Tempco
10
Output Voltage Range
Output Offset Voltage
0.25
VOFFSET
DC Insertion Gain with
Output Offset Removed
THD+N
OS Voltage Gain to OUT
Input Voltage Range at OS
Input Resistance at COM
ppm/°C
VDD - 0.25
VIN = VCOM = VDD / 2
VCOM = VDD / 2 (Note 2)
Total Harmonic Distortion
plus Noise
COM Voltage Range
kHz
100:1
-0.1
fIN = 200Hz, VIN = 4Vp-p,
measurement bandwidth = 22kHz
V
±5
±25
mV
0.15
0.3
dB
-82
dB
AOS
1
V/ V
VOS
VCOM ±0.1
V
VDD / 2
+ 0.5
Input, COM externally driven
VDD / 2
- 0.5
VDD / 2
Output, COM internally biased
VDD / 2
- 0.2
VDD / 2
VDD / 2
+ 0.2
VCOM
V
RCOM
75
Resistive Output Load Drive
RL
10
Maximum Capacitive Load at
OUT
CL
50
Clock Feedthrough
125
kΩ
10
mVp-p
1
kΩ
500
pF
Input Leakage Current at COM
SHDN = GND, VCOM = 0 to VDD
±0.1
±10
µA
Input Leakage Current at OS
VOS = 0 to (VDD - 1V) (Note 3)
±0.1
±10
µA
38
48
kHz
±15
±30
µA
CLOCK
Internal Oscillator Frequency
fOSC
COSC = 1000pF (Note 4)
Clock Input Current
ICLK
VCLK = 0 or 5V
Clock Input High
VIH
Clock Input Low
VIL
2
29
VDD - 0.5
_______________________________________________________________________________________
V
0.5
V
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
(V DD = +5V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
CONDITIONS
SYMBOL
MIN
UNITS
TYP
MAX
5.5
V
2
3.5
mA
1
µA
POWER REQUIREMENTS
Supply Voltage
VDD
Supply Current
IDD
4.5
Operating mode, no load, IN = OS = COM
Shutdown Current
I SHDN
SHDN = GND, CLK driven from 0 to VDD
0.2
Power-Supply Rejection Ratio
PSRR
Measured at DC
60
dB
SHUTDOWN
SHDN Input High
VSDH
SHDN Input Low
VSDL
SHDN Input Leakage Current
VDD - 0.5
V
±0.1
V SHDN = 0 to VDD
0.5
V
±10
µA
ELECTRICAL CHARACTERISTICS—MAX7405
(V DD = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER CHARACTERISTICS
Corner Frequency
fC
Clock-to-Corner Ratio
(Note 1)
0.001 to 5
fCLK/fC
Clock-to-Corner Tempco
10
Output Voltage Range
Output Offset Voltage
kHz
100:1
0.25
VOFFSET
DC Insertion Gain with
Output Offset Removed
VIN = VCOM = VDD / 2
VCOM = VDD / 2 (Note 2)
Total Harmonic Distortion
plus Noise
THD+N
OS Voltage Gain to OUT
AOS
Input Voltage Range at OS
VOS
COM Voltage Range
VCOM
Input Resistance at COM
RCOM
-0.1
fIN = 200Hz, VIN = 2.5Vp-p,
measurement bandwidth = 22kHz
COM internally biased or externally driven
VDD / 2
- 0.1
75
Clock Feedthrough
ppm/°C
VDD - 0.25
V
±5
±25
mV
0.03
0.3
dB
-84
dB
1
V/ V
VCOM ±0.1
V
VDD / 2
VDD / 2
+ 0.1
V
125
kΩ
10
mVp-p
Resistance Output Load Drive
RL
10
1
kΩ
Maximum Capacitive
Load at OUT
CL
50
500
pF
Input Leakage Current at COM
Input Leakage Current at OS
SHDN = GND, VCOM = 0 to VDD
VOS = 0 to (VDD - 1V) (Note 3)
±0.1
±10
µA
±0.1
±10
µA
_______________________________________________________________________________________
3
MAX7401/MAX7405
ELECTRICAL CHARACTERISTICS—MAX7401 (continued)
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
ELECTRICAL CHARACTERISTICS—MAX7405 (continued)
(V DD = +3V, filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND,
SHDN = VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
26
34
43
kHz
±15
±30
µA
CLOCK
Internal Oscillator Frequency
fOSC
COSC = 1000pF (Note 4)
Clock Input Current
ICLK
VCLK = 0 or 3V
Clock Input High
VIH
Clock Input Low
VIL
VDD - 0.5
V
0.5
V
POWER REQUIREMENTS
Supply Voltage
VDD
Supply Current
IDD
2.7
Operating mode, no load, IN = OS = COM
3.6
V
2
3.5
mA
1
µA
Shutdown Current
I SHDN
SHDN = GND, CLK driven from 0 to VDD
0.2
Power-Supply Rejection Ratio
PSRR
Measured at DC
60
dB
SHUTDOWN
SHDN Input High
VSDH
SHDN Input Low
VSDL
SHDN Input Leakage Current
VDD - 0.5
V SHDN = 0 to VDD
V
±0.1
0.5
V
±10
µA
FILTER CHARACTERISTICS—MAX7401/MAX7405
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = VDD;
VCOM = VOS = VDD /2; fCLK = 100kHz; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
Insertion Gain Relative to
DC Gain
CONDITIONS
MIN
TYP
MAX
fIN = 0.5fC
-1.0
-0.8
-0.6
fIN = fC
-3.3
-3.0
-2.7
fIN = 3fC
-33
-29
fIN = 6fC
-79
-74
UNITS
dB
Note 1: The maximum fC is defined as the clock frequency, fCLK = 100 · fC, at which the peak SINAD drops to 68dB with a sinusoidal input at 0.2fC.
Note 2: DC insertion gain is defined as ∆VOUT / ∆VIN.
Note 3: OS voltages above VDD - 1V saturate the input and result in a 75µA typical input leakage current.
Note 4: For MAX7401, fOSC (kHz) ≅38 · 103 / COSC (pF). For MAX7405, fOSC (kHz) ≅34 · 103 / COSC (pF).
4
_______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
PASSBAND FREQUENCY RESPONSE
-1.0
-30
-2.0
-50
-2.5
-60
-3.0
-70
1
2
3
4
202
606
808
MAX7409 toc02
1010
0
1200
1600
NO LOAD
20
VIN = VCOM = VDD / 2
15
OFFSET VOLTAGE (mV)
SUPPLY CURRENT (mA)
2.02
2.01
MAX7401
2.00
1.99
1.5
4.0
4.5
5.0
-40
-20
0
SUPPLY VOLTAGE (V)
0.5
0
-0.5
-1.0
20
40
60
80
0
20
40
60
TEMPERATURE (°C)
80
100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
INTERNAL OSCILLATOR FREQUENCY
vs. COSC CAPACITANCE
NORMALIZED OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
10,000
1000
100
10
1
0.1
-1.5
-5
100
MAX7401 toc08
VIN = VCOM = VDD / 2
OSCILLATOR FREQUENCY (kHz)
1.0
MAX7401 toc07
OFFSET VOLTAGE vs. TEMPERATURE
MAX7401
MAX7405
0
-20
1.97
5.5
5
-15
1.20
NORMALIZED OSCILLATOR FREQUENCY
3.5
10
-10
MAX7405
1.98
1.6
2000
MAX7401 toc06
2.03
MAX7401 toc04
MAX7401
1.8
-20
800
OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
1.9
-40
400
SUPPLY CURRENT
vs. TEMPERATURE
1.7
OFFSET VOLTAGE (mV)
404
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX7405
3.0
-300
-400
0
2.2
2.5
-250
INPUT FREQUENCY (Hz)
2.3
2.0
-200
INPUT FREQUENCY (Hz)
NO LOAD
2.1
-150
INPUT FREQUENCY (kHz)
2.5
2.4
-3.5
5
-100
-350
MAX7401 toc05
0
SUPPLY CURRENT (mA)
-1.5
-40
fC = 1kHz
-50
PHASE SHIFT (DEGREES)
-0.5
-20
GAIN (dB)
GAIN (dB)
fC = 1kHz
0
-10
0
COSC = 390pF
1.15
MAX7401 toc09
MAX7401 toc01
fC = 1kHz
0
PHASE RESPONSE
0.5
MAX7401 toc03
FREQUENCY RESPONSE
10
1.10
MAX7405
1.05
1.00
0.95
MAX7401
0.90
0.85
0.80
0.01
0.1
1
10
COSC CAPACITANCE (nF)
100
1000
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
MAX7401/MAX7405
Typical Operating Characteristics
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25°C; unless otherwise
noted.)
Typical Operating Characteristics (continued)
(VDD = +5V for MAX7401, VDD = +3V for MAX7405; fCLK = 100kHz; SHDN = VDD; VCOM = VOS = VDD / 2; TA = +25°C; unless otherwise
noted.)
THD + NOISE (dB)
1.01
MAX7405
0.99
0.98
-40
-50
-60
A
-70
0.97
B
-20
0
20
40
60
80
100
0
1
2
TEMPERATURE (°C)
3
4
-60
RL = 1kΩ
-70
RL = 10kΩ
0
5
1
2
-20
-30
-40
-50
-60
A
fIN = 200Hz
fC = 1kHz
MEASUREMENT BW = 22kHz
-10
THD + NOISE (dB)
-20
0
MAX7401 toc13
NO LOAD
(SEE TABLE A)
-70
-30
-40
-50
RL = 500Ω
-60
RL = 1kΩ
-70
B
RL = 10kΩ
-80
-80
-90
-90
0
0.5
1.0
1.5
2.0
2.5
0
3.0
0.5
1.0
1.5
2.0
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
Table A. THD Plus Noise vs. Input
Signal Amplitude Test Conditions
6
4
MAX7405
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD
0
-10
3
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
MAX7405
THD PLUS NOISE vs.
INPUT SIGNAL AMPLITUDE
THD + NOISE (dB)
RL = 500Ω
-50
-90
-90
-40
-40
-80
-80
0.96
-30
MAX7401 toc14
1.00
-20
-30
MAX7401 toc12
-20
MAX7401
fIN = 200Hz
fC = 1kHz
MEASUREMENT BW = 22kHz
-10
THD + NOISE (dB)
1.02
NO LOAD
(SEE TABLE A)
-10
0
MAX7401 toc11
COSC = 390pF
1.03
0
MAX7401 toc10
1.04
MAX7401
THD PLUS NOISE vs. INPUT SIGNAL
AMPLITUDE AND RESISTIVE LOAD
MAX7401
THD PLUS NOISE vs.
INPUT SIGNAL AMPLITUDE
NORMALIZED OSCILLATOR FREQUENCY
vs. TEMPERATURE
NORMALIZED OSCILLATOR FREQUENCY
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
TRACE
fIN
(Hz)
fC
(kHz)
fCLK
(kHz)
MEASUREMENT
BANDWIDTH (kHz)
A
1000
5
500
80
B
200
1
100
22
_______________________________________________________________________________________
2.5
3.0
5
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
PIN
NAME
FUNCTION
1
COM
Common Input. Biased internally at mid-supply. Bypass externally to GND with a 0.1µF capacitor. To override internal biasing, drive with an external supply.
2
IN
3
GND
Ground
4
VDD
Positive Supply Input: +5V for MAX7401, +3V for MAX7405
5
OUT
Filter Output
6
OS
7
SHDN
8
CLK
Filter Input
Offset Adjust Input. To adjust output offset, bias OS externally. Connect OS to COM if no offset adjustment is
needed. Refer to Offset and Common-Mode Input Adjustment section.
Shutdown Input. Drive low to enable shutdown mode; drive high or connect to VDD for normal operation.
Clock Input. To override the internal oscillator, connect to an external clock; otherwise, connect an external
capacitor (COSC) from CLK to GND to set the internal oscillator frequency.
_______________Detailed Description
The MAX7401/MAX7405 Bessel filters provide low overshoot and fast settling responses. Both parts operate
with a 100:1 clock-to-corner frequency ratio and a 5kHz
maximum corner frequency.
Lowpass Bessel filters such as the MAX7401/MAX7405
delay all frequency components equally, preserving the
shape of step inputs (subject to the attenuation of the
higher frequencies). Bessel filters settle quickly—an
important characteristic in applications that use a multiplexer (mux) to select an input signal for an analog-todigital converter (ADC). An anti-aliasing filter placed
between the mux and the ADC must settle quickly after
a new channel is selected.
Figure 1 shows the difference between Bessel and
Butterworth filters when a 1kHz square wave is applied
to the filter input. With the filter cutoff frequencies set at
5kHz, trace B shows the Bessel filter response and
trace C shows the Butterworth filter response.
A
2V/div
B
2V/div
C
2V/div
200µs/div
A: 1kHz INPUT SIGNAL
B: BESSEL FILTER RESPONSE; fC = 5kHz
C: BUTTERWORTH FILTER RESPONSE; fC = 5kHz
Figure 1. Bessel vs. Butterworth Filter Response
Background Information
Most switched-capacitor filters (SCFs) are designed with
biquadratic sections. Each section implements two filtering poles, and the sections are cascaded to produce
higher order filters. The advantage to this approach is
ease of design. However, this type of design is highly
sensitive to component variations if any section’s Q is
high. An alternative approach is to emulate a passive network using switched-capacitor integrators with summing
and scaling. Figure 2 shows a basic 8th-order ladder filter
structure.
R1
+
-
VIN
L1
L5
L3
C2
C4
L7
C6
C8
R2
V0
Figure 2. 8th-Order Ladder Filter Network
_______________________________________________________________________________________
7
MAX7401/MAX7405
Pin Description
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
A switched-capacitor filter such as the MAX7401/
MAX7405 emulates a passive ladder filter. The filter’s
component sensitivity is low when compared to a cascaded biquad design because each component affects
the entire filter shape, not just one pole-zero pair. In other
words, a mismatched component in a biquad design will
have a concentrated error on its respective poles, while
the same mismatch in a ladder filter design results in an
error distributed over all poles.
Low-Power Shutdown Mode
These devices feature a shutdown mode that is activated by driving SHDN low. In shutdown mode, the filter’s
supply current reduces to 0.2µA (typ) and its output
becomes high impedance. For normal operation, drive
SHDN high or connect to VDD.
___________Applications Information
Clock Signal
Offset and Common-Mode
Input Adjustment
External Clock
The MAX7401/MAX7405 family of SCFs is designed for
use with external clocks that have a 40% to 60% duty
cycle. When using an external clock with these devices,
drive CLK with a CMOS gate powered from 0 to VDD.
Varying the rate of the external clock adjusts the corner
frequency of the filter as follows:
The voltage at COM sets the common-mode input voltage and is biased at mid-supply with an internal resistordivider. Bypass COM with a 0.1µF capacitor and
connect OS to COM. For applications requiring offset
adjustment or DC level shifting, apply an external bias
voltage through a resistor-divider network to OS, as
shown in Figure 3. (Note: Do not leave OS unconnected.) The output voltage is represented by this equation:
fC = fCLK / 100
Internal Clock
When using the internal oscillator, connect a capacitor
(C OSC) between CLK and ground. The value of the
capacitor determines the oscillator frequency as follows:
fOSC (kHz) =
K ⋅10 3
; COSC in pF
COSC
where K = 38 for MAX7401 and K = 34 for MAX7405.
Minimize the stray capacitance at CLK so that it does
not affect the internal oscillator frequency. Vary the rate
of the internal oscillator to adjust the filter’s corner frequency by a 100:1 clock-to-corner frequency ratio. For
example, an internal oscillator frequency of 100kHz
produces a nominal corner frequency of 1kHz.
VOUT = (VIN - VCOM) + VOS
with VCOM = VDD / 2 (typical), and where (VIN - VCOM) is
lowpass filtered by the SCF, and VOS is added at the
output stage. See the Electrical Characteristics for the
voltage range of COM and OS. Changing the voltage on
COM or OS significantly from mid-supply reduces the filter’s dynamic range.
Power Supplies
The MAX7401 operates from a single +5V supply, and
the MAX7405 operates from a single +3V supply.
Bypass VDD to GND with a 0.1µF capacitor. If dual supplies are required (±2.5V for MAX7401, ±1.5V for
MAX7405), connect COM to system ground and connect
VSUPPLY
Input Impedance vs. Clock Frequencies
The MAX7401/MAX7405’s input impedance is effectively
that of a switched-capacitor resistor and is inversely proportional to frequency. The input impedance values
determined below represent the average input impedance since the input current is not continuous. As a rule,
use a driver with an output impedance less than 10% of
the filter’s input impedance. Estimate the input impedance of the filter using the following formula:
ZIN =
0.1µF
VDD
INPUT
IN
SHDN
OUT
COM
0.1µF
CLOCK
CLK
50k
OS
0.1µF
GND
where fCLK = clock frequency and CIN = 3.37pF.
Figure 3. Offset Adjustment Circuit
8
50k
MAX7401
MAX7405
1
(fCLK ⋅ CIN )
OUTPUT
_______________________________________________________________________________________
50k
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
FILTER
fCLK
(kHz)
fC
(kHz)
fIN
(Hz)
100
1
200
VIN
(Vp-p)
MAX7401
TYPICAL HARMONIC DISTORTION (dB)
2nd
3rd
4th
5th
-91
-83
-90
-93
-89
-79
-92
-92
-87
-83
-87
-88
-83
-82
-88
-88
4
500
5
1000
100
1
200
MAX7405
2
500
5
1000
Anti-Aliasing and Post-DAC Filtering
When using the MAX7401/MAX7405 for anti-aliasing or
post-DAC filtering, synchronize the DAC and the filter
clocks. If the clocks are not synchronized, beat frequencies may alias into the passband.
The high clock-to-corner frequency ratio (100:1) also
eases the requirements of pre- and post-SCF filtering. At
the input, a lowpass filter prevents the aliasing of frequencies around the clock frequency into the passband.
At the output, a lowpass filter attenuates the clock
feedthrough.
V+
VDD
SHDN
OUT
INPUT
V+
V-
CLOCK
IN
CLK
*
OUTPUT
COM
MAX7401
MAX7405
OS
0.1µF
0.1µF
GND
A high clock-to-corner frequency ratio allows a simple
RC lowpass filter, with the cutoff frequency set above
the SCF corner frequency, to provide input anti-aliasing
and reasonable output clock attenuation.
V*DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE.
Figure 4. Dual-Supply Operation
GND to the negative supply. Figure 4 shows an example
of dual-supply operation. Single- and dual-supply performance are equivalent. For either single- or dual-supply
operation, drive CLK and SHDN from GND (V- in dualsupply operation) to VDD. For ±5V dual-supply applications, use the MAX291–MAX297.
Input Signal Amplitude Range
The optimal input signal range is determined by observing the voltage level at which the total harmonic distortion plus noise (THD+N) is minimized for a given corner
frequency. The Typical Operating Characteristics show
graphs of the devices’ THD+N response as the input
signal’s peak-to-peak amplitude is varied. These measurements are made with OS and COM biased at midsupply.
Harmonic Distortion
Harmonic distortion arises from nonlinearities within the
filter. These nonlinearities generate harmonics when a
pure sine wave is applied to the filter input. Table 1 lists
the MAX7401/MAX7405’s typical harmonic-distortion
values with a 10kΩ load at TA = +25°C.
Chip Information
TRANSISTOR COUNT: 1116
_______________________________________________________________________________________
9
MAX7401/MAX7405
Table 1. Typical Harmonic Distortion
________________________________________________________Package Information
SOICN.EPS
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
10
______________________________________________________________________________________
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
PDIPN.EPS
______________________________________________________________________________________
11
MAX7401/MAX7405
Package Information (continued)
MAX7401/MAX7405
8th-Order, Lowpass, Bessel,
Switched-Capacitor Filters
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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